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@9names
9names / main.rs
Created November 24, 2021 12:50
Use the Pimoroni Pico display pack from Rust
//! Show ferris on the Pimoroni Pico Display pack
#![no_std]
#![no_main]
use cortex_m_rt::entry;
use defmt::*;
use defmt_rtt as _;
use embedded_hal::digital::v2::OutputPin;
use embedded_time::{fixed_point::FixedPoint, rate::Extensions};
@9names
9names / main.rs
Created May 15, 2021 03:43
Blinky on TM4C123GXL
#![no_std]
#![no_main]
use panic_halt as _;
use cortex_m_rt::entry;
use tm4c123x_hal::{self as hal, prelude::*, delay::Delay};
#[entry]
fn main() -> ! {
let p = hal::Peripherals::take().unwrap();
#![no_std]
#![no_main]
use panic_halt as _;
use bl602_hal as hal;
use hal::{
clock::{self, SysclkFreq, UART_PLL_FREQ},
serial::{Serial, Config},
pac,
prelude::*,
@9names
9names / main.S
Created January 11, 2021 05:32
Toggle GPIO11 (JTAG TDO) on BL602
# memory mapped register for gpio0/1 cfg. used as base for other registers
.set GPIO_CFGCTL0, 0x40000100
# memory mapped register for gpio10/11 cfg
.set GPIO_CFGCTL5_OFS, 0x14
# memory mapped register for GPIO output (whether GPIO is high or low)
.set GPIO_CFGCTL32_OFS, 0x88
# memory mapped register for GPIO output-enable (whether GPIO gets driven)
.set GPIO_CFGCTL34_OFS, 0x90
# config for two GPIO is stored in each CFG register, choose the appropriate one
# based on your GPIO number (ie GPIO11 is ODD, GPIO2 is EVEN)
@9names
9names / main.S
Last active January 10, 2021 07:04
Writing
.set GPIO_CFGCTL2, 0x40000108
.set GPIO_CFGCTL32, 0x40000188
.set GPIO_CFGCTL34, 0x40000190
.set GPIO_CFG_GPIO5, 0b00001011001000000000000000000000
.set GPIO_BITSET_GPIO5, 0b00000000000000000000000000100000
.section .text
main:
la t1, GPIO_CFGCTL2
la t2, GPIO_CFG_GPIO5