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:020000040000FA | |
:0600000014EF18F01200DD | |
:0600080004EF08F01200F5 | |
:060018000CEF08F01200DD | |
:0608000014EF18F01200D5 | |
:060808000FEF08F01200E2 | |
:0608180012EF08F01200CF | |
:0610000014EF18F01200CD | |
:021006000000E8 | |
:061008000FEF08F01200DA |
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/* | |
* swap.ulp | |
* Jan 2013 , By Cruz Monrreal II ([email protected]) | |
* | |
* Modified by Thomas Carpenter 2018 | |
* | |
* Swaps part names. | |
* | |
*/ |
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<?xml version="1.0" encoding="utf-8"?> | |
<!DOCTYPE eagle SYSTEM "eagle.dtd"> | |
<eagle version="6.6.0"> | |
<drawing> | |
<settings> | |
<setting alwaysvectorfont="no"/> | |
<setting verticaltext="up"/> | |
</settings> | |
<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> | |
<layers> |
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Go to here: | |
http://www.falstad.com/circuit/circuitjs.html | |
Then do File->Import From Text | |
Copy and paste all of the lines below into the box presented (If you click the raw button above, you can copy without line numbers): | |
$ 1 4.9999999999999996E-6 10.20027730826997 50 50.0 50 | |
R 96 240 48 240 0 3 40.0 50.0 0.0 0.0 0.5 | |
r 96 240 192 240 0 10000.0 | |
r 192 240 192 320 0 1000.0 |
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module fpgaread(ARDUINOclk, FPGAclk, FPGAdata); | |
input ARDUINOclk; | |
output reg FPGAdata; | |
output reg FPGAclk; | |
reg [15:0] count= 16'd0; | |
reg [127:0] t = 128'd3542638353836; |