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#include <windows.h>
#include <stdio.h>
enum {
threadCnt = 3,
};
HINSTANCE gInst;
HANDLE gThreads[threadCnt];
@X547
X547 / WorkDecRISCV.Mod
Last active September 24, 2022 02:08
RISC-V disassembler for Oberon (Component Pascal)
MODULE WorkDecRISCV;
IMPORT WorkDecoders;
TYPE
Decoder = POINTER TO RECORD (WorkDecoders.Decoder)
name: WorkDecoders.Name;
END;
VAR
@X547
X547 / StdLoader.cp
Created March 20, 2021 19:04
Oberon system Blackbox dynamic module loader
MODULE StdLoader;
(**
project = "BlackBox"
organization = "www.oberon.ch"
contributors = "Oberon microsystems"
version = "System/Rsrc/About"
copyright = "System/Rsrc/About"
license = "Docu/BB-License"
changes = ""
issues = ""
From 2baa0abbbb8a97b0c1eb70b1aeafcf7fdba25ad4 Mon Sep 17 00:00:00 2001
From: X512 <[email protected]>
Date: Wed, 12 May 2021 18:03:24 +0900
Subject: WIP: Haiku patches, share UART with RISC-V machine
---
Makefile | 9 +-
cutils.h | 2 +-
fs_disk.c | 15 +++
riscv_cpu.c | 7 +-
@X547
X547 / gist:06eb0c883c44788de6ce075204d6f4b5
Last active July 4, 2021 12:01
Haiku riscv64 log on HiFive Unmatched (1)
U-Boot SPL 2021.01 (Apr 07 2021 - 17:59:15 +0000)
Trying to boot from MMC1
U-Boot 2021.01 (Apr 07 2021 - 17:59:15 +0000)
CPU: rv64imafdc
Model: SiFive HiFive Unmatched A00
DRAM: 16 GiB
MMC: spi@10050000:mmc@0: 0
@X547
X547 / gist:87b4308f1554f658a6b1f4e44ae3fba1
Last active July 8, 2021 17:53
Haiku riscv64 log on HiFive Unmatched (2)
U-Boot SPL 2021.01 (Apr 07 2021 - 17:59:15 +0000)
Trying to boot from MMC1
U-Boot 2021.01 (Apr 07 2021 - 17:59:15 +0000)
CPU: rv64imafdc
Model: SiFive HiFive Unmatched A00
DRAM: 16 GiB
MMC: spi@10050000:mmc@0: 0
@X547
X547 / haiku-riscv64-hifiveUnmatched-3.log
Created July 8, 2021 18:04
Haiku riscv64 log on HiFive Unmatched (3)
U-Boot SPL 2021.01 (Apr 07 2021 - 17:59:15 +0000)
Trying to boot from MMC1
U-Boot 2021.01 (Apr 07 2021 - 17:59:15 +0000)
CPU: rv64imafdc
Model: SiFive HiFive Unmatched A00
DRAM: 16 GiB
MMC: spi@10050000:mmc@0: 0
U-Boot 2021.01 (Apr 07 2021 - 17:59:15 +0000)
CPU: rv64imafdc
Model: SiFive HiFive Unmatched A00
DRAM: 16 GiB
MMC: spi@10050000:mmc@0: 0
EEPROM: SiFive PCB EEPROM format v1
Serial number: SF105SZ212200730
PCB revision: 3
@X547
X547 / 0001-fix-operation-for-riscv64.patch
Created August 14, 2021 03:32
Haiku hrev55306 RISC-V fix
From 084b598fa1a6b89c545383ed049372508bc7ff03 Mon Sep 17 00:00:00 2001
From: X512 <[email protected]>
Date: Sat, 14 Aug 2021 12:16:20 +0900
Subject: fix operation for riscv64
---
headers/private/kernel/vm/vm_types.h | 4 ++++
src/system/kernel/arch/riscv64/arch_platform.cpp | 2 +-
src/system/kernel/team.cpp | 2 +-
3 files changed, 6 insertions(+), 2 deletions(-)
@X547
X547 / 0001-jam-use-load_image-on-Haiku.patch
Last active August 14, 2021 04:21
Haiku Buildtools btrev43166 changes for RISC-V
From 387ae84090e3d3622da00b6e28681fda479a7da3 Mon Sep 17 00:00:00 2001
From: X512 <[email protected]>
Date: Mon, 25 May 2020 01:00:39 +0900
Subject: jam: use load_image on Haiku
---
jam/execunix.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/jam/execunix.c b/jam/execunix.c