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Andre anta40

  • Jakarta, Indonesia
  • 00:08 (UTC +07:00)
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import android.content.AsyncTaskLoader;
import android.content.Context;
import android.util.Log;
public class BigDataLoader extends AsyncTaskLoader<BigData> {
public BigDataLoader(Context context) {
super(context);
Log.d("test", "...BigDataLoader.");
}
import android.util.Log;
import java.util.ArrayList;
import java.util.Random;
public class BigData {
static int msDataIndex = 0;
int mDataIndex = 0;
String mDataName = "";
{
"data": [{
"tanggal": "2022-09-17",
"detail": [{
"id": 1,
"saving_id": 1
},
{
"id": 2,
"saving_id": 2
@anta40
anta40 / RandomWebview.java
Created September 27, 2021 11:54
Load random URL if webview is refreshed
package com.anta40.webviewtest;
import androidx.appcompat.app.AppCompatActivity;
import androidx.swiperefreshlayout.widget.SwipeRefreshLayout;
import android.os.Bundle;
import android.webkit.WebSettings;
import android.webkit.WebView;
import android.webkit.WebViewClient;
environment:
sdk: ">=2.12.0 <3.0.0"
flutter: ">=1.17.0"
dependencies:
cupertino_icons: ^1.0.2
custom_radio_grouped_button: ^2.0.0
dart_nats: ^0.3.5
dash_chat: ^1.1.16
flutter:
import java.util.Scanner;
class gaji{
public static void main(String[] args) {
String nik, nama;
int gol;
float arr[][] = {
{1.0f, 1500000.0f, 0.1f, 10.0f},
{2.0f, 2500000.0f, 0.5f, 15.0f},
{3.0f, 3500000.0f, 0.7f, 15.0f},
{4.0f, 5500000.0f, 1.0f, 20.0f}
{
draw: 1,
recordsTotal: 2,
recordsFiltered: 2,
data: [
{
date_cron: "20210318",
created_at: "2021-03-18 17:08:31",
updated_at: "2021-03-18 17:08:31"
detail_1: "aaaaa"
// Tested only on MacOS
#include <GLUT/glut.h>
#include <stdio.h>
float xt=1.0,yt=1.0; // For interactive Keyboard
float x = 1.0,y = 1.0,z=1.0; // For Movement
float angle =0; // For Function animation
float Autorun = 300; // For Movement Autorun
void animation(void)
{

Foreward

This document was originally written several years ago. At the time I was working as an execution core verification engineer at Arm. The following points are coloured heavily by working in and around the execution cores of various processors. Apply a pinch of salt; points contain varying degrees of opinion.

It is still my opinion that RISC-V could be much better designed; though I will also say that if I was building a 32 or 64-bit CPU today I'd likely implement the architecture to benefit from the existing tooling.

Mostly based upon the RISC-V ISA spec v2.0. Some updates have been made for v2.2

Original Foreword: Some Opinion

The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and

<?php
/*
Curl command:
curl -X GET --header "Accept: application/json" --header "user-key: xxxxxxxxxxxxxxxxxxxx" "https://developers.zomato.com/api/v2.1/search?entity_id=74&q=seafood"
*/
ini_set('display_errors', 1);
ini_set('display_startup_errors', 1);
error_reporting(E_ALL);