Boris Brezillon bbrezillon
bbrezillon
/ gist:6977802cc21f0603afe0fdb5ca682e1d
Created
June 18, 2020 13:41
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| diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c | |
| index 4a0d486210e9..8270ecea2bb7 100644 | |
| --- a/drivers/mtd/nand/raw/nand_base.c | |
| +++ b/drivers/mtd/nand/raw/nand_base.c | |
| @@ -950,13 +950,24 @@ static int nand_reset_interface(struct nand_chip *chip, int chipnr) | |
| static int nand_setup_interface(struct nand_chip *chip, int chipnr) | |
| { | |
| const struct nand_controller_ops *ops = chip->controller->ops; | |
| - u8 mode = chip->best_interface_config->timings.mode; | |
| - u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { mode, }; |
bbrezillon
/ gist:45f14c75c81be7b8a5372fcbb9eb26fc
Created
June 18, 2020 13:29
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| diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c | |
| index 4a0d486210e9..6c7ca90015c2 100644 | |
| --- a/drivers/mtd/nand/raw/nand_base.c | |
| +++ b/drivers/mtd/nand/raw/nand_base.c | |
| @@ -950,13 +950,14 @@ static int nand_reset_interface(struct nand_chip *chip, int chipnr) | |
| static int nand_setup_interface(struct nand_chip *chip, int chipnr) | |
| { | |
| const struct nand_controller_ops *ops = chip->controller->ops; | |
| - u8 mode = chip->best_interface_config->timings.mode; | |
| - u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { mode, }; |
bbrezillon
/ pub-key
Created
June 3, 2020 08:24
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| ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAACAQDD4/oSLQBpR0HcpPnc9SF86zeSBL4mg1xvu1aZuyk2pSIkRGnaZ16cmubndMR6yvIe40++CYZvsiBMySONR8LldUkvt4YZOMzfgbjiukSi0qRJ6eBN++Zwynvsdd8F3R77oiDTuPBvK9Ysx8jZgI9r4G4r7Z633dm72OAbyc6KTAoPscRb7BTNFFbq+V9LuUKUW1zybEZPd2j6VFOhroqM8V/ogvkBuHK+2fl7ehz794n1c5i47X+pwghBBncl94H+sSHXN1DceXgAWCeDZCLfyKy8tXqSSr2dtRvWyapDuq9x/lksZMl8hGIJHFHtrV+OaZ2YRG5P4mfh6dIIelckFkN134vZ4a5gOQcE68v8C5A3qkkkEjSagYj0x9YmAl0UO5117Pjf4qowbYzTOvgzgue1bZ0MEqHDAz88f26C+t8kVv7qvPvq99hyHHsWxGZVo5ZfDOp3DflB6axzC2woTqBInMTE7RFVUAZ3AOrIKDZRJrBMh5q2oZm1zIfB6Xj1KPAOAFltbPDS0gGZkkl/vnyJEDvlhXo34MgR0lk5jdIdAc85n3DuxUp9iuCcCXtCwuYNMasSmbYdjfPZiomgjMGkp1S9SqKx35f3kkovU7nr8SLDUKYWCPguQ0Mos8Zs8ngqZ1e71H0G+gdcT5D7tpOP5qibaXtbWPuebqNxgw== |
bbrezillon
/ gist:f64549f5dde2857e0e1237aac539505f
Created
May 24, 2020 20:31
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| diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c | |
| index 124ff5692393..7141dcccba3c 100644 | |
| --- a/drivers/mtd/nand/raw/arasan-nand-controller.c | |
| +++ b/drivers/mtd/nand/raw/arasan-nand-controller.c | |
| @@ -331,8 +331,8 @@ static int anfc_read_page_hw_ecc(struct nand_chip *chip, u8 *buf, | |
| return -EIO; | |
| } | |
| - writel_relaxed(dma_addr, nfc->base + DMA_ADDR0_REG); | |
| - writel_relaxed((dma_addr >> 32), nfc->base + DMA_ADDR1_REG); |
bbrezillon
/ gist:570f9aae2b4a03d60917a9a2b9e76431
Created
May 24, 2020 20:29
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| diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c | |
| index 124ff5692393..60ddcc1b72a8 100644 | |
| --- a/drivers/mtd/nand/raw/arasan-nand-controller.c | |
| +++ b/drivers/mtd/nand/raw/arasan-nand-controller.c | |
| @@ -331,8 +331,8 @@ static int anfc_read_page_hw_ecc(struct nand_chip *chip, u8 *buf, | |
| return -EIO; | |
| } | |
| - writel_relaxed(dma_addr, nfc->base + DMA_ADDR0_REG); | |
| - writel_relaxed((dma_addr >> 32), nfc->base + DMA_ADDR1_REG); |
bbrezillon
/ gist:4b81064e121ba77a8f2bebfbe02959f8
Created
May 24, 2020 20:26
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| CC [M] drivers/mtd/nand/raw/arasan-nand-controller.o | |
| In file included from ./include/linux/byteorder/little_endian.h:5, | |
| from ./arch/arm/include/uapi/asm/byteorder.h:22, | |
| from ./include/linux/bitfield.h:11, | |
| from drivers/mtd/nand/raw/arasan-nand-controller.c:14: | |
| drivers/mtd/nand/raw/arasan-nand-controller.c: In function ‘anfc_read_page_hw_ecc’: | |
| drivers/mtd/nand/raw/arasan-nand-controller.c:335:27: warning: right shift count >= width of type [-Wshift-count-overflow] | |
| 335 | writel_relaxed((dma_addr >> 32), nfc->base + DMA_ADDR1_REG); | |
| | ^~ | |
| ./include/uapi/linux/byteorder/little_endian.h:33:51: note: in definition of macro ‘__cpu_to_le32’ |
bbrezillon
/ gist:f0abd2060577a06579fbcbcd6039c2c6
Created
May 20, 2020 20:31
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| [==========] Running 1 test from 1 test suite. | |
| [----------] Global test environment set-up. | |
| [----------] 1 test from ComputeTest | |
| [ RUN ] ComputeTest.ret_constant_ptr | |
| shader: MESA_SHADER_KERNEL | |
| local-size: 1, 1, 1 (variable) | |
| shared-size: 0 | |
| inputs: 2 | |
| outputs: 0 | |
| uniforms: 0 |
bbrezillon
/ gist:27a6505e8b4b2d2b713f05a1652dc079
Created
May 20, 2020 20:27
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| shader: MESA_SHADER_KERNEL | |
| local-size: 1, 1, 1 (variable) | |
| shared-size: 0 | |
| inputs: 2 | |
| outputs: 0 | |
| uniforms: 0 | |
| shared: 0 | |
| decl_var ubo INTERP_MODE_NONE uint[16384] in (0, 0, 2) | |
| decl_var ubo INTERP_MODE_NONE uint[4] kernel_inputs (0, 0, 3) | |
| decl_var ubo INTERP_MODE_NONE uint[3] kernel_global_work_offset (0, 0, 4) |
bbrezillon
/ gist:da5f2bf4637860e4820ec40c641585ff
Created
May 19, 2020 08:30
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| #!/bin/bash | |
| # (C) 2014, Yann E. MORIN <yann.morin.1998@free.fr> | |
| # License: GPLv2, see: http://www.gnu.org/licenses/old-licenses/gpl-2.0.html | |
| set -e | |
| PW_OLD=600 # only refresh if older than 10 minutes | |
| #---------------------------------------------------------------------------- | |
| D_OK=0 |
bbrezillon
/ gist:ed186b6bdb327ef2c2f9d3added1362d
Created
May 7, 2020 07:31
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| From 82a0e67afe68b698671a9b050fda66e80efd4e20 Mon Sep 17 00:00:00 2001 | |
| From: Boris Brezillon <boris.brezillon@collabora.com> | |
| Date: Wed, 6 May 2020 22:34:59 +0200 | |
| Subject: [PATCH] swapbits bch test | |
| --- | |
| include/linux/bch.h | 1 + | |
| lib/bch.c | 84 ++++++++++++++++++++++++++++++++++++--------- | |
| 2 files changed, 69 insertions(+), 16 deletions(-) |