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buttercutter / Net.py
Last active January 31, 2021 01:14
A simple neural network for tic-tac-toe game
import torch
import torch.utils.data
import torch.nn as nn
import torch.optim as optim
import numpy as np
import pandas as pd
from collections import Counter
from sklearn.model_selection import train_test_split
@buttercutter
buttercutter / mcts.py
Last active December 19, 2020 12:21
A simple vanilla Monte-Carlo Tree Search implementation in python
import numpy as np
import random
import sys
sys.setrecursionlimit(100000) # to temporarily solve Recursion Depth Limit issue
# Reference :
# https://www.reddit.com/r/learnmachinelearning/comments/fmx3kv/empirical_example_of_mcts_calculation_puct_formula/
# PUCT formula : https://colab.research.google.com/drive/14v45o1xbfrBz0sG3mHbqFtYz_IrQHLTg#scrollTo=1VeRCpCSaHe3
@buttercutter
buttercutter / LACG.sch
Last active December 8, 2020 16:11
A Look-Ahead Clock Gating Based on Auto-Gated Flip-Flops
v { version=2.9.8 file_version=1.2}
G {}
K {}
V {}
S {}
E {}
N -1490 -1370 -1480 -1370 { lab=Q1A}
N -1480 -1450 -1480 -1370 { lab=Q1A}
N -1480 -1450 -1460 -1450 { lab=Q1A}
N -1710 -1490 -1460 -1490 { lab=#net1}
@buttercutter
buttercutter / cmos_bandpass_filter.asc
Last active November 26, 2020 13:37
Design of CMOS Integrated Q-enhanced RF Filters for Multi-Band/Mode Wireless Applications
Version 4
SHEET 1 2824 1108
WIRE -128 16 -432 16
WIRE 208 16 -128 16
WIRE 576 16 208 16
WIRE 864 16 576 16
WIRE 1376 16 864 16
WIRE 1920 16 1376 16
WIRE 2288 16 1920 16
WIRE 2624 16 2288 16
@buttercutter
buttercutter / cmos_bandpass_filter.asc
Last active September 29, 2020 12:20
High-Frequency Low-Current Second-Order Bandpass Active Filter Topology and Its Design in 28-nm FD-SOI CMOS
Version 4
SHEET 1 880 680
WIRE -832 -368 -960 -368
WIRE -576 -368 -832 -368
WIRE -480 -368 -576 -368
WIRE -352 -368 -480 -368
WIRE -304 -368 -352 -368
WIRE -32 -368 -304 -368
WIRE 240 -368 -32 -368
WIRE 512 -368 240 -368
@buttercutter
buttercutter / 21555.ibs
Created August 29, 2020 09:07
IBIS model of PCI_IO_D11_MIN_NOSP for Micro-CAP v12 circuit simulator
*
* Ver: 3.2
* Name: 21555.ibs
* Rev: 0.3
* Date: 10/1/2001
* Source: From silicon level SPICE model at Intel Corporation.
* Notes: The following information corresponds to the ____ chip.
* Disclaimer: This information is for modeling purposes only and is not
* guaranteed.
* Copyright: Copyright 2000, Intel Corporation, All Rights Reserved.
@buttercutter
buttercutter / Class_E.asc
Last active August 18, 2020 09:57
A Class-E RF Power Amplifier with a Novel Matching Network for High-Efficiency Dynamic Load Modulation https://sci-hub.tw/https://ieeexplore.ieee.org/document/8050498
Version 4
SHEET 1 1368 680
WIRE 64 -224 -288 -224
WIRE 288 -224 64 -224
WIRE 544 -224 288 -224
WIRE 544 -176 544 -224
WIRE -288 -112 -288 -224
WIRE 288 -80 288 -224
WIRE 544 -32 544 -96
WIRE 784 -32 544 -32
@buttercutter
buttercutter / ls
Last active May 21, 2020 06:30
Assembly code of /usr/bin/ls binary
//
// segment_2.1
// Loadable segment [0x0 - 0x350f]
// ram: 00100000-001002a7
//
assume DF = 0x0 (Default)
00100000 7f 45 4c Elf64_Ehdr
46 02 01
01 00 00
00100000 7f db 7Fh e_ident_magi
@buttercutter
buttercutter / yolov4.py
Created May 12, 2020 09:05
YOLOv4
from __future__ import division
import torch
import torch.nn as nn
import torch.nn.functional as F
import numpy as np
from utils.mish import Mish
from utils.utils import build_targets, to_cpu, parse_model_config
@buttercutter
buttercutter / app
Last active May 15, 2020 16:19
Combining two ELF binaries using binary rewriting modification method
//
// segment_2.1
// Loadable segment [0x0 - 0x1b0f] (disabled execute bit)
// ram: 00100000-00100237
//
assume DF = 0x0 (Default)
00100000 7f 45 4c Elf64_Ehdr
46 02 01
01 00 00
00100000 7f db 7Fh e_ident_magi