daveshah1

#!/usr/bin/env python3
import os, sys
import argparse

def main():
    parser = argparse.ArgumentParser(description='Convert VTxx BIN format to NES 2.0 format')
    parser.add_argument('infile', metavar='infile', type=str, nargs=1,
                        help='Input .bin file')
    parser.add_argument('-m', '--mapper', action='store', default=256,
                        help='NES 2.0 mapper number (default: 256)')

daveshah1

[options]
mode prove
depth 50

[engines]
abc pdr

[script]
read_verilog -formal lfsr_equiv.v lfsr_fib.v lfsr_gal.v
prep -top lfsr_equiv -nordff

daveshah1

/dts-v1/;

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "SoMC Maple-ROW(MSM8998 v2.1)";
	compatible = "somc,maple-row", "qcom,msm8998";
	qcom,msm-id = <0x124 0x20001>;
	interrupt-parent = <0x1>;
	qcom,board-id = <0x8 0x0>;