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@larkmjc
larkmjc / riscv-soft-float.h
Created November 3, 2016 03:24
RISC-V Soft Float (unofficial)
/* riscv-soft-float.h */
#ifndef riscv_soft_float_h
#define riscv_soft_float_h
#ifdef __cplusplus
extern "C" {
#endif
/* RV32F */
@larkmjc
larkmjc / riscv.td
Created February 20, 2017 02:59
riscv-meta TableGen output
class u
{
Inst{11-7} = rd;
Inst{31-12} = imm{31-12};
}
class uj
{
Inst{11-7} = rd;
Inst{19-12} = imm{19-12};
@larkmjc
larkmjc / jit-trace.out
Last active March 30, 2017 21:11
example rv-jit trace for test-sha512
$ ./build/darwin_x86_64/bin/rv-jit build/riscv64-unknown-elf/bin/test-sha512 --trace --log-jit-trace
rv-jit-0.0.0-prealpha-0
jit-trace-begin pc=0x000000000001041c
# 0x000000000001041c addi a6, a3, 1
lea r14, qword ptr [r11 + 1]
# 0x0000000000010420 andi a4, a6, 15
mov r12, r14
and r12, 15
@larkmjc
larkmjc / macos-syscall.c
Created April 30, 2017 08:55
simple macos process with no dependency on libsystem.dylib
/*
* cc -Wall -O3 -c macos-syscall.c -o macos-syscall.o
* ld -static -macosx_version_min 10.12 -pagezero_size 0x1000 macos-syscall.o -o macos-syscall
*/
__attribute__ ((visibility("default"))) extern void start(void) asm("start");
#define NR_exit 0x2000001
#define NR_write 0x2000004
@larkmjc
larkmjc / fix-macho-zeropage.c
Created May 3, 2017 23:54
fixes x86-64 mach-o executables with invalid zeropage virtual addresses
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <errno.h>
#include <mach-o/loader.h>
#include <mach-o/swap.h>
#include <mach-o/fat.h>
@larkmjc
larkmjc / riscv-bench-v7
Last active May 11, 2017 09:11
RISC-V to x86 binary translation benchmarks
Runtime (seconds)
RV32 x86-32 RV64 x86-64
meta meta qemu meta meta qemu
interp JIT user native interp JIT user native
primes 11.57 0.59 0.52 0.34 5.07 0.17 0.27 0.11
miniz 32.55 1.58 2.17 0.81 41.52 2.09 2.20 0.76
SHA-512 55.27 2.47 2.74 0.73 23.69 0.70 1.12 0.24
AES 32.75 0.96 1.52 0.37 38.39 1.00 1.61 0.27
@larkmjc
larkmjc / riscv-gcc-strict-operands-v1.patch
Last active May 30, 2017 01:46
strict operands for riscv-gcc - emit addi when operand is not a register
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 73312712d33..cc797b95a3f 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -2786,7 +2786,8 @@ riscv_memmodel_needs_release_fence (enum memmodel model)
'C' Print the integer branch condition for comparison OP.
'A' Print the atomic operation suffix for memory model OP.
'F' Print a FENCE if the memory model requires a release.
- 'z' Print x0 if OP is zero, otherwise print OP normally. */
+ 'z' Print x0 if OP is zero, otherwise print OP normally.
@larkmjc
larkmjc / alias.c
Last active August 1, 2018 15:24
emulating indirect weak aliases with strong direct aliases for Mach-O
#include <stdio.h>
#if HAVE_ALIASES
#define weak_alias(old, new) \
extern __typeof(old) new __attribute__((weak, alias(#old)))
#else
#define weak_alias(old, new) \
@larkmjc
larkmjc / pma.h
Last active October 13, 2020 11:06
Physical Memory Attributes
enum pma_value
{
/* supported memory range types */
pma_type_reserved = 1U<<0, /* illegal region */
pma_type_main = 1U<<1, /* main memory region */
pma_type_io = 1U<<2, /* IO memory region */
/* supported memory range protection */
pma_prot_read = 1U<<3, /* region is readable */
pma_prot_write = 1U<<4, /* region is writable */
@larkmjc
larkmjc / symbolicated-trace.txt
Created July 19, 2017 02:53
symbolicated processor trace
$ rv-sim -S -o build/riscv64-unknown-elf/bin/test-qsort
_start 0000000000000000000 core-0 :0000000000010156 (ffff0197) auipc gp, pc - 65536 gp=0x156
_start+0x4 0000000000000000001 core-0 :000000000001015a (eaa18193) addi gp, gp, -342 gp=0x0
_start+0x8 0000000000000000002 core-0 :000000000001015e (850a ) add a0, zero, sp a0=0x7effffffff50, sp=0x7effffffff50, zero=0x0
_start+0xa 0000000000000000003 core-0 :0000000000010160 (ffff0597) auipc a1, pc - 65536 a1=0x160
_start+0xe 0000000000000000004 core-0 :0000000000010164 (ea058593) addi a1, a1, -352 a1=0x0
_start+0x12 0000000000000000005 core-0 :0000000000010168 (ff017113) andi sp, sp, -16 sp=0x7effffffff50
_start+0x16 0000000000000000006 core-0 :000000000001016c (004000ef) jal ra, pc + 4 ra=0x10170