larryxiao

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print('hello world!')
print('hello world!')
print('hello world!')
print('hello world!')

larryxiao

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larryxiao

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print('hello world!')
print('hello world!')
print('hello world!')
print('hello world!')

larryxiao

Having trouble installing the latest stable version of tmux?

I know, official package for your OS/distro is outdated and you just want the newest version of tmux.

Well, this script should save you some time with that.

Prerequisities

• gcc

larryxiao

#!/bin/bash

# Script for installing tmux on systems where you don't have root access.
# tmux will be installed in $HOME/local/bin.
# It's assumed that wget and a C/C++ compiler are installed.

# exit on error
set -e

TMUX_VERSION=1.8

larryxiao

Having trouble installing the latest stable version of tmux?

I know, official package for your OS/distro is outdated and you just want the newest version of tmux.

Well, this script should save you some time with that.

Prerequisities

• gcc

larryxiao

# decide platform, install basic tools, install customization profile

https://github.com/larryxiao/dotfiles/archive/master.zip

larryxiao

# Performance Monitoring Events for  Generation Intel Core Processors Code Name Knights Corner Core-KNC V4									
# 8/9/2013 7:33:41 AM									
CODE	UMASK	NAME	DESCRIPTION	COMMON	COUNTER	OVERFLOW	OTHER	DEFAULT	EM_TRIGGER
0x00	0x00	DATA_READ	Number of memory data reads which hit the internal data cache (L1). Cache accesses resulting from prefetch instructions are included.	20013	"0,1"	1000003	0x53	0	0
0x01	0x00	DATA_WRITE	Number of memory data writes which hit the internal data cache (L1).	20013	"0,1"	1000003	0x53	0	0
0x02	0x00	DATA_PAGE_WALK	Number of data page walks	20013	"0,1"	1000003	0x53	0	0
0x03	0x00	DATA_READ_MISS	Number of memory read accesses that miss the internal data cache whether or not the access is cacheable or noncacheable. Cache accesses resulting from prefetch instructions are included.	20013	"0,1"	1000003	0x53	0	0
0x04	0x00	DATA_WRITE_MISS	Number of memory write accesses that miss the internal data cache whether or not the access is cacheable or noncacheable	20013	"0,1"	1000003	0x53	0	0
0

larryxiao

#include <string>
#include <iostream>
#include <graphlab.hpp>

struct web_page {
  std::string pagename;
  double pagerank;
  web_page():pagerank(0.0) { }
  explicit web_page(std::string name):pagename(name),pagerank(0.0){ }
  void save(graphlab::oarchive& oarc) const {

larryxiao

module sc_cu (op, func, z, wmem, wreg, regrt, m2reg, aluc, shift,
              aluimm, pcsource, jal, sext);
   input  [5:0] op,func;
   input        z;
   output       wreg,regrt,jal,m2reg,shift,aluimm,sext,wmem;
   output [3:0] aluc;
   output [1:0] pcsource;
   wire r_type = ~|op;
   wire i_add = r_type & func[5] & ~func[4] & ~func[3] &
                ~func[2] & ~func[1] & ~func[0];          //100000