AES GCM hardware acceleration requires both AES-NI
and CLMUL-NI
instructions. The existence of these instructions are indicated by bits 25 and
1 respectively of CPUID (ecx
leaf 1).
The existence of two feature bits raises the concern that they may not both be
present together.
This script uses the instlatx64.atw.hu CPUID database to search for processors that have one of the instruction sets but not both.