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NuttX on Ox64 BL808: PLIC Claim is 0. See https://github.com/lupyuen/nuttx-ox64
[I][]
[I][] ____ ____ __ __ _
[I][] / __ \ | _ \ / _|/ _| |
[I][] | | | |_ __ ___ _ __ | |_) | ___ _ _| |_| |__ _| | ___
[I][] | | | | '_ \ / _ \ '_ \| _ < / _ \| | | | _| _/ _` | |/ _ \
[I][] | |__| | |_) | __/ | | | |_) | (_) | |_| | | | || (_| | | (_) |
[I][] \____/| .__/ \___|_| |_|____/ \___/ \__,_|_| |_| \__,_|_|\___/
[I][] | |
[I][] |_|
[I][]
[I][] Powered by BouffaloLab
[I][] Build:11:52:04,Mar 6 2023
[I][] Copyright (c) 2023 OpenBouffalo team
[I][] Copyright (c) 2022 Bouffalolab team
[I][] dynamic memory init success,heap s[I][LowLoad] D0 start...
[I][LowLoad] low_load start...
[I][LowLoad] Header at 0x5d5ff000
[I][LowLoad] Section dtb(1) - Start 0x5d5ff100, Size 14314
[I][LowLoad] Copying DTB to 0x51ff8000...0x51ffb7ea
[I][LowLoad] Done!
[I][LowLoad] Section OpenSBI(2) - Start 0x5d60f100, Size 109864
[I][LowLoad] Copying OpenSBI to 0x3ef80000...0x3ef9ad28
[I][LowLoad] Done!
[I][LowLoad] Section Kernel(3) - Start 0x5d62f100, Size 315597
[I][LowLoad] Uncompressing Kernel to 0x50000000...
[I][LowLoad] Done!
[I][LowLoad] CRC: 00000000
[I][LowLoad] load time: 61313 us
[I][LowLoad] Setting PMP
[I][LowLoad] Booting OpenSBI at 0x000000003ef80000 with DTB at 0x51ff8000
OpenSBI v1.2
____ _____ ____ _____
/ __ \ / ____| _ \_ _|
| | | |_ __ ___ _ __ | (___ | |_) || |
| | | | '_ \ / _ \ '_ \ \___ \| _ < | |
| |__| | |_) | __/ | | |____) | |_) || |_
\____/| .__/ \___|_| |_|_____/|____/_____|
| |
|_|
Platform Name : Pine64 Ox64 (D0)
Platform Features : medeleg
Platform HART Count : 1
Platform IPI Device : aclint-mswi
Platform Timer Device : aclint-mtimer @ 1000000Hz
Platform Console Device : bflb_uart
Platform HSM Device : ---
Platform PMU Device : ---
Platform Reboot Device : ---
Platform Shutdown Device : ---
Firmware Base : 0x3ef80000
Firmware Size : 200 KB
Runtime SBI Version : 1.0
Domain0 Name : root
Domain0 Boot HART : 0
Domain0 HARTs : 0*
Domain0 Region00 : 0x00000000e4008000-0x00000000e400bfff (I)
Domain0 Region01 : 0x00000000e4000000-0x00000000e4007fff (I)
Domain0 Region02 : 0x000000003ef80000-0x000000003efbffff ()
Domain0 Region03 : 0x0000000000000000-0xffffffffffffffff (R,W,X)
Domain0 Next Address : 0x0000000050000000
Domain0 Next Arg1 : 0x0000000051ff8000
Domain0 Next Mode : S-mode
Domain0 SysReset : yes
Boot HART ID : 0
Boot HART Domain : root
Boot HART Priv Version : v1.11
Boot HART Base ISA : rv64imafdcvx
Boot HART ISA Extensions : time
Boot HART PMP Count : 8
Boot HART PMP Granularity : 4096
Boot HART PMP Address Bits: 38
Boot HART MHPM Count : 8
Boot HART MIDELEG : 0x0000000000000222
Boot HART MEDELEG : 0x000000000000b109
U-Boot 2023.04-rc2 (Mar 06 2023 - 11:48:40 +0000)
DRAM: 64 MiB
Core: 36 devices, 17 uclasses, devicetree: board
MMC: mmc@20060000: 0
Loading Environment from FAT... Unable to read "uboot.env" from mmc0:2...
Loading Environment from nowhere... OK
In: serial@30002000
Out: serial@30002000
Err: serial@30002000
Net:
Warning: emac@20070000 (eth0) using random MAC address - 2e:4e:34:16:c7:f0
eth0: emac@20070000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:2...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
Select the boot mode
1:.Pine64 0X64 Kernel
2:.Sipeed M1SDock Kernel
Enter choice: 1:.Pine64 0X64 Kernel
Retrieving file: /extlinux/../Image
append: root=PARTLABEL=rootfs rootwait rw rootfstype=ext4 console=ttyS0,2000000 loglevel=8 earlycon=sbi
Retrieving file: /extli/bl808-pine64-ox64.dtb
## Flattened Device Tree blob at 51ff8000
Booting using the fdt blob at 0x51ff8000
Working FDT set to 51ff8000
Loading Device Tree to 0000000053f22000, end 0000000053f25fab ... OK
Working FDT set to 53f22000
Starting kernel ...
123jh7110_copy_ramdisk: _edata=0x50400258, _sbss=0x50400290, _ebss=0x50408000, JH7110_IDLESTACK_TOP=0x50408c00
jh7110_copy_ramdisk: ramdisk_addr=0x50410281
jh7110_copy_ramdisk: size=8192000
ABCjh7110_kernel_mappings: map I/O regions
jh7110_kernel_mappings: map PLIC as Interrupt L2
jh7110_kernel_mappings: connect the L1 and Interrupt L2 page tables for PLIC
jh7110_kernel_mappings: map kernel text
jh7110_kernel_mappings: map kernel data
jh7110_kernel_mappings: connect the L1 and L2 page tables
jh7110_kernel_mappings: map the page pool
mmu_satp_reg: pgbase=0x50407000, asid=0x0, reg=0x8000000000050407
mmu_write_satp: reg=0x8000000000050407
nx_start: Entry
up_irqinitialize:
irq_attach: irq=0, isr=0x5020162e
irq_attach: irq=1, isr=0x5020162e
irq_attach: irq=2, isr=0x5020162e
irq_attach: irq=3, isr=0x5020162e
irq_attach: irq=5, isr=0x5020162e
irq_attach: irq=7, isr=0x5020162e
irq_attach: irq=4, isr=0x5020162e
irq_attach: irq=6, isr=0x5020162e
irq_attach: irq=8, isr=0x5020184c
irq_attach: irq=9, isr=0x5020162e
irq_attach: irq=10, isr=0x5020162e
irq_attach: irq=11, isr=0x5020162e
irq_attach: irq=12, isr=0x5020162e
irq_attach: irq=13, isr=0x5020162e
irq_attach: irq=14, isr=0x5020162e
irq_attach: irq=15, isr=0x5020162e
irq_attach: irq=19, isr=0x5020162e
up_irq_enable:
irq_attach: irq=17, isr=0x5020acee
up_enable_irq: irq=17
uart_register: Registering /dev/console
irq_attach: irq=45, isr=0x50200f32
up_enable_irq: irq=45
up_enable_irq: extirq=20, addr=0xe0002080, val=0x1048576
bl602_attach: BL602_UART_INT_STS=0x84
bl602_attach: BL602_UART_INT_MASK=0xfff
bl602_attach: BL602_UART_INT_CLEAR=0x0
bl602_attach: BL602_UART_INT_EN=0xfff
bl602_attach: BL602_UART_FIFO_CONFIG_0=0x80
bl602_attach: BL602_UART_FIFO_CONFIG_0=0x8
UART Registers (0x30002000):
0000 05 17 00 00 01 07 00 00 13 00 13 00 00 00 00 00 ................
0010 70 00 9f 00 6f 00 00 00 0f 00 00 00 00 00 00 00 p...o...........
0020 84 00 00 00 ff 0f 00 00 00 00 00 00 ff 0f 00 00 ................
0030 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0040 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 ................
0050 ff ff 00 00 02 00 00 00 00 00 00 00 00 00 00 00 ................
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0080 80 00 00 00 1c 00 07 07 0a 00 00 00 00 00 00 00 ................
0090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00d0 00 00 00 00 00 00 00 00 ........
PLIC Interrupt Priority (0xe0000004):
0000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0100 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0110 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0120 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0130 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
PLIC Interrupt Pending (0xe0001000):
0000 00 00 00 00 00 00 00 00 ........
PLIC Hart 0 S-Mode Interrupt Enable (0xe0002080):
0000 00 00 10 00 00 00 10 00 ........
PLIC Hart 0 S-Mode Priority Threshold (0xe0201000):
0000 00 00 00 00 00 00 00 00 ........
PLIC Hart 0 S-Mode Claim / Complete (0xe0201004):
0000 00 00 00 00 ....
Interrupt Pending (0xe0001000):
0000 00 00 00 00 00 00 00 00 ........
PLIC Hart 0 M-Mode Interrupt Enable (0xe0002000):
0000 00 00 00 00 00 00 00 00 .......
PLIC Hart 0 M-Mode Priority Threshold (0xe0200000):
0000 07 00 00 00 07 00 00 00 ........
PLIC Hart 0 M-Mode Claim / Complete (0xe0200004):
0000 07 00 00 00 ....
bl602_attach: Set PLIC Interrupt Priority to 1
PLIC Interrupt Priority (0xe0000004):
0000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0040 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 ................
0050 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 ................
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0100 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0110 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0120 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0130 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
PLIC Interrupt Pending (0xe0001000):
0000 00 00 00 00 00 00 00 00 ........
work_start_lowpri: Starting low-priority kernel worker thread(s)
nx_start_application: Starting init task: /system/bin/init
up_addrenv_create: textsize=0x15b80, datasize=0x584, heapsize=0x80000, addrenv=0x5040d560
mmu_satp_reg: pgbase=0x50600000, asid=0x0, reg=0x8000000000050600
up_addrenv_select: addrenv=0x5040d560, satp=0x8000000000050600
mmu_write_satp: reg=0x8000000000050600
elf_symname: Symbol has no name
elf_symvalue: SHN_UNDEF: Failed to get symbol name: -3
elf_relocateadd: Section 2 reloc 2: Undefined symbol[0] has no name: -3
up_exit: TCB=0x5040a900 exiting
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
riscv_dispatch_irq: Do irq=8
NuttShell (NSH) NuttX-12.0.3
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
riscv_dispatch_irq: irq=25, claim=0
riscv_dispatch_irq: *0xe0201004=0
PLIC Interrupt Pending (0xe0001000):
0000 00 00 10 00 00 00 10 00 ........
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