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@michaeljclark
michaeljclark / riscv-bench-v5
Last active April 29, 2017 03:59
RISC-V to x86 binary translation benchmarks
Runtime (seconds)
RV32 x86-32 RV64 x86-64
meta meta qemu meta meta qemu
interp JIT user native interp JIT user native
primes 11.57 0.65 0.52 0.34 5.07 0.23 0.27 0.11
miniz 32.55 1.51 2.17 0.81 41.52 2.21 2.20 0.76
SHA-512 55.27 2.51 2.74 0.73 23.69 0.72 1.12 0.24
AES 32.75 1.09 1.52 0.37 38.39 1.32 1.61 0.27
@michaeljclark
michaeljclark / jit-trace.out
Last active March 30, 2017 21:11
example rv-jit trace for test-sha512
$ ./build/darwin_x86_64/bin/rv-jit build/riscv64-unknown-elf/bin/test-sha512 --trace --log-jit-trace
rv-jit-0.0.0-prealpha-0
jit-trace-begin pc=0x000000000001041c
# 0x000000000001041c addi a6, a3, 1
lea r14, qword ptr [r11 + 1]
# 0x0000000000010420 andi a4, a6, 15
mov r12, r14
and r12, 15
@michaeljclark
michaeljclark / riscv-linux-dynamic-register-usage
Created March 5, 2017 22:09
RISC-V Linux Dynamic Register Usage
$ git clone https://github.com/michaeljclark/riscv-meta.git
$ cd riscv-meta/
$ git submodule update --init --recursive
$ make -j4 && sudo make install
$ rv-sys -H build/riscv64-unknown-elf/bin/bbl
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvvvvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvv
@michaeljclark
michaeljclark / riscv.td
Created February 20, 2017 02:59
riscv-meta TableGen output
class u
{
Inst{11-7} = rd;
Inst{31-12} = imm{31-12};
}
class uj
{
Inst{11-7} = rd;
Inst{19-12} = imm{19-12};
@michaeljclark
michaeljclark / riscv-soft-float.h
Created November 3, 2016 03:24
RISC-V Soft Float (unofficial)
/* riscv-soft-float.h */
#ifndef riscv_soft_float_h
#define riscv_soft_float_h
#ifdef __cplusplus
extern "C" {
#endif
/* RV32F */
@michaeljclark
michaeljclark / keybase.md
Created October 5, 2016 19:05

Keybase proof

I hereby claim:

  • I am michaeljclark on github.
  • I am michaeljclark (https://keybase.io/michaeljclark) on keybase.
  • I have a public key whose fingerprint is 7C99 930E B17C D8BA 073D 5EFA 6BF1 D7B3 57EF 3E4F

To claim this, I am signing this object:

@michaeljclark
michaeljclark / type-uj-imm-bit-gather-scatter.tex
Last active June 6, 2016 00:44
Type-UJ Immediate Bit Gather Scatter
\documentclass{report}
\usepackage[letterpaper, portrait, margin=0.5in]{geometry}
\usepackage[utf8]{inputenc}
\usepackage{tikz}
\begin{document}
\bf{Type-UJ}
\begin{tikzpicture}[fill=blue!20,scale=0.5]
\begin{scope}[every node/.style={font=\scriptsize}]
@michaeljclark
michaeljclark / riscv-imm.s
Created February 28, 2016 07:14
test_cb:
sll a1,a0,1
srl a3,a0,2
and a1,a1,192
sll a4,a0,3
srl a2,a0,4
srl a5,a0,7
and a3,a3,6
or a3,a1,a3
and a0,a2,256
@michaeljclark
michaeljclark / riscv-imm.cc
Last active October 17, 2022 00:47
RISC-V Immediate Decoder Template Metaprogram
/*
* RISC-V Immediate Decoder Template Metaprogram
*
* Author: Michael Clark <[email protected]>
*/
#include <cstdio>
#include <cstdint>
/* sign extension template */