Against xpumd/receiver/intelxpu/semantics.md at 9770382. Section headings below match
that document. Examples are one MI300X: 8 XCD dies, 8 HBM3 stacks, 8 XCP partitions,
7 XGMI links to peer GPUs, PCIe Gen5 x16 to the host.
Where AMD agrees, it says so briefly. The substance is in the three open questions and the four gaps at the end.