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Daniel Sokil s0kil

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s0kil / concurrent_port_scanner.hs
Created April 18, 2022 09:50 — forked from xandkar/concurrent_port_scanner.hs
Concurrent port scanner in Haskell
-- http://blog.moertel.com/articles/2004/03/13/concurrent-port-scanner-in-haskell
module Main (main) where
import Control.Concurrent
import Control.Exception
import Data.Maybe
import Network
import Network.BSD
import System.Environment
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s0kil / scar_tissue.md
Created May 28, 2023 01:55 — forked from gtallen1187/scar_tissue.md
talk given by John Ousterhout about sustaining relationships

"Scar Tissues Make Relationships Wear Out"

04/26/2103. From a lecture by Professor John Ousterhout at Stanford, class CS142.

This is my most touchy-feely thought for the weekend. Here’s the basic idea: It’s really hard to build relationships that last for a long time. If you haven’t discovered this, you will discover this sooner or later. And it's hard both for personal relationships and for business relationships. And to me, it's pretty amazing that two people can stay married for 25 years without killing each other.

[Laughter]

> But honestly, most professional relationships don't last anywhere near that long. The best bands always seem to break up after 2 or 3 years. And business partnerships fall apart, and there's all these problems in these relationships that just don't last. So, why is that? Well, in my view, it’s relationships don't fail because there some single catastrophic event to destroy them, although often there is a single catastrophic event around the the end of the relation

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s0kil / BeagleBoneBlack-Research.md
Created January 6, 2024 19:15 — forked from X3msnake/BeagleBoneBlack-Research.md
Antminer Beaglebone S5 - hack to use linux research
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s0kil / 01-zynq-uart-exploit.md
Created January 6, 2024 19:17 — forked from four0four/01-zynq-uart-exploit.md
Zynq BootROM Secrets: BootROM dump exploit

Zynq BootROM Secrets: Exposing the bootROM with the UART loader

Last time I wrote about this, I lied a little - There is an interesting bug in the UART loader, and it may have been exactly why Xilinx didn't document it. In short: The UART loader writes the entire UART payload to a location in memory (nominally 0x4_0000). The ROM is architected such that when the boot mode is selected, it registers a callback that is called when the ROM wants more data from the boot device. For the UART loader, this is pretty simple - here's the whole thing:

; void uart_callback(u32 r0_offset, void* r1_dest, i32 r2_nbytes)
ROM:0000A578 PUSH            {R3,LR}
ROM:0000A57C MOV             R3, #uart_buff
ROM:0000A584 MOV             R12, #1
ROM:0000A588 LDR             R3, [R3]