shirriff

#!/usr/bin/python

""" Download an IR remote signal from a Rigol DS1052E and
analyze it for a NEC protocol signal.

Ken Shirriff
http://righto.com
""" 
import array
import sys

shirriff

 // This DTS overlay sets up one input and one output pin for use by  
 // PRU0 via its Enhanced GPIO mode, which will let us access those pins  
 // by writing to R30 bit 15 or reading from R31 bit 14.  
   
 // Save this file wherever you want (but I recommend /lib/firmware), as  
 // "PRU-GPIO-EXAMPLE-00A0.dts".
   
 // Compile with:
 // dtc -O dtb -I dts -o /lib/firmware/PRU-GPIO-EXAMPLE-00A0.dtbo -b 0 -@ PRU-GPIO-EXAMPLE-00A0.dts  
   

shirriff

; blink.p: demonstration of PRU on the BeagleBone Black
; blink LED connected to P8_11 ten times
.origin 0
.entrypoint TOP
TOP:
  MOV r1, 10 ; blink counter
BLINK:
  SET r30, r30, 15 ; set GPIO output 15
  MOV r0, 0x00a00000 ; delay counter
DELAY:

shirriff

// Loads a PRU text.bin (and optionally data.bin) file,
// executes it, and waits for completion.
//
// Usage:
// $ ./loader text.bin [data.bin]
//
// Compile with:
// gcc -o loader loader.c -lprussdrv
//
// Based on https://credentiality2.blogspot.com/2015/09/beaglebone-pru-gpio-example.html

shirriff

/*
 * blink demo: blink LED ten times
 * LED should be connected to P8_11 (pr1_pru0_pru_r30_15)
 *
 */
volatile register unsigned int __R31, __R30;

int main(void) {
    unsigned int loops, delay;
    for (loops = 0; loops < 10; loops++) {

shirriff

-b
-image

ROMS {
  PAGE 0:
    text: o = 0x0, l = 0x1000, files={text.bin}
  PAGE 1:
    data: o = 0x0, l = 0x1000, files={data.bin}
}

shirriff

// Loads a PRU text.bin (and optionally data.bin) file,
// executes it, and waits for completion.
// This version enables interrupt event 15 (ecap timer)
//
// Usage:
// $ ./loader text.bin [data.bin]
//
// Compile with:
// gcc -o loader loader.c -lprussdrv
//

shirriff

/*
 * Demonstration of the BeagleBone's PRU, using a timer.
 * Ken Shirriff, http://righto.com
 */
#include <stdint.h>

#define DELAY_NS 100 // Use 500000000 for 0.5 second delay
#define WRITE_PIN 15 /* P8_11, Ethernet output data, pr1_PRU0_pru_r30_15 */

// PRU Interrupt control registers

shirriff

get "streams.d"
external
[
Ws;
Wns;
MulFull;
DoubleAdd;
keys;
Gets;
]

shirriff

import re

data="""\
10100001 10010011 01100011  => 01110111
  10100001 10010011 01100100  => 01110001
  10100001 10010011 01100101  => 01110000
  10100001 10010011 01100110  => 01110010
  10100001 10010011 01100111  => 01110011
  10100001 10010011 01101000  => 01111001
  10100001 10010011 01101001  => 01111000