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@shafik
shafik / WhatIsStrictAliasingAndWhyDoWeCare.md
Last active December 25, 2025 23:54
What is Strict Aliasing and Why do we Care?

What is the Strict Aliasing Rule and Why do we care?

(OR Type Punning, Undefined Behavior and Alignment, Oh My!)

What is strict aliasing? First we will describe what is aliasing and then we can learn what being strict about it means.

In C and C++ aliasing has to do with what expression types we are allowed to access stored values through. In both C and C++ the standard specifies which expression types are allowed to alias which types. The compiler and optimizer are allowed to assume we follow the aliasing rules strictly, hence the term strict aliasing rule. If we attempt to access a value using a type not allowed it is classified as undefined behavior(UB). Once we have undefined behavior all bets are off, the results of our program are no longer reliable.

Unfortunately with strict aliasing violations, we will often obtain the results we expect, leaving the possibility the a future version of a compiler with a new optimization will break code we th

@AndyShiue
AndyShiue / CuTT.md
Last active December 15, 2025 22:51
Cubical type theory for dummies

I think I’ve figured out most parts of the cubical type theory papers; I’m going to take a shot to explain it informally in the format of Q&As. I prefer using syntax or terminologies that fit better rather than the more standard ones.

Q: What is cubical type theory?

A: It’s a type theory giving homotopy type theory its computational meaning.

Q: What is homotopy type theory then?

A: It’s traditional type theory (which refers to Martin-Löf type theory in this Q&A) augmented with higher inductive types and the univalence axiom.

@kentonv
kentonv / SCM_RIGHTS.md
Last active June 24, 2025 06:41
SCM_RIGHTS API quirks

As tested on Linux:

  • An SCM_RIGHTS ancillary message is "attached" to the range of data bytes sent in the same sendmsg() call.
  • However, as always, recvmsg() calls on the receiving end don't necessarily map 1:1 to sendmsg() calls. Messages can be coalesced or split.
  • The recvmsg() call that receives the first byte of the ancillary message's byte range also receives the ancillary message itself.
  • To prevent multiple ancillary messages being delivered
@f0r34chb3t4
f0r34chb3t4 / keys.txt
Created April 9, 2019 16:42
Proxifier.txt
Portable Version KEYS:
P6Z3T-UYJC9-YAK3F-APN9M-6ZDSD
FGZPK-93CWX-Q33Y6-D5URV-YXC3X
9CZQX-9YAQA-PF33L-XVUQH-NSD48
8RZ3L-H3Y5L-W2RY5-Z5M8N-C7Z2U
CCZNU-LW3LF-K9V2T-MYZFF-94667
EWZM6-3W4UX-KH922-C96GK-VGBH2
Standard Version KEYS:
4AZNW-S2YHE-LLMWM-J6EL8-7QKDL

Delving into the why's of AXI

**Note: In all below, slave can also mean interconnect

  • Do we really need back-pressure?
    • Yes, you absolutely need backpressure. What happens when two masters want to access the same slave? One has to be blocked for some period of time. Some slaves may only be able to handle a limited number of concurrent operations and take some time to produce a result. As such, backpressure is required.
    • B and R channel backpressure is required in the case of contention towards the master. If a master makes burst read requests against two different slaves, one of them is gonna have to wait.
      • Shouldn't a master be prepared to receive the responses for any requests it issues from the moment it makes the request? Aside from the clock crossing issue someone else brought up, and the interconnect issue at the heart of the use of IDs, why should an AXI master ever stall R or B channels?
  • The master should be prepared, but it only has one R and one B input, so it can't re
@sekcompsci
sekcompsci / Comparison Espressif ESP MCUs.md
Last active October 26, 2025 11:39 — forked from fabianoriccardi/Comparison Espressif ESP MCUs.md
Comparison chips (SoCs) table for ESP8266/ESP32/ESP32-S2/ESP32-S3/ESP32-C3/ESP32-C6. Forked from @fabianoriccardi

Comparison chips (SoCs) table for ESP8266/ESP32/ESP32-S2/ESP32-S3/ESP32-C3/ESP32-C6

A minimal table to compare the Espressif's MCU families.

ESP8266 ESP32 ESP32-S2 ESP32-S3 ESP32-C3 ESP32-C6
Announcement Date 2014, August 2016, September 2019, September 2020, December
@veekaybee
veekaybee / normcore-llm.md
Last active December 25, 2025 23:35
Normcore LLM Reads

Anti-hype LLM reading list

Goals: Add links that are reasonable and good explanations of how stuff works. No hype and no vendor content if possible. Practical first-hand accounts of models in prod eagerly sought.

Foundational Concepts

Screenshot 2023-12-18 at 10 40 27 PM

Pre-Transformer Models