Created
January 17, 2021 14:58
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void delay1(volatile uint32_t delay) { | |
while (delay--); | |
} | |
int main(void) { | |
rcc_init(); | |
// LED - PD13 | |
RCC->AHB1ENR |=RCC_AHB1ENR_GPIODEN; | |
// set 0b01 (General output) | |
GPIOD->MODER |= GPIO_MODER_MODE13_0; | |
GPIOD->OTYPER &= ~GPIO_OTYPER_OT13; | |
GPIOD->OSPEEDR |= (GPIO_OSPEEDR_OSPEED13_0 | GPIO_OSPEEDR_OSPEED13_1); | |
while(1) { | |
GPIOD->ODR |= GPIO_ODR_ODR_13; | |
delay1(168000000); | |
// OFF LED | |
GPIOD->ODR &= ~GPIO_ODR_ODR_13; | |
delay1(168000000); | |
} | |
return 0; | |
} |
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void rcc_init() { | |
// HSE is enabled | |
RCC->CR |= RCC_CR_HSEON; | |
while( !(RCC->CR & RCC_CR_HSERDY) ) {}; | |
// HSE is PLL source | |
RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE; | |
RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLP; | |
// set PLL P prescaler (0b00 = 2) | |
// clear PLL N | |
RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLN); | |
// set PLL N (0b101010000 = 336) | |
RCC->PLLCFGR |= (RCC_PLLCFGR_PLLN_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_8); | |
// clear PLL M | |
RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLM); | |
// set PLL M prescaler (0b001000 = 8) | |
RCC->PLLCFGR |= RCC_PLLCFGR_PLLM_3; | |
// AHB Prescaler (not divided) | |
RCC->CFGR &= ~(RCC_CFGR_HPRE); | |
RCC->CFGR |= RCC_CFGR_HPRE_DIV1; | |
//APB1 Prescaler (divide by 4) | |
RCC->CFGR &= ~(RCC_CFGR_PPRE1); | |
RCC->CFGR |= RCC_CFGR_PPRE1_DIV4; | |
//APB2 Prescaler (divide by 2) | |
RCC->CFGR &= ~(RCC_CFGR_PPRE2); | |
RCC->CFGR |= RCC_CFGR_PPRE2_DIV2; | |
//PLL enable | |
RCC->CR |= RCC_CR_PLLON; | |
// Wait PLL is ready | |
while((RCC->CR & RCC_CR_PLLRDY) == 0) {} ; | |
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS; | |
//PLL System | |
RCC->CFGR &= ~RCC_CFGR_SW; | |
RCC->CFGR |= RCC_CFGR_SW_PLL; | |
while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {}; | |
} |
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