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Created April 5, 2024 21:59
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QingKe RISC-V XW opcode encoding
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notes.md

WCH QingKe RISC-V XW extension opcode encoding

This has been reverse engineered from the toolchain only and has not been tested on hardware.

The c.lbu, c.lhu, c.sb, and c.sh opcodes replace some standard opcodes (that the QingKe cores do not implement, as the replaced opcodes require the D extension), and they also appear to be compatible with "Huawei" extensions mentioned here.

The c.lbusp, c.lhusp, c.sbsp, and c.shsp opcodes exist in a "reserved" opcode block.

001 uimm[0] uimm[4:3] rs1` uimm[2:1] rd`  00			c.lbu		(replacing c.fld)
100 00      uimm[3:0]             00 rd`  00			c.lbusp
100 00      uimm[3:1] uimm[4]     01 rd`  00			c.lhusp
100 00      uimm[3:0]             10 rs2` 00			c.sbsp
100 00      uimm[3:1] uimm[4]     11 rs2` 00			c.shsp
101 uimm[0] uimm[4:3] rs1` uimm[2:1] rs2` 00			c.sb		(replacing c.fsd)
001         uimm[5:3] rs1` uimm[2:1] rd`  10			c.lhu		(replacing c.fldsp)
101         uimm[5:3] rs1` uimm[2:1] rs2` 10			c.sh		(replacing c.fsdsp)
@wangpc-pp
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So these is a lot like ratified Zcb?

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