Created
April 14, 2014 18:49
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diff --git a/lib/Transforms/InstCombine/InstCombineCalls.cpp b/lib/Transforms/InstCombine/InstCombineCalls.cpp | |
index 0bc3ac7..e0bd6b5 100644 | |
--- a/lib/Transforms/InstCombine/InstCombineCalls.cpp | |
+++ b/lib/Transforms/InstCombine/InstCombineCalls.cpp | |
@@ -554,6 +554,51 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { | |
break; | |
} | |
+ // Constant fold <A x Bi> << Ci. | |
+ case Intrinsic::x86_sse2_psll_d: | |
+ case Intrinsic::x86_sse2_psll_dq: | |
+ case Intrinsic::x86_sse2_psll_dq_bs: | |
+ case Intrinsic::x86_sse2_psll_q: | |
+ case Intrinsic::x86_sse2_psll_w: | |
+ case Intrinsic::x86_sse2_pslli_d: | |
+ case Intrinsic::x86_sse2_pslli_q: | |
+ case Intrinsic::x86_sse2_pslli_w: | |
+ case Intrinsic::x86_avx2_psll_d: | |
+ case Intrinsic::x86_avx2_psll_dq: | |
+ case Intrinsic::x86_avx2_psll_dq_bs: | |
+ case Intrinsic::x86_avx2_psll_q: | |
+ case Intrinsic::x86_avx2_psll_w: | |
+ case Intrinsic::x86_avx2_pslli_d: | |
+ case Intrinsic::x86_avx2_pslli_q: | |
+ case Intrinsic::x86_avx2_pslli_w: | |
+ case Intrinsic::x86_avx512_psll_dq: | |
+ case Intrinsic::x86_avx512_psll_dq_bs: { | |
+ // Simplify if count is constant. To 0 if > BitWidth, otherwise to shl. | |
+ auto CDV = dyn_cast<ConstantDataVector>(II->getArgOperand(1)); | |
+ auto CInt = dyn_cast<ConstantInt>(II->getArgOperand(1)); | |
+ if (!CDV && !CInt) | |
+ break; | |
+ ConstantInt *Count; | |
+ if (CDV) | |
+ Count = cast<ConstantInt>(CDV->getElementAsConstant(0)); | |
+ else | |
+ Count = CInt; | |
+ | |
+ auto Vec = II->getArgOperand(0); | |
+ auto VT = cast<VectorType>(Vec->getType()); | |
+ if (Count->getZExtValue() > | |
+ VT->getElementType()->getPrimitiveSizeInBits() - 1) | |
+ return ReplaceInstUsesWith( | |
+ CI, ConstantAggregateZero::get(Vec->getType())); | |
+ else { | |
+ unsigned VWidth = VT->getNumElements(); | |
+ // Get a constant vector of the same type as the first operand. | |
+ auto VTCI = ConstantInt::get(VT->getElementType(), Count->getZExtValue()); | |
+ return BinaryOperator::CreateShl( | |
+ Vec, Builder->CreateVectorSplat(VWidth, VTCI)); | |
+ } | |
+ break; | |
+ } | |
case Intrinsic::x86_sse41_pmovsxbw: | |
case Intrinsic::x86_sse41_pmovsxwd: | |
diff --git a/test/Transforms/InstCombine/vec_demanded_elts.ll b/test/Transforms/InstCombine/vec_demanded_elts.ll | |
index d12412a..cb62fc6 100644 | |
--- a/test/Transforms/InstCombine/vec_demanded_elts.ll | |
+++ b/test/Transforms/InstCombine/vec_demanded_elts.ll | |
@@ -209,4 +209,22 @@ define <4 x float> @test_select(float %f, float %g) { | |
ret <4 x float> %ret | |
} | |
+define <4 x i32> @test_pslli_s() nounwind { | |
+entry: | |
+; Constant fold. | |
+; CHECK: test_pslli_s | |
+; CHECK: <i32 0, i32 2, i32 4, i32 6> | |
+ %0 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 1) | |
+ ret <4 x i32> %0 | |
+} | |
+ | |
+define <4 x i32> @test_pslli_l() nounwind { | |
+entry: | |
+; Constant 0 | |
+; CHECK: test_pslli_l | |
+; CHECK: zeroinitializer | |
+ %0 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 32) | |
+ ret <4 x i32> %0 | |
+} | |
+declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32) |
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