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Specification of the IN8 (inate) 8-bit CPU
Registers
{ Named registers implemented by the IN8 CPU.
A, B - Accumulator
C, D, E - Scratch
H, L - Scratch, and memory access
IP - Special 16-bit instruction pointer
SP - Special 16-bit stack pointer
O - Read-only overflow register
HL - A virtual register formed by interpretting H and L as a single 16-bit value.
* Encodable operands
Encoding Name Purpose
000 A Accumulator
001 B Accumulator
010 C Scratch
011 D Scratch
100 E Scratch
101 H High-byte of a memory address
110 L Low-byte of a memory address
111 N Next-word. Not valid for instructions that write.
}
Instruction Encoding for basic instructions
{ The manner in which instructions are encoded into 8 bits
Paired operand instructions are the set that take 2 operands.
Paired operand instructions can refer to 4 registers in a given operand.
The first operand is always either A or B.
The second operand is any of A, B, C, D, E, H, L, or N.
[0000] [0] [000]
| | L--- Second operand
| L--- First operand
L--- Instruction code
Single operand instructions are the set that takes only 1 operand.
Single operand instructions can refer to all 8 registers.
[00000] [000]
| L--- Operand - See operand encoding table
L--- Instruction code
}
Instruction table
{ Every instruction implemented on the IN8 CPU.
Count Binary Mnemonic Purpose
16 0000 [0] [000] MTA 1 2 Copy 1 to 2.
16 0001 [0] [000] MFA 1 2 Copy 1 to 2, unless 2 is N.
* Notice that in MTA, the target is encoded first, even though it is the second argument.
* In an assembler, 'MOV 1, 2' can be used, though A or B must always appear as an argument.
* Since MFA cannot have a second operand of N, the encoding of that instruction is available.
0001 [0] [111] NOT 1 Perform a binary not operation on 1.
* Some instructions become non-operations and their encoding can be reused for other instructions.
0000 [0] [000] CAL Interpret HL as an address, push the IP to the stack, jump to HL. Replaces MTA A A
0000 [1] [001] RET Pop two words from the stack to HL, jump to HL. Replaces MTA B B
0001 [0] [000] Replaces MFA A A
0001 [1] [001] Replaces MFA B B
* In all math operators, the result is stored in 2.
* In most cases, the accumulator operand is the second argument, but is encoded first.
* Math operations also set the overflow register.
16 0010 [0] [000] ADD 2 1 Add 2 to 1.
16 0011 [0] [000] SUB 2 1 Subtract 2 from 1.
16 0100 [0] [000] MUL 2 1 Multiply 2 by 1.
16 0101 [0] [000] DIV 1 2 Divide 1 by 2.
16 0110 [0] [000] MOD 1 2 Divide 1 by 2 and store the remainder in 1.
16 0111 [0] [000] AND 2 1 Perform a binary and between 2 and 1.
16 1000 [0] [000] BOR 2 1 Perform a binary or between 2 and 1.
16 1001 [0] [000] XOR 2 1 Perform a binary xor between 2 and 1.
* No-op math operations give us 4 more spots to fill in with useful operations.
0111 [0] [000] OVA Store O in A Replaces AND A A (Result is always A)
0111 [1] [001] OVB Store O in B Replaces AND B B (Result is always B)
1000 [0] [000] MUS Multiply A by B, store the result in B; treat both as signed. Replaces BOR A A (Result is always A)
1000 [1] [001] DIS Divide A by B, store the result in B; treat both as signed. Replaces BOR B B (Result is always B)
*XOR cannot be replaced: XOR A A is always equal to 0 but not always equal to A. Though, it makes little sense and may be replaced in
desperation. Code using it can replace XOR A A with MTA A 0.
* SP encodes the stack pointer. The stack grows downwards from the end of memory space.
8 10100 [000] PSH 1 Push 1 to the stack, decrement SP.
8 10101 [000] POP 1 Copy the top value on the stack to 1, increment SP, unless 1 is N.
8 10110 [000] PEK 1 Copy the value on the top of the stack to 1, unless 1 is N.
* Since POP and PEK can't write to N, reuse their encodings for some other stack-related instructions.
10101 [111] RSP Load the value of SP into HL.
10110 [111] SSP Set the value of SP from HL.
* Instructions for loading and storing to ram.
8 10111 [000] LOD 1 Interpret HL as a 16-bit memory address and load the value from that address into 1, unless 1 is N.
8 11000 [000] STR 1 Interpret HL as a 16-bit memory address and store the value of 1 into that address.
* LOD can't write to N. Use it for a two-word literal load to HL
10111 [111] LLT Read the next two words in the code stream into HL.
* This block contains hardware handling instructions, Fetching the overflow register, and non-branching jumps.
1 11001 [000] HWN Store the count of hardware devices attached in A
1 11001 [001] HWI Send an interrupt to a piece of hardware with ID stored in A.
Attached hardware will interpret register values and memory as it sees fit.
1 11001 [010] STP Stop execution immediately.
1 11001 [011]
1 11001 [100] SWP Swap the value of D with H and E with L. This allows the easy manipulation of two memory pointers.
1 11001 [101] RIP Load the value of IP into HL.
1 11001 [110] JMP Interpret HL as a 16-bit memory address and jump to it.
1 11001 [111] JPL Interpret the next two words in the code stream as an address and jump to it.
* Branching functions
* Each will jump to the location stored in HL if it's condition is true.
1 11010 [000] BIE A equals B
1 11010 [001] BNE A does not equal B
1 11010 [010] BGT A is greater than B
1 11010 [011] BLT A is less than B
1 11010 [100] BEG A is equal to or greater than B
1 11010 [101] BEL A is equal to or less than B
1 11010 [110] BSL A is less than B, treated as signed bytes
1 11010 [111] BSG A is greater than B, treated as signed bytes
* These instructions make working with the HL virtual register easier.
* They also mean that HL can be used for 16 bit addition and subtraction.
8 11011 [000] CAD 1 Add 1 to L, carrying overflow into H
8 11100 [000] CSB 1 Subtract 1 from L, pulling overflow from H
* These instructions make working with the stack easier.
8 11101 [000] ADS 1 Add 1 to SP
8 11110 [000] SBS 1 Subtract 1 from SP
8 11111 [000]
}
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