ChristophHaag

--------- beginning of /dev/log/main
E/Resize  (   94): size for emmc@data is 14325376K.
E/Resize  (   94): size in superblock is 14324352K.
E/Resize  (   94): size will (maybe) resize to(after adjust) is 14324352K.
I/Resize  (   94): The size of data already meet the request(size in superblock = size after adjust).
I/Resize  (   94): Partition has been resized,so nothing to do!
E/ccci_mdinit(0)(  127): md_init ver:1.10
E/ccci_mdinit(0)(  126): md_init ver:1.10
E/NVRAM   (  157): Haman, serviceManager work well
E/ccci_fsd(0)(  125): md_fsd Ver:v2.01, CCCI Ver:2

ChristophHaag

Starting program: /usr/bin/glxgears 
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/usr/lib/libthread_db.so.1".

Program received signal SIGSEGV, Segmentation fault.
0x00007ffff34becaf in get_stencil_miptree (irb=0x794990) at brw_misc_state.c:227
227	   if (irb->mt->stencil_mt)
#0  0x00007ffff34becaf in get_stencil_miptree (irb=0x794990) at brw_misc_state.c:227
No locals.
#1  0x00007ffff34bed68 in brw_workaround_depthstencil_alignment (brw=0x7ffff7fa3040, clear_mask=18) at brw_misc_state.c:243

ChristophHaag

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Initializing cgroup subsys cpuset
[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Initializing cgroup subsys cpuacct
[    0.000000] Linux version 4.4.0-1-ARCH (alarm@alarm) (gcc version 5.3.0 (GCC) ) #1 SMP Thu Jan 14 10:36:04 CET 2016
[    0.000000] CPU: ARMv7 Processor [413fc0f3] revision 3 (ARMv7), cr=30c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] Machine model: HP Chromebook 14
[    0.000000] cma: Reserved 24 MiB at 0x00000000fc000000
[    0.000000] Forcing write-allocate cache policy for SMP

ChristophHaag

Module                  Size  Used by
nouveau              1596126  0
ttm                    95136  1 nouveau
hidp                   15436  0
mwifiex_sdio           27629  0
bq24735_charger         4991  0
cmac                    3111  2
rfcomm                 38293  12
snd_hda_codec_hdmi     41816  1
snd_soc_tegra30_i2s     6835  2

ChristophHaag

diff --git a/src/linux-4.4/arch/arm/boot/dts/tegra124-nyan-big.dts b/src/linux-4.4/arch/arm/boot/dts/tegra124-nyan-big.dts
index 2d21253..ecc28f6 100644
--- a/src/linux-4.4/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/src/linux-4.4/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -26,6 +26,11 @@
 		nvidia,model = "GoogleNyanBig";
 	};
 
+        gpu@0,57000000 {
+                vdd-supply = <&vdd_gpu>;

ChristophHaag

# Maintainer: Carsten DL1CAF <archlinux at carstenfeuls dot de>
# Submitter: Mike WB2FKO <mph at sportscliche dot com>
# Contributor: minorsecond <minorsecond at gmail dot com>
pkgname=wspr-svn
pkgver=r6407
pkgrel=1
pkgdesc="Weak Signal Propagation Reporter"
arch=('x86_64' 'i686' 'armv5h' 'armv6h' 'armv7h')
url="http://physics.princeton.edu/pulsar/K1JT/wspr.html"
license=('GPL')

ChristophHaag

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Initializing cgroup subsys cpuset
[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Initializing cgroup subsys cpuacct
[    0.000000] Linux version 4.4.0-1-ARCH (alarm@alarm) (gcc version 5.3.0 (GCC) ) #1 SMP Wed Jan 20 19:39:53 CET 2016
[    0.000000] CPU: ARMv7 Processor [413fc0f3] revision 3 (ARMv7), cr=30c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] Machine model: Acer Chromebook 13 CB5-311
[    0.000000] cma: Reserved 24 MiB at 0x00000000fc000000
[    0.000000] Forcing write-allocate cache policy for SMP

ChristophHaag

-- Logs begin at Mo 2016-01-11 15:14:25 CET, end at Do 2016-01-21 01:47:44 CET. --
Jan 20 21:18:00 alarm kernel: Booting Linux on physical CPU 0x0
Jan 20 21:18:00 alarm kernel: Initializing cgroup subsys cpuset
Jan 20 21:18:00 alarm kernel: Initializing cgroup subsys cpu
Jan 20 21:18:00 alarm kernel: Initializing cgroup subsys cpuacct
Jan 20 21:18:00 alarm kernel: Linux version 4.4.0-1-ARCH (alarm@alarm) (gcc version 5.3.0 (GCC) ) #1 SMP Wed Jan 20 19:39:53 CET 2016
Jan 20 21:18:00 alarm kernel: CPU: ARMv7 Processor [413fc0f3] revision 3 (ARMv7), cr=30c5387d
Jan 20 21:18:00 alarm kernel: CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
Jan 20 21:18:00 alarm kernel: Machine model: Acer Chromebook 13 CB5-311
Jan 20 21:18:00 alarm kernel: cma: Reserved 24 MiB at 0x00000000fc000000

ChristophHaag

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.5.0-rc1-1-ARCH (alarm@alarm) (gcc version 5.3.0 (GCC) ) #2 SMP Fri Jan 29 00:57:39 CET 2016
[    0.000000] CPU: ARMv7 Processor [413fc0f3] revision 3 (ARMv7), cr=30c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] Machine model: Acer Chromebook 13 CB5-311
[    0.000000] cma: Reserved 24 MiB at 0x00000000fc000000
[    0.000000] Forcing write-allocate cache policy for SMP
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] On node 0 totalpages: 1040362

ChristophHaag

===========
VULKAN INFO
===========

Vulkan API Version: 1.0.3

INFO: [loader] Code 0 : Found manifest file //etc/vulkan/icd.d/intel_icd.json, version "1.0.0"
Instance Extensions and layers:
===============================
Instance Extensions	count = 4