https://hhuysqt.github.io/zynq1/ CHinese hello world
https://programmersought.com/article/43024210515/ English translation?
https://www.jianshu.com/p/b83c663ecaaa chinese blog on the board
https://embed-me.com/ebaz4205-recycle-cheap-crypto-miner-part-1/ English repurpose blog
https://hackaday.com/2020/12/10/a-xilinx-zynq-linux-fpga-board-for-under-20-the-windfall-of-decommissioned-crypto-mining/ hackaday article (with some of the resources in the comment section)
https://github.com/xjtuecho/EBAZ4205 nice github collection of files and such
https://github.com/Leungfung/ebaz4205_hw CHinese
https://github.com/Elrori/EBAZ4205 Board design?
https://github.com/gameltb/EBAZ4205/ Xilinx project files and PetaLinux
https://github.com/blkf2016/ebaz4205 Uboot and sources
https://github.com/KarolNi/S9miner_sample Some example projects
The stock board seems to boot from NAND as intended by the designers. it does not power from J4 and Linux cannot be accessed it appears from J7 aka UART. Uart is 115200 baud and thats pretty standard aswell.
My particular board tried to access some antminer site and login. To send its hashing results I guess.
upon boot it spits out alott of logging, some nice bits:
1.0.0.46 (Nov 28 2017 - 20:56:04 +0800)
Model: Zynq Zed Development Board
DRAM: ECC disabled 256 MiB
NAND: 128 MiB
MMC: zynq_sdhci: 0
Invalid bus 0 (err=-1)
*** Warning - spi_flash_probe() failed, using default environment
..
## Booting kernel from Legacy Image at 02080000 ...
Image Name: Linux-4.6.0-xilinx
Image Type: ARM Linux Kernel Image (uncompressed)
..
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: xlnx,zynq-7000
..
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
..
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 148 (00:0a:35:[redacted by codeasm])
ICPlus IP101A/G e000b000.etherne:00: attached PHY driver [ICPlus IP101A/G] (mii_bus:phy_addr=e000b000.etherne:00, irq=-1)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
usbcore: registered new interface driver usb-storage
..
nand: device found, Manufacturer ID: 0xef, Chip ID: 0xf1
nand: Unknown W29N01HV
nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size:
..
9 ofpart partitions found on MTD device pl35x-nand
Creating 9 MTD partitions on "pl35x-nand":
0x000000000000-0x000000300000 : "nand-fsbl-uboot"
0x000000300000-0x000000800000 : "nand-linux"
0x000000800000-0x000000820000 : "nand-device-tree"
0x000000820000-0x000001220000 : "nand-rootfs"
0x000001220000-0x000002220000 : "nand-jffs2"
0x000002220000-0x000002a20000 : "nand-bitstream"
0x000002a20000-0x000006a20000 : "nand-allrootfs"
0x000006a20000-0x000007e00000 : "nand-release"
0x000007e00000-0x000008000000 : "nand-reserve"
..
INIT: version 2.88 booting
..
PetaLinux 2016.4 zedboard-zynq7 /dev/ttyPS0
..
zedboard-zynq7 login: ./dwang_btc_miner
..
..
stratum+tcp://stratum.antpool.com:3333 User: l367095.11X11 Password: 5558
..
Officially there are 4 boot options, the Antminer supports most of them.
This is the default boot method used, it should be able to flash this with a new image. To flash NAND over Jtag, one need to boot from Jtag, to do so, connect R2578 (near NAND) and connect it to ground. Power the board and it should boot from Jtag.
I dont know if the Antminer can be made to boot using this. the pins might not be exposed to do so.
Normally not used, but after switching R2584 to R2577 enables SD card boot (and disables NAND boot) Insert after soldeirng a SDcard holder a properly formatted SD card and it should boot
Disabling NAND (or SD) at bootup forces boot from Jtag. it might allow flashing NAND.
The board standard asumes power from DATA1, DATA2 and/or DATA3. thats why they have diodes connecting the pins to the powerlines of the board.
The Mini-Fit Jr. Header, (6 pins, like PC atx) was used to power the 2 fans (J5 and J3) on top of the board are speed controlled by the FPGA.
The top row is connected to ground, the bottom to 12V. If one where to switch or place a Diode on D24 (from one of the DATA diodes) one could power the board from this Mini-Fit connector.
The removed diode on the data connecors can be replaced by a wire to make them output 3.3 volts instead. for D2, one can chose to connect to C2315(16 and/or 66) in a straight line.
For D3, FB16 above where the diode would have been if removed, there seems to be missing 2 resistors, R2467. on the FerriteBead (FB16) side, is 3.3volts, one can connect in a straight line downwards to the diode pad output 3.3 to the connector.
DATA1 I havent seen any hints, C669 and C673 do filter 3.3volts and inbetween them you might be able to tap off some of this 3.3volts.
The Molex fan power connector is a Mini-Fit Jr. probably: https://www.molex.com/molex/products/part-detail/pcb_headers/0026013116
The actual fan connectors might be JST