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@Cr4sh
Last active October 4, 2023 20:52
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LiteX demo module
#include <stdlib.h>
#include <stdbool.h>
#include <irq.h>
#include <libbase/uart.h>
#include <libbase/console.h>
#include <generated/csr.h>
#include "adder.h"
static void adder_wait(void)
{
// wait for operation completion
while (adder_ready_read() == 0) {}
}
void adder_reset(void)
{
// reset adder
adder_reset_write(true);
adder_wait();
}
void adder_add(uint32_t val)
{
// perform addition
adder_data_write(val);
adder_wait();
}
uint32_t adder_get(void)
{
// return current result
return adder_result_read();
}
from migen import *
from litex.gen import *
from litex.soc.interconnect.csr import *
from litex.soc.interconnect.csr_eventmanager import *
class Adder(LiteXModule):
LEN = 32
def __init__(self):
# control registers
self.data = CSRStorage(self.LEN, description = "Number to add register.")
self.reset = CSRStorage(1, description = "Reset register.")
# status registers
self.ready = CSRStatus(1, description = "Result ready register.")
self.result = CSRStatus(self.LEN, description = "Result value register.")
# incremental adder state machine
self.fsm = FSM(reset_state = "ZERO")
self.fsm.act("ZERO",
# zero reset
NextValue(self.reset.storage, 0),
# zero addition result
NextValue(self.result.status, 0),
# adder is ready
NextValue(self.ready.status, 1),
# wait for the number
NextState("WAIT")
)
self.fsm.act("WAIT",
# wait for the next state
If(self.data.storage != 0,
# adder is busy
NextValue(self.ready.status, 0),
# got addition number
NextState("ADD")
).Elif(self.reset.storage != 0,
# adder is busy
NextValue(self.ready.status, 0),
# got reset signal
NextState("ZERO")
)
)
self.fsm.act("ADD",
# peform the addition
NextValue(self.result.status, self.result.status + self.data.storage),
# adder is ready
NextValue(self.ready.status, 1),
# zero addition number
NextValue(self.data.storage, 0),
# wait for the next number
NextState("WAIT")
)
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