vl53l0x-registry.js

exports.I2C_ADDR = 0x29;

exports.SYSRANGE_START = 0x00;
exports.SYSTEM_THRESH_HIGH = 0x0C;
exports.SYSTEM_THRESH_LOW = 0x0E;

exports.SYSTEM_SEQUENCE_CONFIG = 0x01;
exports.SYSTEM_RANGE_CONFIG = 0x09;
exports.SYSTEM_INTERMEASUREMENT_PERIOD = 0x04;

exports.SYSTEM_INTERRUPT_CONFIG_GPIO = 0x0A;

exports.GPIO_HV_MUX_ACTIVE_HIGH = 0x84;

exports.SYSTEM_INTERRUPT_CLEAR = 0x0B;

exports.RESULT_INTERRUPT_STATUS = 0x13;
exports.RESULT_RANGE_STATUS = 0x14;

exports.RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN = 0xBC;
exports.RESULT_CORE_RANGING_TOTAL_EVENTS_RTN = 0xC0;
exports.RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF = 0xD0;
exports.RESULT_CORE_RANGING_TOTAL_EVENTS_REF = 0xD4;
exports.RESULT_PEAK_SIGNAL_RATE_REF = 0xB6;

exports.ALGO_PART_TO_PART_RANGE_OFFSET_MM = 0x28;

exports.I2C_SLAVE_DEVICE_ADDRESS = 0x8A;

exports.MSRC_CONFIG_CONTROL = 0x60;

exports.PRE_RANGE_CONFIG_MIN_SNR = 0x27;
exports.PRE_RANGE_CONFIG_VALID_PHASE_LOW = 0x56;
exports.PRE_RANGE_CONFIG_VALID_PHASE_HIGH = 0x57;
exports.PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT = 0x64;

exports.FINAL_RANGE_CONFIG_MIN_SNR = 0x67;
exports.FINAL_RANGE_CONFIG_VALID_PHASE_LOW = 0x47;
exports.FINAL_RANGE_CONFIG_VALID_PHASE_HIGH = 0x48;
exports.FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT = 0x44;

exports.PRE_RANGE_CONFIG_SIGMA_THRESH_HI = 0x61;
exports.PRE_RANGE_CONFIG_SIGMA_THRESH_LO = 0x62;

exports.PRE_RANGE_CONFIG_VCSEL_PERIOD = 0x50;
exports.PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI = 0x51;
exports.PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO = 0x52;

exports.SYSTEM_HISTOGRAM_BIN = 0x81;
exports.HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT = 0x33;
exports.HISTOGRAM_CONFIG_READOUT_CTRL = 0x55;

exports.FINAL_RANGE_CONFIG_VCSEL_PERIOD = 0x70;
exports.FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI = 0x71;
exports.FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO = 0x72;
exports.CROSSTALK_COMPENSATION_PEAK_RATE_MCPS = 0x20;

exports.MSRC_CONFIG_TIMEOUT_MACROP = 0x46;

exports.SOFT_RESET_GO2_SOFT_RESET_N = 0xBF;
exports.IDENTIFICATION_MODEL_ID = 0xC0;
exports.IDENTIFICATION_REVISION_ID = 0xC2;

exports.OSC_CALIBRATE_VAL = 0xF8;

exports.GLOBAL_CONFIG_VCSEL_WIDTH = 0x32;
exports.GLOBAL_CONFIG_SPAD_ENABLES_REF_0 = 0xB0;
exports.GLOBAL_CONFIG_SPAD_ENABLES_REF_1 = 0xB1;
exports.GLOBAL_CONFIG_SPAD_ENABLES_REF_2 = 0xB2;
exports.GLOBAL_CONFIG_SPAD_ENABLES_REF_3 = 0xB3;
exports.GLOBAL_CONFIG_SPAD_ENABLES_REF_4 = 0xB4;
exports.GLOBAL_CONFIG_SPAD_ENABLES_REF_5 = 0xB5;

exports.GLOBAL_CONFIG_REF_EN_START_SELECT = 0xB6;
exports.DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD = 0x4E;
exports.DYNAMIC_SPAD_REF_EN_START_OFFSET = 0x4F;
exports.POWER_MANAGEMENT_GO1_POWER_FORCE = 0x80;

exports.VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV = 0x89;

exports.ALGO_PHASECAL_LIM = 0x30;
exports.ALGO_PHASECAL_CONFIG_TIMEOUT = 0x30;