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Created November 1, 2024 18:35
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base_asm_7af95080.asm
Samples: 10K of event 'cpu-clock', 1999 Hz, Event count (approx.): 5006502000, [percent: local period]
instance void [benchapp] Bencha::Bench()[OptimizedTier1]() /tmp/jitted-57313-7271.so
Percent
Disassembly of section .text:
0000000000000080 <instance void [benchapp] Bencha::Bench()[OptimizedTier1]>:
1.55 stp x29, x30, [sp, #-32]!
1.95 str x19, [sp, #24]
0.94 mov x29, sp
mov x19, #0x2ce0 // #11488
1.02 movk x19, #0x4400, lsl #16
movk x19, #0xf25f, lsl #32
1.09 ldr x1, [x19]
mov x0, x1
1.08 ↓ cbz x0, 3c
0.87 mov x2, #0x15b8 // #5560
0.90 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.07 ldr x3, [x0]
0.90 cmp x3, x2
↓ b.ne 1a4
1.11 3c: ↓ cbz x0, 58
1.44 ldr x1, [x0]
mov x2, #0x15b8 // #5560
1.05 movk x2, #0x5178, lsl #16
1.10 movk x2, #0xf29f, lsl #32
1.01 cmp x1, x2
↓ b.ne 1c0
1.07 58: ldr x1, [x19]
mov x0, x1
1.18 ↓ cbz x0, 7c
2.02 mov x2, #0x15b8 // #5560
1.07 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
0.91 ldr x3, [x0]
0.95 cmp x3, x2
↓ b.ne 1d4
2.00 7c: ↓ cbz x0, 98
2.49 ldr x1, [x0]
mov x2, #0x15b8 // #5560
1.05 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.01 cmp x1, x2
↓ b.ne 1f0
3.00 98: ldr x1, [x19]
mov x0, x1
0.91 ↓ cbz x0, bc
2.61 mov x2, #0x15b8 // #5560
0.99 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
0.83 ldr x3, [x0]
0.88 cmp x3, x2
↓ b.ne 204
2.19 bc: ↓ cbz x0, d8
2.39 ldr x1, [x0]
mov x2, #0x15b8 // #5560
1.06 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.08 cmp x1, x2
↓ b.ne 220
2.89 d8: ldr x1, [x19]
mov x0, x1
0.93 ↓ cbz x0, fc
2.63 mov x2, #0x15b8 // #5560
1.02 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.00 ldr x3, [x0]
1.06 cmp x3, x2
↓ b.ne 234
2.13 fc: ↓ cbz x0, 118
2.32 ldr x1, [x0]
1.01 mov x2, #0x15b8 // #5560
0.90 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
0.99 cmp x1, x2
↓ b.ne 250
2.92 118: ldr x1, [x19]
mov x0, x1
1.04 ↓ cbz x0, 13c
1.86 mov x2, #0x15b8 // #5560
0.94 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.06 ldr x3, [x0]
0.86 cmp x3, x2
↓ b.ne 264
2.02 13c: ↓ cbz x0, 158
2.60 ldr x1, [x0]
mov x2, #0x15b8 // #5560
1.16 movk x2, #0x5178, lsl #16
1.10 movk x2, #0xf29f, lsl #32
1.01 cmp x1, x2
↓ b.ne 280
2.67 158: ldr x1, [x19]
mov x0, x1
1.00 ↓ cbz x0, 17c
1.99 mov x2, #0x15b8 // #5560
0.98 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.01 ldr x3, [x0]
0.88 cmp x3, x2
↓ b.ne 294
2.59 17c: ↓ cbz x0, 198
2.41 ldr x1, [x0]
mov x2, #0x15b8 // #5560
0.91 movk x2, #0x5178, lsl #16
movk x2, #0xf29f, lsl #32
1.10 cmp x1, x2
↓ b.ne 2b0
3.12 198: ldr x19, [sp, #24]
1.12 ldp x29, x30, [sp], #32
← ret
1a4: mov x0, x2
mov x2, #0x6748 // #26440
movk x2, #0x510c, lsl #16
movk x2, #0xf29f, lsl #32
ldr x2, [x2]
→ blr x2
↑ b 3c
1c0: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 58
1d4: mov x0, x2
mov x2, #0x6748 // #26440
movk x2, #0x510c, lsl #16
movk x2, #0xf29f, lsl #32
ldr x2, [x2]
→ blr x2
↑ b 7c
1f0: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 98
204: mov x0, x2
mov x2, #0x6748 // #26440
movk x2, #0x510c, lsl #16
movk x2, #0xf29f, lsl #32
ldr x2, [x2]
→ blr x2
↑ b bc
220: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b d8
234: mov x0, x2
mov x2, #0x6748 // #26440
movk x2, #0x510c, lsl #16
movk x2, #0xf29f, lsl #32
ldr x2, [x2]
→ blr x2
↑ b fc
250: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 118
264: mov x0, x2
mov x2, #0x6748 // #26440
movk x2, #0x510c, lsl #16
movk x2, #0xf29f, lsl #32
ldr x2, [x2]
→ blr x2
↑ b 13c
280: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 158
294: mov x0, x2
mov x2, #0x6748 // #26440
movk x2, #0x510c, lsl #16
movk x2, #0xf29f, lsl #32
ldr x2, [x2]
→ blr x2
↑ b 17c
2b0: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
ldr x19, [sp, #24]
ldp x29, x30, [sp], #32
→ br x1
Samples: 10K of event 'cpu-clock', 1999 Hz, Event count (approx.): 5006502000, [percent: local period]
instance void [6185802f-8a6b-489e-b77e-3129208a6d2dEmitted] BenchmarkDotNet.Autogenerated.Runnable_0::WorkloadActionUnroll(int64)[Optimized]() /tmp/jitted-57313-7231.so
Percent
Disassembly of section .text:
0000000000000080 <instance void [6185802f-8a6b-489e-b77e-3129208a6d2dEmitted] BenchmarkDotNet.Autogenerated.Runnable_0::WorkloadActionUnroll(int64)[Optimized]>:
stp x29, x30, [sp, #-32]!
stp x19, x20, [sp, #16]
mov x29, sp
mov x19, x0
cmp x1, #0x0
↓ b.le 124
mov x20, x1
1.39 1c: ldr x1, [x19, #48]
0.52 ldr x0, [x1, #8]
0.87 ldr x1, [x1, #24]
1.22 → blr x1
2.78 ldr x1, [x19, #48]
0.87 ldr x0, [x1, #8]
0.52 ldr x1, [x1, #24]
0.69 → blr x1
3.47 ldr x1, [x19, #48]
0.69 ldr x0, [x1, #8]
1.04 ldr x1, [x1, #24]
0.87 → blr x1
4.34 ldr x1, [x19, #48]
0.17 ldr x0, [x1, #8]
0.87 ldr x1, [x1, #24]
1.04 → blr x1
2.43 ldr x1, [x19, #48]
0.87 ldr x0, [x1, #8]
0.87 ldr x1, [x1, #24]
0.87 → blr x1
3.82 ldr x1, [x19, #48]
0.69 ldr x0, [x1, #8]
0.52 ldr x1, [x1, #24]
1.39 → blr x1
2.60 ldr x1, [x19, #48]
1.04 ldr x0, [x1, #8]
0.52 ldr x1, [x1, #24]
2.08 → blr x1
3.30 ldr x1, [x19, #48]
0.87 ldr x0, [x1, #8]
1.04 ldr x1, [x1, #24]
1.39 → blr x1
2.95 ldr x1, [x19, #48]
0.35 ldr x0, [x1, #8]
0.69 ldr x1, [x1, #24]
1.04 → blr x1
1.22 ldr x1, [x19, #48]
1.39 ldr x0, [x1, #8]
0.35 ldr x1, [x1, #24]
0.69 → blr x1
5.38 ldr x1, [x19, #48]
1.04 ldr x0, [x1, #8]
2.08 ldr x1, [x1, #24]
0.87 → blr x1
3.65 ldr x1, [x19, #48]
0.87 ldr x0, [x1, #8]
1.04 ldr x1, [x1, #24]
1.56 → blr x1
3.12 ldr x1, [x19, #48]
1.39 ldr x0, [x1, #8]
0.52 ldr x1, [x1, #24]
0.87 → blr x1
2.78 ldr x1, [x19, #48]
0.35 ldr x0, [x1, #8]
0.87 ldr x1, [x1, #24]
0.87 → blr x1
3.12 ldr x1, [x19, #48]
0.69 ldr x0, [x1, #8]
2.26 ldr x1, [x1, #24]
0.87 → blr x1
3.30 ldr x1, [x19, #48]
0.87 ldr x0, [x1, #8]
1.39 ldr x1, [x1, #24]
1.22 → blr x1
3.82 sub x20, x20, #0x1
0.87 ↑ cbnz x20, 1c
124: ldp x19, x20, [sp, #16]
ldp x29, x30, [sp], #32
← ret
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