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EgorBot/diff_asm_7af95080.asm Secret

Created November 1, 2024 18:35
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diff_asm_7af95080.asm
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diff_asm_7af95080.asm
Samples: 10K of event 'cpu-clock', 1999 Hz, Event count (approx.): 5002500000, [percent: local period]
instance void [benchapp] Bencha::Bench()[OptimizedTier1]() /tmp/jitted-57469-7267.so
Percent
Disassembly of section .text:
0000000000000080 <instance void [benchapp] Bencha::Bench()[OptimizedTier1]>:
1.11 stp x29, x30, [sp, #-32]!
2.09 str x19, [sp, #24]
0.85 mov x29, sp
1.02 ldr x19, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x230
1.96 ldr x1, [x19]
0.44 mov x0, x1
0.59 ↓ cbz x0, 2c
0.90 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
2.10 ldr x3, [x0]
1.39 cmp x3, x2
↓ b.ne 13c
2.53 2c: ↓ cbz x0, 40
1.15 ldr x1, [x0]
1.10 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.96 cmp x1, x2
↓ b.ne 150
1.72 40: ldr x1, [x19]
mov x0, x1
0.92 ↓ cbz x0, 5c
1.41 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.76 ldr x3, [x0]
1.05 cmp x3, x2
↓ b.ne 164
1.49 5c: ↓ cbz x0, 70
2.07 ldr x1, [x0]
1.11 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
2.07 cmp x1, x2
↓ b.ne 178
2.07 70: ldr x1, [x19]
mov x0, x1
0.95 ↓ cbz x0, 8c
1.56 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.96 ldr x3, [x0]
0.85 cmp x3, x2
↓ b.ne 18c
2.63 8c: ↓ cbz x0, a0
1.66 ldr x1, [x0]
1.07 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
2.21 cmp x1, x2
↓ b.ne 1a0
2.57 a0: ldr x1, [x19]
0.01 mov x0, x1
0.99 ↓ cbz x0, bc
1.84 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.79 ldr x3, [x0]
0.98 cmp x3, x2
↓ b.ne 1b4
2.02 bc: ↓ cbz x0, d0
2.14 ldr x1, [x0]
1.02 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.96 cmp x1, x2
↓ b.ne 1c8
2.88 d0: ldr x1, [x19]
0.06 mov x0, x1
1.03 ↓ cbz x0, ec
1.74 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
2.05 ldr x3, [x0]
1.05 cmp x3, x2
↓ b.ne 1dc
3.39 ec: ↓ cbz x0, 100
1.72 ldr x1, [x0]
1.04 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.97 cmp x1, x2
↓ b.ne 1f0
3.24 100: ldr x1, [x19]
mov x0, x1
0.89 ↓ cbz x0, 11c
1.73 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
1.86 ldr x3, [x0]
1.07 cmp x3, x2
↓ b.ne 204
1.92 11c: ↓ cbz x0, 130
2.21 ldr x1, [x0]
1.13 ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x238
2.20 cmp x1, x2
↓ b.ne 218
2.58 130: ldr x19, [sp, #24]
1.12 ldp x29, x30, [sp], #32
← ret
13c: mov x0, x2
ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x240
ldr x2, [x2]
→ blr x2
↑ b 2c
150: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 40
164: mov x0, x2
ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x240
ldr x2, [x2]
→ blr x2
↑ b 5c
178: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 70
18c: mov x0, x2
ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x240
ldr x2, [x2]
→ blr x2
↑ b 8c
1a0: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b a0
1b4: mov x0, x2
ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x240
ldr x2, [x2]
→ blr x2
↑ b bc
1c8: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b d0
1dc: mov x0, x2
ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x240
ldr x2, [x2]
→ blr x2
↑ b ec
1f0: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
→ blr x1
↑ b 100
204: mov x0, x2
ldr x2, instance void [benchapp] Bencha::Bench()[OptimizedTier1]+0x240
ldr x2, [x2]
→ blr x2
↑ b 11c
218: ldr x1, [x0]
ldr x1, [x1, #64]
ldr x1, [x1, #32]
ldr x19, [sp, #24]
ldp x29, x30, [sp], #32
→ br x1
Samples: 10K of event 'cpu-clock', 1999 Hz, Event count (approx.): 5002500000, [percent: local period]
instance void [485e7cac-9400-4c8b-9180-336111429319Emitted] BenchmarkDotNet.Autogenerated.Runnable_0::WorkloadActionUnroll(int64)[Optimized]() /tmp/jitted-57469-7228.so
Percent
Disassembly of section .text:
0000000000000080 <instance void [485e7cac-9400-4c8b-9180-336111429319Emitted] BenchmarkDotNet.Autogenerated.Runnable_0::WorkloadActionUnroll(int64)[Optimized]>:
stp x29, x30, [sp, #-32]!
stp x19, x20, [sp, #16]
mov x29, sp
mov x19, x0
cmp x1, #0x0
↓ b.le 124
mov x20, x1
2.25 1c: ldr x1, [x19, #48]
0.80 ldr x0, [x1, #8]
1.77 ldr x1, [x1, #24]
0.96 → blr x1
2.57 ldr x1, [x19, #48]
1.45 ldr x0, [x1, #8]
1.61 ldr x1, [x1, #24]
1.13 → blr x1
2.73 ldr x1, [x19, #48]
1.13 ldr x0, [x1, #8]
0.80 ldr x1, [x1, #24]
0.80 → blr x1
2.09 ldr x1, [x19, #48]
0.16 ldr x0, [x1, #8]
1.29 ldr x1, [x1, #24]
0.32 → blr x1
1.93 ldr x1, [x19, #48]
1.29 ldr x0, [x1, #8]
2.41 ldr x1, [x1, #24]
1.13 → blr x1
1.93 ldr x1, [x19, #48]
0.96 ldr x0, [x1, #8]
2.41 ldr x1, [x1, #24]
1.77 → blr x1
1.77 ldr x1, [x19, #48]
0.96 ldr x0, [x1, #8]
2.57 ldr x1, [x1, #24]
0.32 → blr x1
2.09 ldr x1, [x19, #48]
0.64 ldr x0, [x1, #8]
1.61 ldr x1, [x1, #24]
0.64 → blr x1
2.73 ldr x1, [x19, #48]
0.80 ldr x0, [x1, #8]
2.09 ldr x1, [x1, #24]
0.80 → blr x1
2.89 ldr x1, [x19, #48]
0.48 ldr x0, [x1, #8]
2.25 ldr x1, [x1, #24]
0.96 → blr x1
1.61 ldr x1, [x19, #48]
0.96 ldr x0, [x1, #8]
1.77 ldr x1, [x1, #24]
1.13 → blr x1
2.25 ldr x1, [x19, #48]
0.48 ldr x0, [x1, #8]
1.77 ldr x1, [x1, #24]
0.96 → blr x1
2.73 ldr x1, [x19, #48]
1.29 ldr x0, [x1, #8]
2.89 ldr x1, [x1, #24]
1.13 → blr x1
1.61 ldr x1, [x19, #48]
0.80 ldr x0, [x1, #8]
2.25 ldr x1, [x1, #24]
0.96 → blr x1
2.89 ldr x1, [x19, #48]
1.29 ldr x0, [x1, #8]
1.29 ldr x1, [x1, #24]
1.29 → blr x1
2.09 ldr x1, [x19, #48]
0.64 ldr x0, [x1, #8]
2.41 ldr x1, [x1, #24]
0.96 → blr x1
1.61 sub x20, x20, #0x1
1.61 ↑ cbnz x20, 1c
124: ldp x19, x20, [sp, #16]
ldp x29, x30, [sp], #32
← ret
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