u-boot Porting

Template:3

file name: arch/arm/cpu/armv7/am33xx/mem.c


void gpmc_init(void)
{
        /* putting a blanket check on GPMC based on ZeBu for now */
        gpmc_cfg = (struct gpmc *)GPMC_BASE;

#if defined(CONFIG_CMD_NAND)
        const u32 *gpmc_config = NULL;
        u32 base = 0;
        u32 size = 0;
#endif
        /* global settings */
        writel(0x00000008, &gpmc_cfg->sysconfig);
        writel(0x00000100, &gpmc_cfg->irqstatus);
        writel(0x00000200, &gpmc_cfg->irqenable);
        writel(0x00000012, &gpmc_cfg->config);
        /*
         * Disable the GPMC0 config set by ROM code
         */
        writel(0, &gpmc_cfg->cs[0].config7);
        sdelay(1000);

#ifdef CONFIG_CMD_NAND
        gpmc_config = gpmc_m_nand;

        base = PISMO1_NAND_BASE;
        size = PISMO1_NAND_SIZE;
        enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
#endif
}

->arch/arm/include/asm/arch-am33xx/mem.h:56:#define M_NAND_GPMC_CONFIG1	0x00000800
  #define M_NAND_GPMC_CONFIG1     0x00000800
  #define M_NAND_GPMC_CONFIG2     0x001e1e00
  #define M_NAND_GPMC_CONFIG3     0x001e1e00
  #define M_NAND_GPMC_CONFIG4     0x16051807
  #define M_NAND_GPMC_CONFIG5     0x00151e1e
  #define M_NAND_GPMC_CONFIG6     0x16000f80
  #define M_NAND_GPMC_CONFIG7     0x00000008
  
  GPMC Bus intilization is done through this file.