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June 9, 2014 09:21
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u-boot porting--Beagle bone
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| Template files presented before porting MMC/SD, Ethernet, NAND & NOR. | |
| 1.arch/arm/cpu/armv7/am33xx/board.c | |
| 2.arch/arm/cpu/armv7/am33xx/emif4.c | |
| 3.arch/arm/cpu/armv7/am33xx/mem.c | |
| 4.board/ti/am33xx/board.c | |
| 5.board/ti/am33xx/mux.c | |
| 6.board/ti/am33xx/uboot.lds | |
| 7.boards.cfg | |
| 8.include /configs/am335x_evm.h | |
| 1.arch/arm/cpu/armv7/am33xx/board.c | |
| static const struct gpio_bank gpio_bank_am33xx[4] = { | |
| { (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX }, | |
| { (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX }, | |
| { (void *)AM33XX_GPIO2_BASE, METHOD_GPIO_24XX }, | |
| { (void *)AM33XX_GPIO3_BASE, METHOD_GPIO_24XX }, | |
| }; | |
| const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx; | |
| -> GPIO Bank intilization.for am33xx. | |
| arch/arm/include/asm/arch-am33xx/gpio.h Initilization of all gpio registers | |
| Register values are based on OMAP4430 TRM. | |
| Reference: | |
| http://info.arteris.com/blog/bid/64282/TI-OMAP4430-and-OMAP4460-TRM-Technical-Reference-Manual-Update | |
| #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) | |
| int cpu_mmc_init(bd_t *bis) | |
| { | |
| int ret; | |
| ret = omap_mmc_init(0, 0, 0); | |
| if (ret) | |
| return ret; | |
| return omap_mmc_init(1, 0, 0); | |
| } | |
| #endif | |
| In this config. we are using SPL build for creating/downloading uboot.img from | |
| HostPc to Target board using xmodem protocol. | |
| void setup_clocks_for_console(void) | |
| { | |
| /* Not yet implemented */ | |
| return; | |
| } | |
| -> clocks are not implemented yet | |
| /* AM33XX has two MUSB controllers which can be host or gadget */ | |
| #if (defined(CONFIG_MUSB_GADGET) || defined(CONFIG_MUSB_HOST)) && \ | |
| (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) | |
| static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; | |
| /* USB 2.0 PHY Control */ | |
| #define CM_PHY_PWRDN (1 << 0) | |
| #define CM_PHY_OTG_PWRDN (1 << 1) | |
| #define OTGVDET_EN (1 << 19) | |
| #define OTGSESSENDEN (1 << 20) | |
| usb 2.0 is connected through Miniusb to Beaglebone. | |
| static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr) | |
| { | |
| if (on) { | |
| clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN, | |
| OTGVDET_EN | OTGSESSENDEN); | |
| } else { | |
| clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN); | |
| } | |
| } | |
| static struct musb_hdrc_config musb_config = { | |
| .multipoint = 1, | |
| .dyn_fifo = 1, | |
| .num_eps = 16, | |
| .ram_bits = 12, | |
| }; | |
| #ifdef CONFIG_AM335X_USB0 | |
| static void am33xx_otg0_set_phy_power(u8 on) | |
| { | |
| am33xx_usb_set_phy_power(on, &cdev->usb_ctrl0); | |
| } | |
| struct omap_musb_board_data otg0_board_data = { | |
| .set_phy_power = am33xx_otg0_set_phy_power, | |
| }; | |
| static struct musb_hdrc_platform_data otg0_plat = { | |
| .mode = CONFIG_AM335X_USB0_MODE, | |
| .config = &musb_config, | |
| .power = 50, | |
| .platform_ops = &musb_dsps_ops, | |
| .board_data = &otg0_board_data, | |
| }; | |
| #endif | |
| For OTG usb, above configuration. | |
| #ifdef CONFIG_AM335X_USB1 | |
| static void am33xx_otg1_set_phy_power(u8 on) | |
| { | |
| am33xx_usb_set_phy_power(on, &cdev->usb_ctrl1); | |
| } | |
| struct omap_musb_board_data otg1_board_data = { | |
| .set_phy_power = am33xx_otg1_set_phy_power, | |
| }; | |
| static struct musb_hdrc_platform_data otg1_plat = { | |
| .mode = CONFIG_AM335X_USB1_MODE, | |
| .config = &musb_config, | |
| .power = 50, | |
| .platform_ops = &musb_dsps_ops, | |
| .board_data = &otg1_board_data, | |
| }; | |
| #endif | |
| For USB1 configuration | |
| int arch_misc_init(void) | |
| { | |
| #ifdef CONFIG_AM335X_USB0 | |
| musb_register(&otg0_plat, &otg0_board_data, | |
| (void *)AM335X_USB0_OTG_BASE); | |
| #endif | |
| #ifdef CONFIG_AM335X_USB1 | |
| musb_register(&otg1_plat, &otg1_board_data, | |
| (void *)AM335X_USB1_OTG_BASE); | |
| #endif | |
| return 0; | |
| The above configuration is for USB0, USB1 or OTG0 & OTG1 configuration. | |
| As Beagle bone is using mini USB cable to connect to board adn serial data transfer | |
| done through the usb cable only(initially). | |
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