t6031 "M3 Max" minimal devicetrees

t6031-j514.dts

// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Apple MacBook Pro (14-inch, M3 Max, 2023)
 *
 * target-type: J514
 *
 * Copyright The Asahi Linux Contributors
 */

/dts-v1/;

#include "t6031.dtsi"

/ {
	compatible = "apple,j514c", "apple,j514", "apple,t6031", "apple,arm-platform";
	model = "Apple MacBook Pro (14-inch, M3 Pro, 2023)";

	chosen {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		simple-framebuffer = &framebuffer0;
		stdout-path = "framebuffer0";
	};

    framebuffer0: framebuffer@11fc02a4000 {
        compatible = "simple-framebuffer";
        /* Reg: <AddressHigh AddressLow SizeHigh SizeLow> */
        /* Address: 0x11f_c02a4000, Size: 23,756,544 bytes */
        reg = <0x11f 0xc02a4000 0x0 0x16a7e00>;
        width = <3024>;
        height = <1964>;
        stride = <12096>;
        format = "x2r10g10b10";
        status = "okay";
    };

	memory@10000000000 {
		device_type = "memory";
		reg = <0x100 0 0x2 0>; /* To be filled by loader */
	};
};

t6031.dtsi

// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Apple T6031 "M3 Max" SoC
 *
 * Copyright The Asahi Linux Contributors
 */

#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "apple,t6031", "apple,arm-platform";

	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 { cpu = <&cpu0>; };
			};
		};

		cpu0: cpu@0 {
			compatible = "apple,sawtooth";
			device_type = "cpu";
			reg = <0x0 0x0>;
			enable-method = "spin-table";
			cpu-release-addr = <0 0>;
			next-level-cache = <&l2_cache_0>;
		};

		l2_cache_0: l2-cache-0 {
			compatible = "cache";
			cache-level = <2>;
			cache-unified;
			cache-size = <0x400000>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <&aic>;
		interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
		interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
			     <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
			     <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
			     <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
	};

	clkref: clock-ref {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
		clock-output-names = "clkref";
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		nonposted-mmio;

		ranges;

        aic: interrupt-controller@292400000 {
            compatible = "apple,aic3";
            #interrupt-cells = <3>;
            interrupt-controller;

            /* 
            * reg[0]: Main MMIO range (approx 1.8 MB)
            * reg[1]: CPU Event/IACK register page (Base + 0x40000)
            */
            reg = <0x00000002 0x92400000 0x00000000 0x1cc000>,
                <0x00000002 0x92440000 0x00000000 0x4000>;

            config-offset = <0x10000>;
            cap0-offset = <0x4>;
            maxnumirq-offset = <0xc>;
        };
    };
};