db.py

list = [
[ "AAA", "37", "", "", False, True, "ASCII Adjust After Addition", "ASCII adjust AL after addition." ],
[ "AAD", "D5 0A", "", "", False, True, "ASCII Adjust AX Before Division", "ASCII adjust AX before division." ],
[ "AAD", "D5 ib", "imm8", "I", False, True, "ASCII Adjust AX Before Division", "Adjust AX before division to number base imm8." ],
[ "AAM", "D4 0A", "", "", False, True, "ASCII Adjust AX After Multiply", "ASCII adjust AX after multiply." ],
[ "AAM", "D4 ib", "imm8", "I", False, True, "ASCII Adjust AX After Multiply", "Adjust AX after multiply to number base imm8." ],
[ "AAS", "3F", "", "", False, True, "ASCII Adjust AL After Subtraction", "ASCII adjust AL after subtraction." ],
[ "ADC", "14 ib", "AL, imm8", "FI", True, True, "Add with Carry", "Add with carry imm8 to AL." ],
[ "ADC", "15 iw", "AX, imm16", "FI", True, True, "Add with Carry", "Add with carry imm16 to AX." ],
[ "ADC", "15 id", "EAX, imm32", "FI", True, True, "Add with Carry", "Add with carry imm32 to EAX." ],
[ "ADC", "REX.W+ 15 id", "RAX, imm32", "FI", True, False, "Add with Carry", "Add with carry imm32 sign extended to 64-bits to RAX." ],
[ "ADC", "80 /2 ib", "r/m8, imm8", "MI", True, True, "Add with Carry", "Add with carry imm8 to r/m8." ],
[ "ADC", "REX+ 80 /2 ib", "r/m8, imm8", "MI", True, False, "Add with Carry", "Add with carry imm8 to r/m8." ],
[ "ADC", "81 /2 iw", "r/m16, imm16", "MI", True, True, "Add with Carry", "Add with carry imm16 to r/m16." ],
[ "ADC", "81 /2 id", "r/m32, imm32", "MI", True, True, "Add with Carry", "Add with CF imm32 to r/m32." ],
[ "ADC", "REX.W+ 81 /2 id", "r/m64, imm32", "MI", True, False, "Add with Carry", "Add with CF imm32 sign extended to 64-bits to r/m64." ],
[ "ADC", "83 /2 ib", "r/m16, imm8", "MI", True, True, "Add with Carry", "Add with CF sign-extended imm8 to r/m16." ],
[ "ADC", "83 /2 ib", "r/m32, imm8", "MI", True, True, "Add with Carry", "Add with CF sign-extended imm8 into r/m32." ],
[ "ADC", "REX.W+ 83 /2 ib", "r/m64, imm8", "MI", True, False, "Add with Carry", "Add with CF sign-extended imm8 into r/m64." ],
[ "ADC", "10 /r", "r/m8, r8", "MR", True, True, "Add with Carry", "Add with carry byte register to r/m8." ],
[ "ADC", "REX+ 10 /r", "r/m8, r8", "MR", True, False, "Add with Carry", "Add with carry byte register to r/m64." ],
[ "ADC", "11 /r", "r/m16, r16", "MR", True, True, "Add with Carry", "Add with carry r16 to r/m16." ],
[ "ADC", "11 /r", "r/m32, r32", "MR", True, True, "Add with Carry", "Add with CF r32 to r/m32." ],
[ "ADC", "REX.W+ 11 /r", "r/m64, r64", "MR", True, False, "Add with Carry", "Add with CF r64 to r/m64." ],
[ "ADC", "12 /r", "r8, r/m8", "RM", True, True, "Add with Carry", "Add with carry r/m8 to byte register." ],
[ "ADC", "REX+ 12 /r", "r8, r/m8", "RM", True, False, "Add with Carry", "Add with carry r/m64 to byte register." ],
[ "ADC", "13 /r", "r16, r/m16", "RM", True, True, "Add with Carry", "Add with carry r/m16 to r16." ],
[ "ADC", "13 /r", "r32, r/m32", "RM", True, True, "Add with Carry", "Add with CF r/m32 to r32." ],
[ "ADC", "REX.W+ 13 /r", "r64, r/m64", "RM", True, False, "Add with Carry", "Add with CF r/m64 to r64." ],
[ "ADD", "04 ib", "AL, imm8", "FI", True, True, "Add", "Add imm8 to AL." ],
[ "ADD", "05 iw", "AX, imm16", "FI", True, True, "Add", "Add imm16 to AX." ],
[ "ADD", "05 id", "EAX, imm32", "FI", True, True, "Add", "Add imm32 to EAX." ],
[ "ADD", "REX.W+ 05 id", "RAX, imm32", "FI", True, False, "Add", "Add imm32 sign-extended to 64-bits to RAX." ],
[ "ADD", "80 /0 ib", "r/m8, imm8", "MI", True, True, "Add", "Add imm8 to r/m8." ],
[ "ADD", "REX+ 80 /0 ib", "r/m8, imm8", "MI", True, False, "Add", "Add sign -extended imm8 to r/m64." ],
[ "ADD", "81 /0 iw", "r/m16, imm16", "MI", True, True, "Add", "Add imm16 to r/m16." ],
[ "ADD", "81 /0 id", "r/m32, imm32", "MI", True, True, "Add", "Add imm32 to r/m32." ],
[ "ADD", "REX.W+ 81 /0 id", "r/m64, imm32", "MI", True, False, "Add", "Add imm32 sign-extended to 64-bits to r/m64." ],
[ "ADD", "83 /0 ib", "r/m16, imm8", "MI", True, True, "Add", "Add sign -extended imm8 to r/m16." ],
[ "ADD", "83 /0 ib", "r/m32, imm8", "MI", True, True, "Add", "Add sign -extended imm8 to r/m32." ],
[ "ADD", "REX.W+ 83 /0 ib", "r/m64, imm8", "MI", True, False, "Add", "Add sign -extended imm8 to r/m64." ],
[ "ADD", "00 /r", "r/m8, r8", "MR", True, True, "Add", "Add r8 to r/m8." ],
[ "ADD", "REX+ 00 /r", "r/m8, r8", "MR", True, False, "Add", "Add r8 to r/m8." ],
[ "ADD", "01 /r", "r/m16, r16", "MR", True, True, "Add", "Add r16 to r/m16." ],
[ "ADD", "01 /r", "r/m32, r32", "MR", True, True, "Add", "Add r32 to r/m32." ],
[ "ADD", "REX.W+ 01 /r", "r/m64, r64", "MR", True, False, "Add", "Add r64 to r/m64." ],
[ "ADD", "02 /r", "r8, r/m8", "RM", True, True, "Add", "Add r/m8 to r8." ],
[ "ADD", "REX+ 02 /r", "r8, r/m8", "RM", True, False, "Add", "Add r/m8 to r8." ],
[ "ADD", "03 /r", "r16, r/m16", "RM", True, True, "Add", "Add r/m16 to r16." ],
[ "ADD", "03 /r", "r32, r/m32", "RM", True, True, "Add", "Add r/m32 to r32." ],
[ "ADD", "REX.W+ 03 /r", "r64, r/m64", "RM", True, False, "Add", "Add r/m64 to r64." ],
[ "AND", "24 ib", "AL, imm8", "FI", True, True, "Logical AND", "AL AND imm8." ],
[ "AND", "25 iw", "AX, imm16", "FI", True, True, "Logical AND", "AX AND i mm16." ],
[ "AND", "25 id", "EAX, imm32", "FI", True, True, "Logical AND", "EAX AND imm32." ],
[ "AND", "REX.W+ 25 id", "RAX, imm32", "FI", True, False, "Logical AND", "RAX AND imm32 sign-extended to 64-bits." ],
[ "AND", "80 /4 ib", "r/m8, imm8", "MI", True, True, "Logical AND", "r/m8 AND imm8." ],
[ "AND", "REX+ 80 /4 ib", "r/m8, imm8", "MI", True, False, "Logical AND", "r/m8 AND imm8." ],
[ "AND", "81 /4 iw", "r/m16, imm16", "MI", True, True, "Logical AND", "r/m16 AND imm16." ],
[ "AND", "81 /4 id", "r/m32, imm32", "MI", True, True, "Logical AND", "r/m32 AND imm32." ],
[ "AND", "REX.W+ 81 /4 id", "r/m64, imm32", "MI", True, False, "Logical AND", "r/m64 AND imm32 sign extended to 64-bits." ],
[ "AND", "83 /4 ib", "r/m16, imm8", "MI", True, True, "Logical AND", "r/m16 AND imm8 (sign-extended)." ],
[ "AND", "83 /4 ib", "r/m32, imm8", "MI", True, True, "Logical AND", "r/m32 AND imm8 (sign-extended)." ],
[ "AND", "REX.W+ 83 /4 ib", "r/m64, imm8", "MI", True, False, "Logical AND", "r/m64 AND imm8 (sign-extended)." ],
[ "AND", "20 /r", "r/m8, r8", "MR", True, True, "Logical AND", "r/m8 AND r8." ],
[ "AND", "REX+ 20 /r", "r/m8, r8", "MR", True, False, "Logical AND", "r/m64 AND r8 (sign-extended)." ],
[ "AND", "21 /r", "r/m16, r16", "MR", True, True, "Logical AND", "r/m16 AND r16." ],
[ "AND", "21 /r", "r/m32, r32", "MR", True, True, "Logical AND", "r/m32 AND r32." ],
[ "AND", "REX.W+ 21 /r", "r/m64, r64", "MR", True, False, "Logical AND", "r/m64 AND r32." ],
[ "AND", "22 /r", "r8, r/m8", "RM", True, True, "Logical AND", "r8 AND r/m8." ],
[ "AND", "REX+ 22 /r", "r8, r/m8", "RM", True, False, "Logical AND", "r/m64 AND r8 (sign-extended)." ],
[ "AND", "23 /r", "r16, r/m16", "RM", True, True, "Logical AND", "r16 AND r/m16." ],
[ "AND", "23 /r", "r32, r/m32", "RM", True, True, "Logical AND", "r32 AND r/m32." ],
[ "AND", "REX.W+ 23 /r", "r64, r/m64", "RM", True, False, "Logical AND", "r64 AND r/m64." ],
[ "ARPL", "63 /r", "r/m16, r16", "MR", False, True, "Adjust RPL Field of Segment Selector", "Adjust RPL of r/m16 to not less than RPL of r16." ],
[ "BOUND", "62 /r", "r16, m16&16", "RM", False, True, "Check Array Index Against Bounds", "Check if r16 (array index) is within bounds specified by m16&16." ],
[ "BOUND", "62 /r", "r32, m32&32", "RM", False, True, "Check Array Index Against Bounds", "Check if r32 (array index) is within bounds specified by m32&32." ],
[ "BSF", "0F BC /r", "r16, r/m16", "RM", True, True, "Bit Scan Forward", "Bit scan forward on r/m16." ],
[ "BSF", "0F BC /r", "r32, r/m32", "RM", True, True, "Bit Scan Forward", "Bit scan forward on r/m32." ],
[ "BSF", "REX.W+ 0F BC /r", "r64, r/m64", "RM", True, False, "Bit Scan Forward", "Bit scan forward on r/m64." ],
[ "BSR", "0F BD /r", "r16, r/m16", "RM", True, True, "Bit Scan Reverse", "Bit scan reverse on r/m16." ],
[ "BSR", "0F BD /r", "r32, r/m32", "RM", True, True, "Bit Scan Reverse", "Bit scan reverse on r/m32." ],
[ "BSR", "REX.W+ 0F BD /r", "r64, r/m64", "RM", True, False, "Bit Scan Reverse", "Bit scan reverse on r/m64." ],
[ "BSWAP", "0F C8+ rd", "r32", "O", True, True, "Byte Swap", "Reverses the byte order of a 32-bit register." ],
[ "BSWAP", "REX.W+ 0F C8+ rd", "r64", "O", True, False, "Byte Swap", "Reverses the byte order of a 64-bit register." ],
[ "BT", "0F A3 /r", "r/m16, r16", "MR", True, True, "Bit Test", "Store selected bit in CF flag." ],
[ "BT", "0F A3 /r", "r/m32, r32", "MR", True, True, "Bit Test", "Store selected bit in CF flag." ],
[ "BT", "REX.W+ 0F A3 /r", "r/m64, r64", "MR", True, False, "Bit Test", "Store selected bit in CF flag." ],
[ "BT", "0F BA /4 ib", "r/m16, imm8", "MI", True, True, "Bit Test", "Store selected bit in CF flag." ],
[ "BT", "0F BA /4 ib", "r/m32, imm8", "MI", True, True, "Bit Test", "Store selected bit in CF flag." ],
[ "BT", "REX.W+ 0F BA /4 ib", "r/m64, imm8", "MI", True, False, "Bit Test", "Store selected bit in CF flag." ],
[ "BTC", "0F BB /r", "r/m16, r16", "MR", True, True, "Bit Test and Complement", "Store selected bit in CF flag and complement." ],
[ "BTC", "0F BB /r", "r/m32, r32", "MR", True, True, "Bit Test and Complement", "Store selected bit in CF flag and complement." ],
[ "BTC", "REX.W+ 0F BB /r", "r/m64, r64", "MR", True, False, "Bit Test and Complement", "Store selected bit in CF flag and complement." ],
[ "BTC", "0F BA /7 ib", "r/m16, imm8", "MI", True, True, "Bit Test and Complement", "Store selected bit in CF flag and complement." ],
[ "BTC", "0F BA /7 ib", "r/m32, imm8", "MI", True, True, "Bit Test and Complement", "Store selected bit in CF flag and complement." ],
[ "BTC", "REX.W+ 0F BA /7 ib", "r/m64, imm8", "MI", True, False, "Bit Test and Complement", "Store selected bit in CF flag and complement." ],
[ "BTR", "0F B3 /r", "r/m16, r16", "MR", True, True, "Bit Test and Reset", "Store selected bit in CF flag and clear." ],
[ "BTR", "0F B3 /r", "r/m32, r32", "MR", True, True, "Bit Test and Reset", "Store selected bit in CF flag and clear." ],
[ "BTR", "REX.W+ 0F B3 /r", "r/m64, r64", "MR", True, False, "Bit Test and Reset", "Store selected bit in CF flag and clear." ],
[ "BTR", "0F BA /6 ib", "r/m16, imm8", "MI", True, True, "Bit Test and Reset", "Store selected bit in CF flag and clear." ],
[ "BTR", "0F BA /6 ib", "r/m32, imm8", "MI", True, True, "Bit Test and Reset", "Store selected bit in CF flag and clear." ],
[ "BTR", "REX.W+ 0F BA /6 ib", "r/m64, imm8", "MI", True, False, "Bit Test and Reset", "Store selected bit in CF flag and clear." ],
[ "BTS", "0F AB /r", "r/m16, r16", "MR", True, True, "Bit Test and Set", "Store selected bit in CF flag and set." ],
[ "BTS", "0F AB /r", "r/m32, r32", "MR", True, True, "Bit Test and Set", "Store selected bit in CF flag and set." ],
[ "BTS", "REX.W+ 0F AB /r", "r/m64, r64", "MR", True, False, "Bit Test and Set", "Store selected bit in CF flag and set." ],
[ "BTS", "0F BA /5 ib", "r/m16, imm8", "MI", True, True, "Bit Test and Set", "Store selected bit in CF flag and set." ],
[ "BTS", "0F BA /5 ib", "r/m32, imm8", "MI", True, True, "Bit Test and Set", "Store selected bit in CF flag and set." ],
[ "BTS", "REX.W+ 0F BA /5 ib", "r/m64, imm8", "MI", True, False, "Bit Test and Set", "Store selected bit in CF flag and set." ],
[ "CALL", "E8 cw", "rel16", "M", False, True, "Call Procedure", "Call near, relative, displacement relative to next instruction." ],
[ "CALL", "E8 cd", "rel32", "M", True, True, "Call Procedure", "Call near, relative, displacement relative to next instruction. 32-bit displacement sign extended to 64-bits in 64-bit mode." ],
[ "CALL", "FF /2", "r/m16", "M", False, True, "Call Procedure", "Call near, absolute indirect, address given in r/m16." ],
[ "CALL", "FF /2", "r/m32", "M", False, True, "Call Procedure", "Call near, absolute indirect, address given in r/m32." ],
[ "CALL", "FF /2", "r/m64", "M", True, False, "Call Procedure", "Call near, absolute indirect, address given in r/m 64." ],
[ "CALL", "9A cd", "ptr16:16", "D", False, True, "Call Procedure", "Call far, absolute, address given in operand." ],
[ "CALL", "9A cp", "ptr16:32", "D", False, True, "Call Procedure", "Call far, absolute, address given in operand." ],
[ "CALL", "FF /3", "m16:16", "M", True, True, "Call Procedure", "Call far, absolute indirect address given inm16:16. In 32-bit mode: if selector points to a gate, then RIP = 32-bit zero extended displacement taken from gate; else RIP = zero extended 16-bit offset from far pointer referenced in the instruction." ],
[ "CALL", "FF /3", "m16:32", "M", True, True, "Call Procedure", "In 64-bit mode: If selector points to a gate, then RIP = 64-bit displacement taken from gate; else RIP = zero extended 32-bit offset from far pointer referenced in the instruction." ],
[ "CALL", "REX.W+ FF /3", "m16:64", "M", True, False, "Call Procedure", "In 64-bit mode: If selector points to a gate, then RIP = 64-bit displacement taken from gate; else RIP = 64-bit offset from far pointer referenced in the instruction." ],
[ "CBW", "98", "", "", True, True, "Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword", "AX <- sign-extend of AL." ],
[ "CWDE", "98", "", "", True, True, "Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword", "EAX <- sign-extend of AX." ],
[ "CDQE", "REX.W+ 98", "", "", True, False, "Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword", "RAX <- sign-extend of EAX." ],
[ "CLAC", "0F 01 CA", "", "", True, True, "Clear AC Flag in EFLAGS Register", "Clear the AC flag in the EFLAGS register." ],
[ "CLC", "F8", "", "", True, True, "Clear Carry Flag", "Clear CF flag." ],
[ "CLD", "FC", "", "", True, True, "Clear Direction Flag", "Clear DF flag." ],
[ "CLFLUSH", "0F AE /7", "m8", "M", True, True, "Flush Cache Line", "Flushes cache line containing m8." ],
[ "CLI", "FA", "", "", True, True, "Clear Interrupt Flag", "Clear interrupt flag; interrupts disabled when interrupt flag cleared." ],
[ "CLTS", "0F 06", "", "", True, True, "Clear Task-Switched Flag in CR0", "Clears TS flag in CR0." ],
[ "CMC", "F5", "", "", True, True, "Complement Carry Flag", "Complement CF flag." ],
[ "CMOVA", "0F 47 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if above (CF=0 and ZF=0)." ],
[ "CMOVA", "0F 47 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if above (CF=0 and ZF=0)." ],
[ "CMOVA", "REX.W+ 0F 47 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if above (CF=0 and ZF=0)." ],
[ "CMOVAE", "0F 43 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if above or equal (CF=0)." ],
[ "CMOVAE", "0F 43 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if above or equal (CF=0)." ],
[ "CMOVAE", "REX.W+ 0F 43 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if above or equal (CF=0)." ],
[ "CMOVB", "0F 42 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if below (CF=1)." ],
[ "CMOVB", "0F 42 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if below (CF=1)." ],
[ "CMOVB", "REX.W+ 0F 42 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if below (CF=1)." ],
[ "CMOVBE", "0F 46 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if below or equal (CF=1 or ZF=1)." ],
[ "CMOVBE", "0F 46 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if below or equal (CF=1 or ZF=1)." ],
[ "CMOVBE", "REX.W+ 0F 46 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if below or equal (CF=1 or ZF=1)." ],
[ "CMOVC", "0F 42 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if carry (CF=1)." ],
[ "CMOVC", "0F 42 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if carry (CF=1)." ],
[ "CMOVC", "REX.W+ 0F 42 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if carry (CF=1)." ],
[ "CMOVE", "0F 44 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if equal (ZF=1)." ],
[ "CMOVE", "0F 44 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if equal (ZF=1)." ],
[ "CMOVE", "REX.W+ 0F 44 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if equal (ZF=1)." ],
[ "CMOVG", "0F 4F /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if greater (ZF=0 and SF=OF)." ],
[ "CMOVG", "0F 4F /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if greater (ZF=0 and SF=OF)." ],
[ "CMOVG", "REX.W+ 0F 4F /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if greater (ZF=0 and SF=OF)." ],
[ "CMOVGE", "0F 4D /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if greater or equal (SF=OF)." ],
[ "CMOVGE", "0F 4D /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if greater or equal (SF=OF)." ],
[ "CMOVGE", "REX.W+ 0F 4D /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if greater or equal (SF=OF)." ],
[ "CMOVL", "0F 4C /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if less (SF<>OF)." ],
[ "CMOVL", "0F 4C /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if less (SF<>OF)." ],
[ "CMOVL", "REX.W+ 0F 4C /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if less (SF<>OF)." ],
[ "CMOVLE", "0F 4E /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if less or equal (ZF=1 or SF<>OF)." ],
[ "CMOVLE", "0F 4E /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if less or equal (ZF=1 or SF<>OF)." ],
[ "CMOVLE", "REX.W+ 0F 4E /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if less or equal (ZF=1 or SF<>OF)." ],
[ "CMOVNA", "0F 46 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not above (CF=1 or ZF=1)." ],
[ "CMOVNA", "0F 46 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not above (CF=1 or ZF=1)." ],
[ "CMOVNA", "REX.W+ 0F 46 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not above (CF=1 or ZF=1)." ],
[ "CMOVNAE", "0F 42 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not above or equal (CF=1)." ],
[ "CMOVNAE", "0F 42 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not above or equal (CF=1)." ],
[ "CMOVNAE", "REX.W+ 0F 42 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not above or equal (CF=1)." ],
[ "CMOVNB", "0F 43 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not below (CF=0)." ],
[ "CMOVNB", "0F 43 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not below (CF=0)." ],
[ "CMOVNB", "REX.W+ 0F 43 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not below (CF=0)." ],
[ "CMOVNBE", "0F 47 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not below or equal (CF=0 and ZF=0)." ],
[ "CMOVNBE", "0F 47 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not below or equal (CF=0 and ZF=0)." ],
[ "CMOVNBE", "REX.W+ 0F 47 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not below or equal (CF=0 and ZF=0)." ],
[ "CMOVNC", "0F 43 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not carry (CF=0)." ],
[ "CMOVNC", "0F 43 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not carry (CF=0)." ],
[ "CMOVNC", "REX.W+ 0F 43 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not carry (CF=0)." ],
[ "CMOVNE", "0F 45 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not equal (ZF=0)." ],
[ "CMOVNE", "0F 45 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not equal (ZF=0)." ],
[ "CMOVNE", "REX.W+ 0F 45 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not equal (ZF=0)." ],
[ "CMOVNG", "0F 4E /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not greater (ZF=1 or SF<>OF)." ],
[ "CMOVNG", "0F 4E /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not greater (ZF=1 or SF<>OF)." ],
[ "CMOVNG", "REX.W+ 0F 4E /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not greater (ZF=1 or SF<>OF)." ],
[ "CMOVNGE", "0F 4C /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not greater or equal (SF<>OF)." ],
[ "CMOVNGE", "0F 4C /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not greater or equal (SF<>OF)." ],
[ "CMOVNGE", "REX.W+ 0F 4C /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not greater or equal (SF<>OF)." ],
[ "CMOVNL", "0F 4D /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not less (SF=OF)." ],
[ "CMOVNL", "0F 4D /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not less (SF=OF)." ],
[ "CMOVNL", "REX.W+ 0F 4D /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not less (SF=OF)." ],
[ "CMOVNLE", "0F 4F /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not less or equal (ZF=0 and SF=OF)." ],
[ "CMOVNLE", "0F 4F /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not less or equal (ZF=0 and SF=OF)." ],
[ "CMOVNLE", "REX.W+ 0F 4F /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not less or equal (ZF=0 and SF=OF)." ],
[ "CMOVNO", "0F 41 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not overflow (OF=0)." ],
[ "CMOVNO", "0F 41 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not overflow (OF=0)." ],
[ "CMOVNO", "REX.W+ 0F 41 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not overflow (OF=0)." ],
[ "CMOVNP", "0F 4B /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not parity (PF=0)." ],
[ "CMOVNP", "0F 4B /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not parity (PF=0)." ],
[ "CMOVNP", "REX.W+ 0F 4B /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not parity (PF=0)." ],
[ "CMOVNS", "0F 49 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not sign (SF=0)." ],
[ "CMOVNS", "0F 49 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not sign (SF=0)." ],
[ "CMOVNS", "REX.W+ 0F 49 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not sign (SF=0)." ],
[ "CMOVNZ", "0F 45 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if not zero (ZF=0)." ],
[ "CMOVNZ", "0F 45 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if not zero (ZF=0)." ],
[ "CMOVNZ", "REX.W+ 0F 45 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if not zero (ZF=0)." ],
[ "CMOVO", "0F 40 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if overflow (OF=1)." ],
[ "CMOVO", "0F 40 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if overflow (OF=1)." ],
[ "CMOVO", "REX.W+ 0F 40 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if overflow (OF=1)." ],
[ "CMOVP", "0F 4A /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if parity (PF=1)." ],
[ "CMOVP", "0F 4A /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if parity (PF=1)." ],
[ "CMOVP", "REX.W+ 0F 4A /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if parity (PF=1)." ],
[ "CMOVPE", "0F 4A /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if parity even (PF=1)." ],
[ "CMOVPE", "0F 4A /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if parity even (PF=1)." ],
[ "CMOVPE", "REX.W+ 0F 4A /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if parity even (PF=1)." ],
[ "CMOVPO", "0F 4B /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if parity odd (PF=0)." ],
[ "CMOVPO", "0F 4B /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if parity odd (PF=0)." ],
[ "CMOVPO", "REX.W+ 0F 4B /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if parity odd (PF=0)." ],
[ "CMOVS", "0F 48 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if sign (SF=1)." ],
[ "CMOVS", "0F 48 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if sign (SF=1)." ],
[ "CMOVS", "REX.W+ 0F 48 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if sign (SF=1)." ],
[ "CMOVZ", "0F 44 /r", "r16, r/m16", "RM", True, True, "Conditional Move", "Move if zero (ZF=1)." ],
[ "CMOVZ", "0F 44 /r", "r32, r/m32", "RM", True, True, "Conditional Move", "Move if zero (ZF=1)." ],
[ "CMOVZ", "REX.W+ 0F 44 /r", "r64, r/m64", "RM", True, False, "Conditional Move", "Move if zero (ZF=1)." ],
[ "CMP", "3C ib", "AL, imm8", "FI", True, True, "Compare Two Operands", "Compare imm8 with AL." ],
[ "CMP", "3D iw", "AX, imm16", "FI", True, True, "Compare Two Operands", "Compare imm16 with AX." ],
[ "CMP", "3D id", "EAX, imm32", "FI", True, True, "Compare Two Operands", "Compare imm32 with EAX." ],
[ "CMP", "REX.W+ 3D id", "RAX, imm32", "FI", True, False, "Compare Two Operands", "Compare imm32 sign-extended to 64-bits with RAX." ],
[ "CMP", "80 /7 ib", "r/m8, imm8", "MI", True, True, "Compare Two Operands", "Compare imm8 with r/m8." ],
[ "CMP", "REX+ 80 /7 ib", "r/m8, imm8", "MI", True, False, "Compare Two Operands", "Compare imm8 with r/m8." ],
[ "CMP", "81 /7 iw", "r/m16, imm16", "MI", True, True, "Compare Two Operands", "Compare imm16 with r/m16." ],
[ "CMP", "81 /7 id", "r/m32, imm32", "MI", True, True, "Compare Two Operands", "Compare imm32 with r/m32." ],
[ "CMP", "REX.W+ 81 /7 id", "r/m64, imm32", "MI", True, False, "Compare Two Operands", "Compare imm32 sign-extended to 64-bits with r/m64." ],
[ "CMP", "83 /7 ib", "r/m16, imm8", "MI", True, True, "Compare Two Operands", "Compare imm8 with r/m16." ],
[ "CMP", "83 /7 ib", "r/m32, imm8", "MI", True, True, "Compare Two Operands", "Compare imm8 with r/m32." ],
[ "CMP", "REX.W+ 83 /7 ib", "r/m64, imm8", "MI", True, False, "Compare Two Operands", "Compare imm8 with r/m64." ],
[ "CMP", "38 /r", "r/m8, r8", "MR", True, True, "Compare Two Operands", "Compare r8 with r/m8." ],
[ "CMP", "REX+ 38 /r", "r/m8, r8", "MR", True, False, "Compare Two Operands", "Compare r8 with r/m8." ],
[ "CMP", "39 /r", "r/m16, r16", "MR", True, True, "Compare Two Operands", "Compare r16 with r/m16." ],
[ "CMP", "39 /r", "r/m32, r32", "MR", True, True, "Compare Two Operands", "Compare r32 with r/m32." ],
[ "CMP", "REX.W+ 39 /r", "r/m64,r64", "MR", True, False, "Compare Two Operands", "Compare r64 with r/m64." ],
[ "CMP", "3A /r", "r8, r/m8", "RM", True, True, "Compare Two Operands", "Compare r/m8 with r8." ],
[ "CMP", "REX+ 3A /r", "r8, r/m8", "RM", True, False, "Compare Two Operands", "Compare r/m8 with  r8." ],
[ "CMP", "3B /r", "r16, r/m16", "RM", True, True, "Compare Two Operands", "Compare r/m16 with r16." ],
[ "CMP", "3B /r", "r32, r/m32", "RM", True, True, "Compare Two Operands", "Compare r/m32 with r32." ],
[ "CMP", "REX.W+ 3B /r", "r64, r/m64", "RM", True, False, "Compare Two Operands", "Compare r/m64 with r64." ],
[ "CMPS", "A6", "m8, m8", "", True, True, "Compare String Operands", "For legacy mode, compare byte at address DS:(E)SI with byte at address ES:(E)DI; For 64-bit mode compare byte at address (R|E)SI to byte at address (R|E)DI. The status flags are set accordingly." ],
[ "CMPS", "A7", "m16, m16", "", True, True, "Compare String Operands", "For legacy mode, compare word at address DS:(E)SI with word at address ES:(E)DI; For 64-bit mode compare word at address (R|E)SI with word at address (R|E)DI. The status flags are set accordingly." ],
[ "CMPS", "A7", "m32, m32", "", True, True, "Compare String Operands", "For legacy mode, compare dword at address DS:(E)SI at dword at address ES:(E)DI; For 64-bit mode compare dword at address (R|E)SI at dword at address (R|E)DI. The status flags are set accordingly." ],
[ "CMPS", "REX.W+ A7", "m64, m64", "", True, False, "Compare String Operands", "Compares quadword at address (R|E)SI with quadword at address (R|E)DI and sets the status flags accordingly." ],
[ "CMPSB", "A6", "", "", True, True, "Compare String Operands", "For legacy mode, compare byte at address DS:(E)SI with byte at address ES:(E)DI; For 64-bit mode compare byte at address (R|E)SI with byte at address (R|E)DI. The status flags are set accordingly." ],
[ "CMPSW", "A7", "", "", True, True, "Compare String Operands", "For legacy mode, compare word at address DS:(E)SI with word at address ES:(E)DI; For 64-bit mode compare word at address (R|E)SI with word at address (R|E)DI. The status flags are set accordingly." ],
[ "CMPSD", "A7", "", "", True, True, "Compare String Operands", "For legacy mode, compare dword at address DS:(E)SI with dword at address ES:(E)DI; For 64-bit mode compare dword at address (R|E)SI with dword at address (R|E)DI. The status flags are set accordingly." ],
[ "CMPSQ", "REX.W+ A7", "", "", True, False, "Compare String Operands", "Compares quadword at address (R|E)SI with quadword at address (R|E)DI and sets the status flags accordingly." ],
[ "CPUID", "0F A2", "", "", True, True, "CPU Identification", "Returns processor identification and feature information to the EAX, EBX, ECX, and EDX registers, as determined by input entered in EAX (in some cases, ECX as well)." ],
[ "CWD", "99", "", "", True, True, "Convert Word to Doubleword/Convert Doubleword to Quadword", "DX:AX <- sign-extend of AX." ],
[ "CDQ", "99", "", "", True, True, "Convert Word to Doubleword/Convert Doubleword to Quadword", "EDX:EAX <- sign-extend of EAX." ],
[ "CQO", "REX.W+ 99", "", "", True, False, "Convert Word to Doubleword/Convert Doubleword to Quadword", "RDX:RAX<- sign-extend of RAX." ],
[ "DAA", "27", "", "", False, True, "Decimal Adjust AL after Addition", "Decimal adjust AL after addition." ],
[ "DAS", "2F", "", "", False, True, "Decimal Adjust AL after Subtraction", "Decimal adjust AL after subtraction." ],
[ "DEC", "FE /1", "r/m8", "M", True, True, "Decrement by 1", "Decrement r/m8 by 1." ],
[ "DEC", "REX+ FE /1", "r/m8", "M", True, False, "Decrement by 1", "Decrement r/m8 by 1." ],
[ "DEC", "FF /1", "r/m16", "M", True, True, "Decrement by 1", "Decrement r/m16 by 1." ],
[ "DEC", "FF /1", "r/m32", "M", True, True, "Decrement by 1", "Decrement r/m32 by 1." ],
[ "DEC", "REX.W+ FF /1", "r/m64", "M", True, False, "Decrement by 1", "Decrement r/m64 by 1." ],
[ "DEC", "48+rw", "r16", "O", False, True, "Decrement by 1", "Decrement r16 by 1." ],
[ "DEC", "48+rd", "r32", "O", False, True, "Decrement by 1", "Decrement r32 by 1." ],
[ "DIV", "F6 /6", "r/m8", "M", True, True, "Unsigned Divide", "Unsigned divide AX by r/m8 , with result stored in AL <- Quotient, AH <- Remainder." ],
[ "DIV", "REX+ F6 /6", "r/m8", "M", True, False, "Unsigned Divide", "Unsigned divide AX by r/m8 , with result stored in AL <- Quotient, AH <- Remainder." ],
[ "DIV", "F7 /6", "r/m16", "M", True, True, "Unsigned Divide", "Unsigned divide DX:AX by r/m16 , with result stored in AX <- Quotient, DX <- Remainder." ],
[ "DIV", "F7 /6", "r/m32", "M", True, True, "Unsigned Divide", "Unsigned divide EDX:EAX by r/m32 , with result stored in EAX <- Quotient, EDX <- Remainder." ],
[ "DIV", "REX.W+ F7 /6", "r/m64", "M", True, False, "Unsigned Divide", "Unsigned divide RDX:RAX by r/m64 , with result stored in RAX <- Quotient, RDX <- Remainder." ],
[ "EMMS", "0F 77", "", "", True, True, "Empty MMX Technology State", "Set the x87 FPU tag word to empty." ],
[ "ENTER", "C8 iw 00", "imm16, 0", "II", True, True, "Make Stack Frame for Procedure Parameters", "Create a stack frame for a procedure." ],
[ "ENTER", "C8 iw 01", "imm16, 1", "II", True, True, "Make Stack Frame for Procedure Parameters", "Create a nested stack frame for a procedure." ],
[ "ENTER", "C8 iw ib", "imm16, imm8", "II", True, True, "Make Stack Frame for Procedure Parameters", "Create a nested stack frame for a procedure." ],
[ "HLT", "F4", "", "", True, True, "Halt", "" ],
[ "IDIV", "F6 /7", "r/m8", "M", True, True, "Signed Divide", "Signed divide AX by r/m 8, with result stored in: AL <- Quotient, AH <- Remainder." ],
[ "IDIV", "REX+ F6 /7", "r/m8", "M", True, False, "Signed Divide", "Signed divide AX by r/m 8, with result stored in AL <- Quotient, AH <- Remainder." ],
[ "IDIV", "F7 /7", "r/m16", "M", True, True, "Signed Divide", "Signed divide DX:AX by r/m16 , with result stored in AX <- Quotient, DX <- Remainder." ],
[ "IDIV", "F7 /7", "r/m32", "M", True, True, "Signed Divide", "Signed divide EDX:EAX by r/m32 , with result stored in EAX <- Quotient, EDX <- Remainder." ],
[ "IDIV", "REX.W+ F7 /7", "r/m64", "M", True, False, "Signed Divide", "Signed divide RDX:RAX by r/m64 , with result stored in RAX <- Quotient, RDX <- Remainder." ],
[ "IMUL", "F6 /5", "r/m8", "M", True, True, "Signed Multiply", "AX<- AL ∗ r/m byte." ],
[ "IMUL", "F7 /5", "r/m16", "M", True, True, "Signed Multiply", "DX:AX <- AX ∗ r/m word." ],
[ "IMUL", "F7 /5", "r/m32", "M", True, True, "Signed Multiply", "EDX:EAX <- EAX ∗ r/m 32." ],
[ "IMUL", "REX.W+ F7 /5", "r/m64", "M", True, False, "Signed Multiply", "RDX:RAX <- RAX ∗ r/m 64." ],
[ "IMUL", "0F AF /r", "r16, r/m16", "RM", True, True, "Signed Multiply", "word register <- word register ∗ r/m 16." ],
[ "IMUL", "0F AF /r", "r32, r/m32", "RM", True, True, "Signed Multiply", "doubleword register <- doubleword register ∗ r/m32." ],
[ "IMUL", "REX.W+ 0F AF /r", "r64, r/m64", "RM", True, False, "Signed Multiply", "Quadword register <- Quadword register ∗ r/m64." ],
[ "IMUL", "6B /r ib", "r16, r/m16, imm8", "RMI", True, True, "Signed Multiply", "word register <- r/m16 ∗ sign-extended immediate byte." ],
[ "IMUL", "6B /r ib", "r32, r/m32, imm8", "RMI", True, True, "Signed Multiply", "doubleword register <- r/m32 ∗ sign-extended immediate byte." ],
[ "IMUL", "REX.W+ 6B /r ib", "r64, r/m64, imm8", "RMI", True, False, "Signed Multiply", "Quadword register <- r/m64 ∗ sign-extended immediate byte." ],
[ "IMUL", "69 /r iw", "r16, r/m16, imm16", "RMI", True, True, "Signed Multiply", "word register <- r/m16 ∗ immediate word." ],
[ "IMUL", "69 /r id", "r32, r/m32, imm32", "RMI", True, True, "Signed Multiply", "doubleword register <- r/m32 ∗ immediate doubleword." ],
[ "IMUL", "REX.W+ 69 /r id", "r64, r/m64, imm32", "RMI", True, False, "Signed Multiply", "Quadword register <- r/m64 ∗ immediate doubleword." ],
[ "IN", "E4 ib", "AL, imm8", "FI", True, True, "Input from Port", "Input byte from imm8 I/O port address into AL." ],
[ "IN", "E5 ib", "AX, imm8", "FI", True, True, "Input from Port", "Input word from imm8 I/O port address into AX." ],
[ "IN", "E5 ib", "EAX, imm8", "FI", True, True, "Input from Port", "Input dword from imm8 I/O port address into EAX." ],
[ "IN", "EC", "AL,DX", "", True, True, "Input from Port", "Input byte from I/O port in DX into AL." ],
[ "IN", "ED", "AX,DX", "", True, True, "Input from Port", "Input word from I/O port in DX into AX." ],
[ "IN", "ED", "EAX,DX", "", True, True, "Input from Port", "Input doubleword from I/O port in DX into EAX." ],
[ "INC", "FE /0", "r/m8", "M", True, True, "Increment by 1", "Increment r/m byte by 1." ],
[ "INC", "REX+ FE /0", "r/m8", "M", True, False, "Increment by 1", "Increment r/m byte by 1." ],
[ "INC", "FF /0", "r/m16", "M", True, True, "Increment by 1", "Increment r/m word by 1." ],
[ "INC", "FF /0", "r/m32", "M", True, True, "Increment by 1", "Increment r/m doubleword by 1." ],
[ "INC", "REX.W+ FF /0", "r/m64", "M", True, False, "Increment by 1", "Increment r/m quadword by 1." ],
[ "INC", "40+ rw", "r16", "O", False, True, "Increment by 1", "Increment word register by 1." ],
[ "INC", "40+ rd", "r32", "O", False, True, "Increment by 1", "Increment doubleword register by 1." ],
[ "INS", "6C", "m8, DX", "", True, True, "Input from Port to String", "Input byte from I/O port specified in DX into memory location specified in ES:(E)DI or RDI.*" ],
[ "INS", "6D", "m16, DX", "", True, True, "Input from Port to String", "Input word from I/O port specified in DX into memory location specified in ES:(E)DI or RDI. 1" ],
[ "INS", "6D", "m32, DX", "", True, True, "Input from Port to String", "Input doubleword from I/O port specified in DX into memory location specified in ES:(E)DI or RDI. 1" ],
[ "INSB", "6C", "", "", True, True, "Input from Port to String", "Input byte from I/O port specified in DX into memory location specified with ES:(E)DI or RDI. 1" ],
[ "INSW", "6D", "", "", True, True, "Input from Port to String", "Input word from I/O port specified in DX into memory location specified in ES:(E)DI or RDI. 1" ],
[ "INSD", "6D", "", "", True, True, "Input from Port to String", "Input doubleword from I/O port specified in DX into memory location specified in ES:(E)DI or RDI. 1" ],
[ "INT", "CC", "3", "", True, True, "Call to Interrupt Procedure", "Interrupt 3—trap to debugger." ],
[ "INT", "CD ib", "imm8", "I", True, True, "Call to Interrupt Procedure", "Interrupt vector specified by immediate byte." ],
[ "INTO", "CE", "", "", False, True, "Call to Interrupt Procedure", "Interrupt 4—if overflow flag is 1." ],
[ "INVD", "0F 08", "", "", True, True, "Invalidate Internal Caches", "Flush internal caches; initiate flushing of external caches." ],
[ "INVLPG", "0F 01 /7", "m", "M", True, True, "Invalidate TLB Entries", "Invalidate TLB entries for page containing m." ],
[ "IRET", "CF", "", "", True, True, "Interrupt Return", "Interrupt return (16-bit operand size)." ],
[ "IRETD", "CF", "", "", True, True, "Interrupt Return", "Interrupt return (32-bit operand size)." ],
[ "IRETQ", "REX.W+ CF", "", "", True, False, "Interrupt Return", "Interrupt return (64-bit operand size)." ],
[ "JMP", "EB cb", "rel8", "D", True, True, "Jump", "Jump short, RIP = RIP + 8-bit displacement sign extended to 64-bits" ],
[ "JMP", "E9 cw", "rel16", "D", False, True, "Jump", "Jump near, relative, displacement relative to next instruction. Not supported in 64-bit mode." ],
[ "JMP", "E9 cd", "rel32", "D", True, True, "Jump", "Jump near, relative, RIP = RIP + 32-bit displacement sign extended to 64-bits" ],
[ "JMP", "FF /4", "r/m16", "M", False, True, "Jump", "Jump near, absolute indirect, address = zero-extended r/m16. Not supported in 64-bit mode." ],
[ "JMP", "FF /4", "r/m32", "M", False, True, "Jump", "Jump near, absolute indirect, address given in r/m32. Not supported in 64-bit mode." ],
[ "JMP", "FF /4", "r/m64", "M", True, False, "Jump", "Jump near, absolute indirect, RIP = 64-Bit offset from register or memory" ],
[ "JMP", "EA cd", "ptr16:16", "D", False, True, "Jump", "Jump far, absolute, address given in operand" ],
[ "JMP", "EA cp", "ptr16:32", "D", False, True, "Jump", "Jump far, absolute, address given in operand" ],
[ "JMP", "FF /5", "m16:16", "D", True, True, "Jump", "Jump far, absolute indirect, address given in m16:16" ],
[ "JMP", "FF /5", "m16:32", "D", True, True, "Jump", "Jump far, absolute indirect, address given in m16:32." ],
[ "JMP", "REX.W+ FF /5", "m16:64", "D", True, False, "Jump", "Jump far, absolute indirect, address given in m16:64." ],
[ "LAHF", "9F", "", "", False, True, "Load Status Flags into AH Register", "Load: AH <- EFLAGS(SF:ZF:0:AF:0:PF:1:CF)." ],
[ "LAR", "0F 02 /r", "r16, r16/m16", "RM", True, True, "Load Access Rights Byte", "r16 <- access rights referenced by r16/m16" ],
[ "LAR", "0F 02 /r", "reg, r32/m16 1", "RM", True, True, "Load Access Rights Byte", "reg <- access rights referenced by r32/m16" ],
[ "LDS", "C5 /r", "r16,m16:16", "RM", False, True, "Load Far Pointer", "Load DS: r16 with far pointer from memory." ],
[ "LDS", "C5 /r", "r32,m16:32", "RM", False, True, "Load Far Pointer", "Load DS: r32 with far pointer from memory." ],
[ "LSS", "0F B2 /r", "r16,m16:16", "RM", True, True, "Load Far Pointer", "Load SS: r16 with far pointer from memory." ],
[ "LSS", "0F B2 /r", "r32,m16:32", "RM", True, True, "Load Far Pointer", "Load SS: r32 with far pointer from memory." ],
[ "LSS", "REX+ 0F B2 /r", "r64,m16:64", "RM", True, False, "Load Far Pointer", "Load SS: r64 with far pointer from memory." ],
[ "LES", "C4 /r", "r16,m16:16", "RM", False, True, "Load Far Pointer", "Load ES: r16 with far pointer from memory." ],
[ "LES", "C4 /r", "r32,m16:32", "RM", False, True, "Load Far Pointer", "Load ES: r32 with far pointer from memory." ],
[ "LFS", "0F B4 /r", "r16,m16:16", "RM", True, True, "Load Far Pointer", "Load FS: r16 with far pointer from memory." ],
[ "LFS", "0F B4 /r", "r32,m16:32", "RM", True, True, "Load Far Pointer", "Load FS: r32 with far pointer from memory." ],
[ "LFS", "REX+ 0F B4 /r", "r64,m16:64", "RM", True, False, "Load Far Pointer", "Load FS: r64 with far pointer from memory." ],
[ "LGS", "0F B5 /r", "r16,m16:16", "RM", True, True, "Load Far Pointer", "Load GS: r16 with far pointer from memory." ],
[ "LGS", "0F B5 /r", "r32,m16:32", "RM", True, True, "Load Far Pointer", "Load GS: r32 with far pointer from memory." ],
[ "LGS", "REX+ 0F B5 /r", "r64,m16:64", "RM", True, False, "Load Far Pointer", "Load GS: r64 with far pointer from memory." ],
[ "LEA", "8D /r", "r16,m16", "RM", True, True, "Load Effective Address", "Store effective address for m in register r16." ],
[ "LEA", "8D /r", "r32,m32", "RM", True, True, "Load Effective Address", "Store effective address for m in register r32." ],
[ "LEA", "REX.W+ 8D /r", "r64,m64", "RM", True, False, "Load Effective Address", "Store effective address for m in register r64." ],
[ "LEAVE", "C9", "", "", True, True, "High Level Procedure Exit", "Set SP to BP, then pop BP." ],
[ "LEAVE", "C9", "", "", False, True, "High Level Procedure Exit", "Set ESP to EBP, then pop EBP." ],
[ "LEAVE", "C9", "", "", True, False, "High Level Procedure Exit", "Set RSP to RBP, then pop RBP." ],
[ "LFENCE", "0F AE E8", "", "", True, True, "Load Fence", "Serializes load operations." ],
[ "LGDT", "0F 01 /2", "m16&32", "M", False, True, "Load Global/Interrupt Descriptor Table Register", "Load m into GDTR." ],
[ "LIDT", "0F 01 /3", "m16&32", "M", False, True, "Load Global/Interrupt Descriptor Table Register", "Load m into IDTR." ],
[ "LGDT", "0F 01 /2", "m16&64", "M", True, False, "Load Global/Interrupt Descriptor Table Register", "Load m into GDTR." ],
[ "LIDT", "0F 01 /3", "m16&64", "M", True, False, "Load Global/Interrupt Descriptor Table Register", "Load m into IDTR." ],
[ "LLDT", "0F 00 /2", "r/m16", "M", True, True, "Load Local Descriptor Table Register", "Load segment selector r/m 16 into LDTR." ],
[ "LMSW", "0F 01 /6", "r/m16", "M", True, True, "Load Machine Status Word", "Loads r/m 16 in machine status word of CR0." ],
[ "LOCK", "F0", "", "", True, True, "Assert LOCK# Signal Prefix", "Asserts LOCK# signal for duration of the accompanying instruction." ],
[ "LODS", "AC", "m8", "", True, True, "Load String", "For legacy mode, Load byte at address DS:(E)SI into AL. For 64-bit mode load byte at address (R)SI into AL." ],
[ "LODS", "AD", "m16", "", True, True, "Load String", "For legacy mode, Load word at address DS:(E)SI into AX. For 64-bit mode load word at address (R)SI into AX." ],
[ "LODS", "AD", "m32", "", True, True, "Load String", "For legacy mode, Load dword at address DS:(E)SI into EAX. For 64-bit mode load dword at address (R)SI into EAX." ],
[ "LODS", "REX.W+ AD", "m64", "", True, False, "Load String", "Load qword at address (R)SI into RAX." ],
[ "LODSB", "AC", "", "", True, True, "Load String", "For legacy mode, Load byte at address DS:(E)SI into AL. For 64-bit mode load byte at address (R)SI into AL." ],
[ "LODSW", "AD", "", "", True, True, "Load String", "For legacy mode, Load word at address DS:(E)SI into AX. For 64-bit mode load word at address (R)SI into AX." ],
[ "LODSD", "AD", "", "", True, True, "Load String", "For legacy mode, Load dword at address DS:(E)SI into EAX. For 64-bit mode load dword at address (R)SI into EAX." ],
[ "LODSQ", "REX.W+ AD", "", "", True, False, "Load String", "Load qword at address (R)SI into RAX." ],
[ "LOOP", "E2 cb", "rel8", "D", True, True, "Loop According to ECX Counter", "Decrement count; jump short if count <>0." ],
[ "LOOPE", "E1 cb", "rel8", "D", True, True, "Loop According to ECX Counter", "Decrement count; jump short if count <>0 and ZF = 1." ],
[ "LOOPNE", "E0 cb", "rel8", "D", True, True, "Loop According to ECX Counter", "Decrement count; jump short if count <>0 and ZF = 0." ],
[ "LSL", "0F 03 /r", "r16, r16/m16", "RM", True, True, "Load Segment Limit", "Load: r16 <- segment limit, selector r16/m16." ],
[ "LSL", "0F 03 /r", "r32, r32/m16", "RM", True, True, "Load Segment Limit", "Load: r32 <- segment limit, selector r32/m16." ],
[ "LSL", "REX.W+ 0F 03 /r", "r64, r32/m16", "RM", True, True, "Load Segment Limit", "Load: r64 <- segment limit, selector r32/m16" ],
[ "LTR", "0F 00 /3", "r/m16", "M", True, True, "Load Task Register", "Load r/m 16 into task register." ],
[ "MFENCE", "0F AE F0", "", "", True, True, "Memory Fence", "Serializes load and store operations." ],
[ "MONITOR", "0F 01 C8", "", "", True, True, "Set Up Monitor Address", "Sets up a linear address range to be monitored by hardware and activates the monitor. The address range should be a write-back memory caching type. The address is DS:EAX (DS:RAX in 64-bit mode)." ],
[ "MOV", "88 /r", "r/m8,r8", "MR", True, True, "Move", "Move r8 to r/m8." ],
[ "MOV", "REX+ 88 /r", "r/m8, r8", "MR", True, False, "Move", "Move r8 to r/m8." ],
[ "MOV", "89 /r", "r/m16,r16", "MR", True, True, "Move", "Move r16 to r/m16." ],
[ "MOV", "89 /r", "r/m32,r32", "MR", True, True, "Move", "Move r32 to r/m32." ],
[ "MOV", "REX.W+ 89 /r", "r/m64,r64", "MR", True, False, "Move", "Move r64 to r/m64." ],
[ "MOV", "8A /r", "r8,r/m8", "RM", True, True, "Move", "Move r/m8 to r8." ],
[ "MOV", "REX+ 8A /r", "r8,r/m8", "RM", True, False, "Move", "Move r/m8 to r8." ],
[ "MOV", "8B /r", "r16,r/m16", "RM", True, True, "Move", "Move r/m16 to r16." ],
[ "MOV", "8B /r", "r32,r/m32", "RM", True, True, "Move", "Move r/m32 to r32." ],
[ "MOV", "REX.W+ 8B /r", "r64,r/m64", "RM", True, False, "Move", "Move r/m64 to r64." ],
[ "MOV", "8C /r", "r/m16,Sreg", "MR", True, True, "Move", "Move segment register to r/m16." ],
[ "MOV", "REX.W+ 8C /r", "r/m64,Sreg", "MR", True, True, "Move", "Move zero extended 16-bit segment register to r/m64." ],
[ "MOV", "8E /r", "Sreg,r/m16", "RM", True, True, "Move", "Move r/m16 to segment register." ],
[ "MOV", "REX.W+ 8E /r", "Sreg,r/m64", "RM", True, True, "Move", "Move lower 16 bits of r/m64 to segment register." ],
[ "MOV", "A0", "AL, moffs8", "FD", True, True, "Move", "Move byte at ( seg:offset ) to AL." ],
[ "MOV", "REX.W+ A0", "AL, moffs8", "FD", True, False, "Move", "Move byte at ( offset ) to AL." ],
[ "MOV", "A1", "AX, moffs16", "FD", True, True, "Move", "Move word at ( seg:offset ) to AX." ],
[ "MOV", "A1", "EAX, moffs32", "FD", True, True, "Move", "Move doubleword at ( seg:offset ) to EAX." ],
[ "MOV", "REX.W+ A1", "RAX, moffs64", "FD", True, False, "Move", "Move quadword at ( offset ) to RAX." ],
[ "MOV", "A2", "moffs8, AL", "TD", True, True, "Move", "Move AL to ( seg:offset )." ],
[ "MOV", "REX.W+ A2", "moffs8, AL", "TD", True, False, "Move", "Move AL to ( offset )." ],
[ "MOV", "A3", "moffs16,AX", "TD", True, True, "Move", "Move AX to ( seg:offset )." ],
[ "MOV", "A3", "moffs32,EAX", "TD", True, True, "Move", "Move EAX to ( seg:offset )." ],
[ "MOV", "REX.W+ A3", "moffs64,RAX", "TD", True, False, "Move", "Move RAX to ( offset )." ],
[ "MOV", "B0+ rb ib", "r8, imm8", "OI", True, True, "Move", "Move imm8 to r8." ],
[ "MOV", "REX+ B0+ rb ib", "r8, imm8", "OI", True, False, "Move", "Move imm8 to r8." ],
[ "MOV", "B8+ rw iw", "r16, imm16", "OI", True, True, "Move", "Move imm16 to r16." ],
[ "MOV", "B8+ rd id", "r32, imm32", "OI", True, True, "Move", "Move imm32 to r32." ],
[ "MOV", "REX.W+ B8+ rd io", "r64, imm64", "OI", True, False, "Move", "Move imm64 to r64." ],
[ "MOV", "C6 /0 ib", "r/m8, imm8", "MI", True, True, "Move", "Move imm8 to r/m8." ],
[ "MOV", "REX+ C6 /0 ib", "r/m8, imm8", "MI", True, False, "Move", "Move imm8 to r/m8." ],
[ "MOV", "C7 /0 iw", "r/m16, imm16", "MI", True, True, "Move", "Move imm16 to r/m16." ],
[ "MOV", "C7 /0 id", "r/m32, imm32", "MI", True, True, "Move", "Move imm32 to r/m32." ],
[ "MOV", "REX.W+ C7 /0 io", "r/m64, imm32", "MI", True, False, "Move", "Move imm32 sign extended to 64-bits to r/m64." ],
[ "MOVBE", "0F 38 F0 /r", "r16, m16", "RM", True, True, "Move Data After Swapping Bytes", "Reverse byte order in m16 and move to r16." ],
[ "MOVBE", "0F 38 F0 /r", "r32, m32", "RM", True, True, "Move Data After Swapping Bytes", "Reverse byte order in m32 and move to r32." ],
[ "MOVBE", "REX.W+ 0F 38 F0 /r", "r64, m64", "RM", True, False, "Move Data After Swapping Bytes", "Reverse byte order in m64 and move to r64." ],
[ "MOVBE", "0F 38 F1 /r", "m16, r16", "MR", True, True, "Move Data After Swapping Bytes", "Reverse byte order in r16 and move to m16." ],
[ "MOVBE", "0F 38 F1 /r", "m32, r32", "MR", True, True, "Move Data After Swapping Bytes", "Reverse byte order in r32 and move to m32." ],
[ "MOVBE", "REX.W+ 0F 38 F1 /r", "m64, r64", "MR", True, False, "Move Data After Swapping Bytes", "Reverse byte order in r64 and move to m64." ],
[ "MOVNTI", "0F C3 /r", "m32, r32", "MR", True, True, "Store Doubleword Using Non-Temporal Hint", "Move doubleword from r32 to m32 using non-temporal hint." ],
[ "MOVNTI", "REX.W+ 0F C3 /r", "m64,  r64", "MR", True, False, "Store Doubleword Using Non-Temporal Hint", "Move quadword from r64 to m64 using non-temporal hint." ],
[ "MOVNTQ", "0F E7 /r", "m64, mm", "MR", True, True, "Store of Quadword Using Non-Temporal Hint", "Move quadword from mm to m64 using non-temporal hint." ],
[ "MOVSX", "0F BE /r", "r16, r/m8", "RM", True, True, "Move with Sign-Extension", "Move byte to word with sign-extension." ],
[ "MOVSX", "0F BE /r", "r32, r/m8", "RM", True, True, "Move with Sign-Extension", "Move byte to doubleword with sign-extension." ],
[ "MOVSX", "REX+ 0F BE /r", "r64, r/m8", "RM", True, False, "Move with Sign-Extension", "Move byte to quadword with sign-extension." ],
[ "MOVSX", "0F BF /r", "r32, r/m16", "RM", True, True, "Move with Sign-Extension", "Move word to doubleword, with sign-extension." ],
[ "MOVSX", "REX.W+ 0F BF /r", "r64, r/m16", "RM", True, False, "Move with Sign-Extension", "Move word to quadword with sign-extension." ],
[ "MOVSXD", "REX.W+ 63 /r", "r64, r/m32", "RM", True, False, "Move with Sign-Extension", "Move doubleword to quadword with sign-extension." ],
[ "MOVS", "A4", "m8, m8", "", True, True, "Move Data from String to String", "For legacy mode, Move byte from address DS:(E)SI to ES:(E)DI. For 64-bit mode move byte from address (R|E)SI to (R|E)DI." ],
[ "MOVS", "A5", "m16, m16", "", True, True, "Move Data from String to String", "For legacy mode, move word from address DS:(E)SI to ES:(E)DI. For 64-bit mode move word at address (R|E)SI to (R|E)DI." ],
[ "MOVS", "A5", "m32, m32", "", True, True, "Move Data from String to String", "For legacy mode, move dword from address DS:(E)SI to ES:(E)DI. For 64-bit mode move dword from address (R|E)SI to (R|E)DI." ],
[ "MOVS", "REX.W+ A5", "m64, m64", "", True, False, "Move Data from String to String", "Move qword from address (R|E)SI to (R|E)DI." ],
[ "MOVSB", "A4", "", "", True, True, "Move Data from String to String", "For legacy mode, Move byte from address DS:(E)SI to ES:(E)DI. For 64-bit mode move byte from address (R|E)SI to (R|E)DI." ],
[ "MOVSW", "A5", "", "", True, True, "Move Data from String to String", "For legacy mode, move word from address DS:(E)SI to ES:(E)DI. For 64-bit mode move word at address (R|E)SI to (R|E)DI." ],
[ "MOVSD", "A5", "", "", True, True, "Move Data from String to String", "For legacy mode, move dword from address DS:(E)SI to ES:(E)DI. For 64-bit mode move dword from address (R|E)SI to (R|E)DI." ],
[ "MOVSQ", "REX.W+ A5", "", "", True, False, "Move Data from String to String", "Move qword from address (R|E)SI to (R|E)DI." ],
[ "MOVZX", "0F B6 /r", "r16, r/m8", "RM", True, True, "Move with Zero-Extend", "Move byte to word with zero-extension." ],
[ "MOVZX", "0F B6 /r", "r32, r/m8", "RM", True, True, "Move with Zero-Extend", "Move byte to doubleword, zero-extension." ],
[ "MOVZX", "REX.W+ 0F B6 /r", "r64, r/m8", "RM", True, False, "Move with Zero-Extend", "Move byte to quadword, zero-extension." ],
[ "MOVZX", "0F B7 /r", "r32, r/m16", "RM", True, True, "Move with Zero-Extend", "Move word to doubleword, zero-extension." ],
[ "MOVZX", "REX.W+ 0F B7 /r", "r64, r/m16", "RM", True, False, "Move with Zero-Extend", "Move word to quadword, zero-extension." ],
[ "MUL", "F6 /4", "r/m8", "M", True, True, "Unsigned Multiply", "Unsigned multiply (AX <- AL ∗ r/m8 )." ],
[ "MUL", "REX+ F6 /4", "r/m8", "M", True, False, "Unsigned Multiply", "Unsigned multiply (AX <- AL ∗ r/m8 )." ],
[ "MUL", "F7 /4", "r/m16", "M", True, True, "Unsigned Multiply", "Unsigned multiply (DX:AX <- AX ∗ r/m16 )." ],
[ "MUL", "F7 /4", "r/m32", "M", True, True, "Unsigned Multiply", "Unsigned multiply (EDX:EAX <- EAX ∗ r/m32 )." ],
[ "MUL", "REX.W+ F7 /4", "r/m64", "M", True, False, "Unsigned Multiply", "Unsigned multiply (RDX:RAX <- RAX ∗ r/m64)." ],
[ "MWAIT", "0F 01 C9", "", "", True, True, "Monitor Wait", "A hint that allow the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events." ],
[ "NEG", "F6 /3", "r/m8", "M", True, True, "Two's Complement Negation", "Two's complement negate r/m8." ],
[ "NEG", "REX+ F6 /3", "r/m8", "M", True, False, "Two's Complement Negation", "Two's complement negate r/m8." ],
[ "NEG", "F7 /3", "r/m16", "M", True, True, "Two's Complement Negation", "Two's complement negate r/m16." ],
[ "NEG", "F7 /3", "r/m32", "M", True, True, "Two's Complement Negation", "Two's complement negate r/m32." ],
[ "NEG", "REX.W+ F7 /3", "r/m64", "M", True, False, "Two's Complement Negation", "Two's complement negate r/m64." ],
[ "NOP", "90", "", "", True, True, "No Operation", "One byte no-operation instruction." ],
[ "NOP", "0F 1F /0", "r/m16", "M", True, True, "No Operation", "Multi-byte no-operation instruction." ],
[ "NOP", "0F 1F /0", "r/m32", "M", True, True, "No Operation", "Multi-byte no-operation instruction." ],
[ "NOT", "F6 /2", "r/m8", "M", True, True, "One's Complement Negation", "Reverse each bit of r/m8." ],
[ "NOT", "REX+ F6 /2", "r/m8", "M", True, False, "One's Complement Negation", "Reverse each bit of r/m8." ],
[ "NOT", "F7 /2", "r/m16", "M", True, True, "One's Complement Negation", "Reverse each bit of r/m16." ],
[ "NOT", "F7 /2", "r/m32", "M", True, True, "One's Complement Negation", "Reverse each bit of r/m32." ],
[ "NOT", "REX.W+ F7 /2", "r/m64", "M", True, False, "One's Complement Negation", "Reverse each bit of r/m64." ],
[ "OR", "0C ib", "AL, imm8", "FI", True, True, "Logical Inclusive OR", "AL OR imm8." ],
[ "OR", "0D iw", "AX, imm16", "FI", True, True, "Logical Inclusive OR", "AX OR imm16." ],
[ "OR", "0D id", "EAX, imm32", "FI", True, True, "Logical Inclusive OR", "EAX OR imm32." ],
[ "OR", "REX.W+ 0D id", "RAX, imm32", "FI", True, False, "Logical Inclusive OR", "RAX OR imm32 (sign-extended)." ],
[ "OR", "80 /1 ib", "r/m8, imm8", "MI", True, True, "Logical Inclusive OR", "r/m8 OR imm8." ],
[ "OR", "REX+ 80 /1 ib", "r/m8, imm8", "MI", True, False, "Logical Inclusive OR", "r/m8 OR imm8." ],
[ "OR", "81 /1 iw", "r/m16, imm16", "MI", True, True, "Logical Inclusive OR", "r/m16 OR imm16." ],
[ "OR", "81 /1 id", "r/m32, imm32", "MI", True, True, "Logical Inclusive OR", "r/m32 OR imm32." ],
[ "OR", "REX.W+ 81 /1 id", "r/m64, imm32", "MI", True, False, "Logical Inclusive OR", "r/m64 OR imm32 (sign-extended)." ],
[ "OR", "83 /1 ib", "r/m16, imm8", "MI", True, True, "Logical Inclusive OR", "r/m16 OR imm8 (sign-extended)." ],
[ "OR", "83 /1 ib", "r/m32, imm8", "MI", True, True, "Logical Inclusive OR", "r/m32 OR imm8 (sign-extended)." ],
[ "OR", "REX.W+ 83 /1 ib", "r/m64, imm8", "MI", True, False, "Logical Inclusive OR", "r/m64 OR imm8 (sign-extended)." ],
[ "OR", "08 /r", "r/m8, r8", "MR", True, True, "Logical Inclusive OR", "r/m8 OR r8." ],
[ "OR", "REX+ 08 /r", "r/m8, r8", "MR", True, False, "Logical Inclusive OR", "r/m8 OR r8." ],
[ "OR", "09 /r", "r/m16, r16", "MR", True, True, "Logical Inclusive OR", "r/m16 OR r16." ],
[ "OR", "09 /r", "r/m32, r32", "MR", True, True, "Logical Inclusive OR", "r/m32 OR r32." ],
[ "OR", "REX.W+ 09 /r", "r/m64, r64", "MR", True, False, "Logical Inclusive OR", "r/m64 OR r64." ],
[ "OR", "0A /r", "r8, r/m8", "RM", True, True, "Logical Inclusive OR", "r8 OR r/m8." ],
[ "OR", "REX+ 0A /r", "r8, r/m8", "RM", True, False, "Logical Inclusive OR", "r8 OR r/m8." ],
[ "OR", "0B /r", "r16, r/m16", "RM", True, True, "Logical Inclusive OR", "r16 OR r/m16." ],
[ "OR", "0B /r", "r32, r/m32", "RM", True, True, "Logical Inclusive OR", "r32 OR r/m32." ],
[ "OR", "REX.W+ 0B /r", "r64, r/m64", "RM", True, False, "Logical Inclusive OR", "r64 OR r/m64." ],
[ "PAUSE", "F3 90", "", "", True, True, "Spin Loop Hint", "Gives hint to processor that improves performance of spin-wait loops." ],
[ "POP", "8F /0", "r/m16", "M", True, True, "Pop a Value from the Stack", "Pop top of stack into m16; increment stack pointer." ],
[ "POP", "8F /0", "r/m32", "M", False, True, "Pop a Value from the Stack", "Pop top of stack into m32; increment stack pointer." ],
[ "POP", "8F /0", "r/m64", "M", True, False, "Pop a Value from the Stack", "Pop top of stack into m64; increment stack pointer. Cannot encode 32-bit operand size." ],
[ "POP", "58+ rw", "r16", "O", True, True, "Pop a Value from the Stack", "Pop top of stack into r16; increment stack pointer." ],
[ "POP", "58+ rd", "r32", "O", False, True, "Pop a Value from the Stack", "Pop top of stack into r32; increment stack pointer." ],
[ "POP", "58+ rd", "r64", "O", True, False, "Pop a Value from the Stack", "Pop top of stack into r64; increment stack pointer. Cannot encode 32-bit operand size." ],
[ "POP", "1F", "DS", "F", False, True, "Pop a Value from the Stack", "Pop top of stack into DS; increment stack pointer." ],
[ "POP", "07", "ES", "F", False, True, "Pop a Value from the Stack", "Pop top of stack into ES; increment stack pointer." ],
[ "POP", "17", "SS", "F", False, True, "Pop a Value from the Stack", "Pop top of stack into SS; increment stack pointer." ],
[ "POP", "0F A1", "FS", "F", True, True, "Pop a Value from the Stack", "Pop top of stack into FS; increment stack pointer by 16 bits." ],
[ "POP", "0F A1", "FS", "F", False, True, "Pop a Value from the Stack", "Pop top of stack into FS; increment stack pointer by 32 bits." ],
[ "POP", "0F A1", "FS", "F", True, False, "Pop a Value from the Stack", "Pop top of stack into FS; increment stack pointer by 64 bits." ],
[ "POP", "0F A9", "GS", "F", True, True, "Pop a Value from the Stack", "Pop top of stack into GS; increment stack pointer by 16 bits." ],
[ "POP", "0F A9", "GS", "F", False, True, "Pop a Value from the Stack", "Pop top of stack into GS; increment stack pointer by 32 bits." ],
[ "POP", "0F A9", "GS", "F", True, False, "Pop a Value from the Stack", "Pop top of stack into GS; increment stack pointer by 64 bits." ],
[ "POPA", "61", "", "", False, True, "Pop All General-Purpose Registers", "Pop DI, SI, BP, BX, DX, CX, and AX." ],
[ "POPAD", "61", "", "", False, True, "Pop All General-Purpose Registers", "Pop EDI, ESI, EBP, EBX, EDX, ECX, and EAX." ],
[ "POPCNT", "F3 0F B8 /r", "r16, r/m16", "RM", True, True, "Return the Count of Number of Bits Set to 1", "POPCNT on r/m16" ],
[ "POPCNT", "F3 0F B8 /r", "r32, r/m32", "RM", True, True, "Return the Count of Number of Bits Set to 1", "POPCNT on r/m32" ],
[ "POPCNT", "F3 REX.W 0F B8 /r", "r64, r/m64", "RM", True, False, "Return the Count of Number of Bits Set to 1", "POPCNT on r/m64" ],
[ "POPF", "9D", "", "", True, True, "Pop Stack into EFLAGS Register", "Pop top of stack into lower 16 bits of EFLAGS." ],
[ "POPFD", "9D", "", "", False, True, "Pop Stack into EFLAGS Register", "Pop top of stack into EFLAGS." ],
[ "POPFQ", "9D", "", "", True, False, "Pop Stack into EFLAGS Register", "Pop top of stack and zero-extend into RFLAGS." ],
[ "PREFETCHT0", "0F 18 /1", "m8", "M", True, True, "Prefetch Data Into Caches", "Move data from m8 closer to the processor using T0 hint." ],
[ "PREFETCHT1", "0F 18 /2", "m8", "M", True, True, "Prefetch Data Into Caches", "Move data from m8 closer to the processor using T1 hint." ],
[ "PREFETCHT2", "0F 18 /3", "m8", "M", True, True, "Prefetch Data Into Caches", "Move data from m8 closer to the processor using T2 hint." ],
[ "PREFETCHNTA", "0F 18 /0", "m8", "M", True, True, "Prefetch Data Into Caches", "Move data from m8 closer to the processor using NTA hint." ],
[ "PUSHA", "60", "", "", False, True, "Push All General-Purpose Registers", "Push AX, CX, DX, BX, original SP, BP, SI, and DI." ],
[ "PUSHAD", "60", "", "", False, True, "Push All General-Purpose Registers", "Push EAX, ECX, EDX, EBX, original ESP, EBP, ESI, and EDI." ],
[ "SHL", "REX.W+ D1 /4", "r/m64, 1", "M1", True, False, "Shift", "Multiply r/m64 by 2, once." ],
[ "SHL", "D3 /4", "r/m32, CL", "MC", True, True, "Shift", "Multiply r/m32 by 2, CL times." ],
[ "SHL", "REX.W+ D3 /4", "r/m64, CL", "MC", True, False, "Shift", "Multiply r/m64 by 2, CL times." ],
[ "SHL", "C1 /4 ib", "r/m32, imm8", "MI", True, True, "Shift", "Multiply r/m32 by 2, imm8 times." ],
[ "SHL", "REX.W+ C1 /4 ib", "r/m64, imm8", "MI", True, False, "Shift", "Multiply r/m64 by 2, imm8 times." ],
[ "SHR", "D0 /5", "r/m8, 1", "M1", True, True, "Shift", "Unsigned divide r/m8 by 2, once." ],
[ "SHR", "REX+ D0 /5", "r/m8, 1", "M1", True, False, "Shift", "Unsigned divide r/m8 by 2, once." ],
[ "SHR", "D2 /5", "r/m8, CL", "MC", True, True, "Shift", "Unsigned divide r/m8 by 2, CL times." ],
[ "SHR", "REX+ D2 /5", "r/m8, CL", "MC", True, False, "Shift", "Unsigned divide r/m8 by 2, CL times." ],
[ "SHR", "C0 /5 ib", "r/m8, imm8", "MI", True, True, "Shift", "Unsigned divide r/m8 by 2, imm8 times." ],
[ "SHR", "REX+ C0 /5 ib", "r/m8, imm8", "MI", True, False, "Shift", "Unsigned divide r/m8 by 2, imm8 times." ],
[ "SHR", "D1 /5", "r/m16, 1", "M1", True, True, "Shift", "Unsigned divide r/m16 by 2, once." ],
[ "SHR", "D3 /5", "r/m16, CL", "MC", True, True, "Shift", "Unsigned divide r/m16 by 2, CL times" ],
[ "SHR", "C1 /5 ib", "r/m16, imm8", "MI", True, True, "Shift", "Unsigned divide r/m16 by 2, imm8 times." ],
[ "SHR", "D1 /5", "r/m32, 1", "M1", True, True, "Shift", "Unsigned divide r/m32 by 2, once." ],
[ "SHR", "REX.W+ D1 /5", "r/m64, 1", "M1", True, False, "Shift", "Unsigned divide r/m64 by 2, once." ],
[ "SHR", "D3 /5", "r/m32, CL", "MC", True, True, "Shift", "Unsigned divide r/m32 by 2, CL times." ],
[ "SHR", "REX.W+ D3 /5", "r/m64, CL", "MC", True, False, "Shift", "Unsigned divide r/m64 by 2, CL times." ],
[ "SHR", "C1 /5 ib", "r/m32, imm8", "MI", True, True, "Shift", "Unsigned divide r/m32 by 2, imm8 times." ],
[ "SHR", "REX.W+ C1 /5 ib", "r/m64, imm8", "MI", True, False, "Shift", "Unsigned divide r/m64 by 2, imm8 times." ],
[ "SBB", "1C ib", "AL, imm8", "FI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow imm8 from AL." ],
[ "SBB", "1D iw", "AX, imm16", "FI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow imm16 from AX." ],
[ "SBB", "1D id", "EAX, imm32", "FI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow imm32 from EAX." ],
[ "SBB", "REX.W+ 1D id", "RAX, imm32", "FI", True, False, "Integer Subtraction with Borrow", "Subtract with borrow sign-extended imm.32 to 64-bits from RAX." ],
[ "SBB", "80 /3 ib", "r/m8, imm8", "MI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow imm8 from r/m8." ],
[ "SBB", "REX+ 80 /3 ib", "r/m8, imm8", "MI", True, False, "Integer Subtraction with Borrow", "Subtract with borrow imm8 from r/m8." ],
[ "SBB", "81 /3 iw", "r/m16, imm16", "MI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow imm16 from r/m16." ],
[ "SBB", "81 /3 id", "r/m32, imm32", "MI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow imm32 from r/m32." ],
[ "SBB", "REX.W+ 81 /3 id", "r/m64, imm32", "MI", True, False, "Integer Subtraction with Borrow", "Subtract with borrow sign-extended imm32 to 64-bits from r/m64." ],
[ "SBB", "83 /3 ib", "r/m16, imm8", "MI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow sign-extended imm8 from r/m16." ],
[ "SBB", "83 /3 ib", "r/m32, imm8", "MI", True, True, "Integer Subtraction with Borrow", "Subtract with borrow sign-extended imm8 from r/m32." ],
[ "SBB", "REX.W+ 83 /3 ib", "r/m64, imm8", "MI", True, False, "Integer Subtraction with Borrow", "Subtract with borrow sign-extended imm8 from r/m64." ],
[ "SBB", "18 /r", "r/m8, r8", "MR", True, True, "Integer Subtraction with Borrow", "Subtract with borrow r8 from r/m8." ],
[ "SBB", "REX+ 18 /r", "r/m8, r8", "MR", True, False, "Integer Subtraction with Borrow", "Subtract with borrow r8 from r/m8." ],
[ "SBB", "19 /r", "r/m16, r16", "MR", True, True, "Integer Subtraction with Borrow", "Subtract with borrow r16 from r/m16." ],
[ "SBB", "19 /r", "r/m32, r32", "MR", True, True, "Integer Subtraction with Borrow", "Subtract with borrow r32 from r/m32." ],
[ "SBB", "REX.W+ 19 /r", "r/m64, r64", "MR", True, False, "Integer Subtraction with Borrow", "Subtract with borrow r64 from r/m64." ],
[ "SBB", "1A /r", "r8, r/m8", "RM", True, True, "Integer Subtraction with Borrow", "Subtract with borrow r/m8 from r8." ],
[ "SBB", "REX+ 1A /r", "r8, r/m8", "RM", True, False, "Integer Subtraction with Borrow", "Subtract with borrow r/m8 from r8." ],
[ "SBB", "1B /r", "r16, r/m16", "RM", True, True, "Integer Subtraction with Borrow", "Subtract with borrow r/m16 from r16." ],
[ "SBB", "1B /r", "r32, r/m32", "RM", True, True, "Integer Subtraction with Borrow", "Subtract with borrow r/m32 from r32." ],
[ "SBB", "REX.W+ 1B /r", "r64, r/m64", "RM", True, False, "Integer Subtraction with Borrow", "Subtract with borrow r/m64 from r64." ],
[ "SCAS", "AE", "m8", "", True, True, "Scan String", "Compare AL with byte at ES:(E)DI or RDI, then set status flags.*" ],
[ "SCAS", "AF", "m16", "", True, True, "Scan String", "Compare AX with word at ES:(E)DI or RDI, then set status flags.*" ],
[ "SCAS", "AF", "m32", "", True, True, "Scan String", "Compare EAX with doubleword at ES(E)DI or RDI then set status flags.*" ],
[ "SCAS", "REX.W+ AF", "m64", "", True, False, "Scan String", "Compare RAX with quadword at RDI or EDI then set status flags." ],
[ "SCASB", "AE", "", "", True, True, "Scan String", "Compare AL with byte at ES:(E)DI or RDI then set status flags.*" ],
[ "SCASW", "AF", "", "", True, True, "Scan String", "Compare AX with word at ES:(E)DI or RDI then set status flags.*" ],
[ "SCASD", "AF", "", "", True, True, "Scan String", "Compare EAX with doubleword at ES:(E)DI or RDI then set status flags.*" ],
[ "SCASQ", "REX.W+ AF", "", "", True, False, "Scan String", "Compare RAX with quadword at RDI or EDI then set status flags." ],
[ "SETA", "0F 97", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if above (CF=0 and ZF=0)." ],
[ "SETA", "REX+ 0F 97", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if above (CF=0 and ZF=0)." ],
[ "SETAE", "0F 93", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if above or equal (CF=0)." ],
[ "SETAE", "REX+ 0F 93", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if above or equal (CF=0)." ],
[ "SETB", "0F 92", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if below (CF=1)." ],
[ "SETB", "REX+ 0F 92", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if below (CF=1)." ],
[ "SETBE", "0F 96", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if below or equal (CF=1 or ZF=1)." ],
[ "SETBE", "REX+ 0F 96", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if below or equal (CF=1 or ZF=1)." ],
[ "SETC", "0F 92", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if carry (CF=1)." ],
[ "SETC", "REX+ 0F 92", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if carry (CF=1)." ],
[ "SETE", "0F 94", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if equal (ZF=1)." ],
[ "SETE", "REX+ 0F 94", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if equal (ZF=1)." ],
[ "SETG", "0F 9F", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if greater (ZF=0 and SF=OF)." ],
[ "SETG", "REX+ 0F 9F", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if greater (ZF=0 and SF=OF)." ],
[ "SETGE", "0F 9D", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if greater or equal (SF=OF)." ],
[ "SETGE", "REX+ 0F 9D", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if greater or equal (SF=OF)." ],
[ "SETL", "0F 9C", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if less (SF<>OF)." ],
[ "SETL", "REX+ 0F 9C", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if less (SF<>OF)." ],
[ "SETLE", "0F 9E", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if less or equal (ZF=1 or SF<>OF)." ],
[ "SETLE", "REX+ 0F 9E", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if less or equal (ZF=1 or SF<>OF)." ],
[ "SETNA", "0F 96", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not above (CF=1 or ZF=1)." ],
[ "SETNA", "REX+ 0F 96", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not above (CF=1 or ZF=1)." ],
[ "SETNAE", "0F 92", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not above or equal (CF=1)." ],
[ "SETNAE", "REX+ 0F 92", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not above or equal (CF=1)." ],
[ "SETNB", "0F 93", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not below (CF=0)." ],
[ "SETNB", "REX+ 0F 93", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not below (CF=0)." ],
[ "SETNBE", "0F 97", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not below or equal (CF=0 and ZF=0)." ],
[ "SETNBE", "REX+ 0F 97", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not below or equal (CF=0 and ZF=0)." ],
[ "SETNC", "0F 93", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not carry (CF=0)." ],
[ "SETNC", "REX+ 0F 93", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not carry (CF=0)." ],
[ "SETNE", "0F 95", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not equal (ZF=0)." ],
[ "SETNE", "REX+ 0F 95", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not equal (ZF=0)." ],
[ "SETNG", "0F 9E", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not greater (ZF=1 or SF<>OF)" ],
[ "SETNG", "REX+ 0F 9E", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not greater (ZF=1 or SF<>OF)." ],
[ "SETNGE", "0F 9C", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not greater or equal (SF<>OF)." ],
[ "SETNGE", "REX+ 0F 9C", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not greater or equal (SF<>OF)." ],
[ "SETNL", "0F 9D", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not less (SF=OF)." ],
[ "SETNL", "REX+ 0F 9D", "r/m8", "M", True, False, "Set Byte on Condition", "Set byte if not less (SF=OF)." ],
[ "SETNLE", "0F 9F", "r/m8", "M", True, True, "Set Byte on Condition", "Set byte if not less or equal (ZF=0 and SF=OF)." ],
[ "STAC", "0F 01 CB", "", "", True, True, "Set AC Flag in EFLAGS Register", "Set the AC flag in the EFLAGS register." ],
[ "STC", "F9", "", "", True, True, "Set Carry Flag", "Set CF flag." ],
[ "STD", "FD", "", "", True, True, "Set Direction Flag", "Set DF flag." ],
[ "STI", "FB", "", "", True, True, "Set Interrupt Flag", "Set interrupt flag; external, maskable interrupts enabled at the end of the next instruction." ],
[ "STOS", "AA", "m8", "", True, True, "Store String", "For legacy mode, store AL at address ES:(E)DI; For 64-bit mode store AL at address RDI or EDI." ],
[ "STOS", "AB", "m16", "", True, True, "Store String", "For legacy mode, store AX at address ES:(E)DI; For 64-bit mode store AX at address RDI or EDI." ],
[ "STOS", "AB", "m32", "", True, True, "Store String", "For legacy mode, store EAX at address ES:(E)DI; For 64-bit mode store EAX at address RDI or EDI." ],
[ "STOS", "REX.W+ AB", "m64", "", True, False, "Store String", "Store RAX at address RDI or EDI." ],
[ "STOSB", "AA", "", "", True, True, "Store String", "For legacy mode, store AL at address ES:(E)DI; For 64-bit mode store AL at address RDI or EDI." ],
[ "STOSW", "AB", "", "", True, True, "Store String", "For legacy mode, store AX at address ES:(E)DI; For 64-bit mode store AX at address RDI or EDI." ],
[ "STOSD", "AB", "", "", True, True, "Store String", "For legacy mode, store EAX at address ES:(E)DI; For 64-bit mode store EAX at address RDI or EDI." ],
[ "STOSQ", "REX.W+ AB", "", "", True, False, "Store String", "Store RAX at address RDI or EDI." ],
[ "STR", "0F 00 /1", "r/m16", "M", True, True, "Store Task Register", "Stores segment selector from TR in r/m16." ],
[ "SUB", "2C ib", "AL, imm8", "FI", True, True, "Subtract", "Subtract imm8 from AL." ],
[ "SUB", "2D iw", "AX, imm16", "FI", True, True, "Subtract", "Subtract imm16 from AX." ],
[ "SUB", "2D id", "EAX, imm32", "FI", True, True, "Subtract", "Subtract imm32 from EAX." ],
[ "SUB", "REX.W+ 2D id", "RAX, imm32", "FI", True, False, "Subtract", "Subtract imm32 sign-extended to 64-bits from RAX." ],
[ "SUB", "80 /5 ib", "r/m8, imm8", "MI", True, True, "Subtract", "Subtract imm8 from r/m8." ],
[ "SUB", "REX+ 80 /5 ib", "r/m8, imm8", "MI", True, False, "Subtract", "Subtract imm8 from r/m8." ],
[ "SUB", "81 /5 iw", "r/m16, imm16", "MI", True, True, "Subtract", "Subtract imm16 from r/m16." ],
[ "SUB", "81 /5 id", "r/m32, imm32", "MI", True, True, "Subtract", "Subtract imm32 from r/m32." ],
[ "SUB", "REX.W+ 81 /5 id", "r/m64, imm32", "MI", True, False, "Subtract", "Subtract imm32 sign-extended to 64-bits from r/m64." ],
[ "SUB", "83 /5 ib", "r/m16, imm8", "MI", True, True, "Subtract", "Subtract sign-extended imm8 from r/m16." ],
[ "SUB", "83 /5 ib", "r/m32, imm8", "MI", True, True, "Subtract", "Subtract sign-extended imm8 from r/m32." ],
[ "SUB", "REX.W+ 83 /5 ib", "r/m64, imm8", "MI", True, False, "Subtract", "Subtract sign-extended imm8 from r/m64." ],
[ "SUB", "28 /r", "r/m8, r8", "MR", True, True, "Subtract", "Subtract r8 from r/m8." ],
[ "SUB", "REX+ 28 /r", "r/m8, r8", "MR", True, False, "Subtract", "Subtract r8 from r/m8." ],
[ "SUB", "29 /r", "r/m16, r16", "MR", True, True, "Subtract", "Subtract r16 from r/m16." ],
[ "SUB", "29 /r", "r/m32, r32", "MR", True, True, "Subtract", "Subtract r32 from r/m32." ],
[ "SUB", "REX.W+ 29 /r", "r/m64, r64", "MR", True, False, "Subtract", "Subtract r64 from r/m64." ],
[ "SUB", "2A /r", "r8, r/m8", "RM", True, True, "Subtract", "Subtract r/m8 from r8." ],
[ "SUB", "REX+ 2A /r", "r8, r/m8", "RM", True, False, "Subtract", "Subtract r/m8 from r8." ],
[ "SUB", "2B /r", "r16, r/m16", "RM", True, True, "Subtract", "Subtract r/m16 from r16." ],
[ "SUB", "2B /r", "r32, r/m32", "RM", True, True, "Subtract", "Subtract r/m32 from r32." ],
[ "SUB", "REX.W+ 2B /r", "r64, r/m64", "RM", True, False, "Subtract", "Subtract r/m64 from r64." ],
[ "SWAPGS", "0F 01 F8", "", "", True, False, "Swap GS Base Register", "Exchanges the current GS base register value with the value contained in MSR address C0000102H." ],
[ "SYSCALL", "0F 05", "", "", True, False, "Fast System Call", "Fast call to privilege level 0 system procedures." ],
[ "SYSENTER", "0F 34", "", "", True, True, "Fast System Call", "Fast call to privilege level 0 system procedures." ],
[ "SYSEXIT", "0F 35", "", "", True, True, "Fast Return from Fast System Call", "Fast return to privilege level 3 user code." ],
[ "SYSEXIT", "REX.W+ 0F 35", "", "", True, True, "Fast Return from Fast System Call", "Fast return to 64-bit mode privilege level 3 user code." ],
[ "SYSRET", "0F 07", "", "", True, False, "Return From Fast System Call", "Return to compatibility mode from fast system call" ],
[ "SYSRET", "REX.W+ 0F 07", "", "", True, False, "Return From Fast System Call", "Return to 64-bit mode from fast system call" ],
[ "TEST", "A8 ib", "AL, imm8", "FI", True, True, "Logical Compare", "AND imm8 with AL; set SF, ZF, PF according to result." ],
[ "TEST", "A9 iw", "AX, imm16", "FI", True, True, "Logical Compare", "AND imm16 with AX; set SF, ZF, PF according to result." ],
[ "TEST", "A9 id", "EAX, imm32", "FI", True, True, "Logical Compare", "AND imm32 with EAX; set SF, ZF, PF according to result." ],
[ "TEST", "REX.W+ A9 id", "RAX, imm32", "FI", True, False, "Logical Compare", "AND imm32 sign-extended to 64-bits with RAX; set SF, ZF, PF according to result." ],
[ "TEST", "F6 /0 ib", "r/m8, imm8", "MI", True, True, "Logical Compare", "AND imm8 with r/m8; set SF, ZF, PF according to result." ],
[ "TEST", "REX+ F6 /0 ib", "r/m8, imm8", "MI", True, False, "Logical Compare", "AND imm8 with r/m8; set SF, ZF, PF according to result." ],
[ "TEST", "F7 /0 iw", "r/m16, imm16", "MI", True, True, "Logical Compare", "AND imm16 with r/m16; set SF, ZF, PF according to result." ],
[ "TEST", "F7 /0 id", "r/m32, imm32", "MI", True, True, "Logical Compare", "AND imm32 with r/m32; set SF, ZF, PF according to result." ],
[ "TEST", "REX.W+ F7 /0 id", "r/m64, imm32", "MI", True, False, "Logical Compare", "AND imm32 sign-extended to 64-bits with r/m64; set SF, ZF, PF according to result." ],
[ "TEST", "84 /r", "r/m8, r8", "MR", True, True, "Logical Compare", "AND r8 with r/m8; set SF, ZF, PF according to result." ],
[ "TEST", "REX+ 84 /r", "r/m8, r8", "MR", True, False, "Logical Compare", "AND r8 with r/m8; set SF, ZF, PF according to result." ],
[ "TEST", "85 /r", "r/m16, r16", "MR", True, True, "Logical Compare", "AND r16 with r/m16; set SF, ZF, PF according to result." ],
[ "TEST", "85 /r", "r/m32, r32", "MR", True, True, "Logical Compare", "AND r32 with r/m32; set SF, ZF, PF according to result." ],
[ "TEST", "REX.W+ 85 /r", "r/m64, r64", "MR", True, False, "Logical Compare", "AND r64 with r/m64; set SF, ZF, PF according to result." ],
[ "UD2", "0F 0B", "", "", True, True, "Undefined Instruction", "Raise invalid opcode exception." ],
[ "VERR", "0F 00 /4", "r/m16", "M", True, True, "Verify a Segment for Reading or Writing", "Set ZF=1 if segment specified with r/m16 can be read." ],
[ "VERW", "0F 00 /5", "r/m16", "M", True, True, "Verify a Segment for Reading or Writing", "Set ZF=1 if segment specified with r/m16 can be written." ],
[ "WAIT", "9B", "", "", True, True, "Wait", "Check pending unmasked floating-point exceptions." ],
[ "FWAIT", "9B", "", "", True, True, "Wait", "Check pending unmasked floating-point exceptions." ],
[ "WBINVD", "0F 09", "", "", True, True, "Write Back and Invalidate Cache", "Write back and flush Internal caches; initiate writing-back and flushing of external caches." ],
[ "WRMSR", "0F 30", "", "", True, True, "Write to Model Specific Register", "Write the value in EDX:EAX to MSR specified by ECX." ],
[ "XADD", "0F C0 /r", "r/m8, r8", "MR", True, True, "Exchange and Add", "Exchange r8 and r/m8; load sum into r/m8." ],
[ "XADD", "REX+ 0F C0 /r", "r/m8, r8", "MR", True, False, "Exchange and Add", "Exchange r8 and r/m8; load sum into r/m8." ],
[ "XADD", "0F C1 /r", "r/m16, r16", "MR", True, True, "Exchange and Add", "Exchange r16 and r/m16; load sum into r/m16." ],
[ "XADD", "0F C1 /r", "r/m32, r32", "MR", True, True, "Exchange and Add", "Exchange r32 and r/m32; load sum into r/m32." ],
[ "XADD", "REX.W+ 0F C1 /r", "r/m64, r64", "MR", True, False, "Exchange and Add", "Exchange r64 and r/m64; load sum into r/m64." ],
[ "XCHG", "90+ rw", "AX, r16", "FO", True, True, "Exchange Register/Memory with Register", "Exchange r16 with AX." ],
[ "XCHG", "90+ rw", "r16, AX", "OF", True, True, "Exchange Register/Memory with Register", "Exchange AX with r16." ],
[ "XCHG", "90+ rd", "EAX, r32", "FO", True, True, "Exchange Register/Memory with Register", "Exchange r32 with EAX." ],
[ "XCHG", "REX.W+ 90+ rd", "RAX, r64", "FO", True, False, "Exchange Register/Memory with Register", "Exchange r64 with RAX." ],
[ "XCHG", "90+ rd", "r32, EAX", "OF", True, True, "Exchange Register/Memory with Register", "Exchange EAX with r32." ],
[ "XCHG", "REX.W+ 90+ rd", "r64, RAX", "OF", True, False, "Exchange Register/Memory with Register", "Exchange RAX with r64." ],
[ "XCHG", "86 /r", "r/m8, r8", "MR", True, True, "Exchange Register/Memory with Register", "Exchange r8 (byte register) with byte from r/m8." ],
[ "XCHG", "REX+ 86 /r", "r/m8, r8", "MR", True, False, "Exchange Register/Memory with Register", "Exchange r8 (byte register) with byte from r/m8." ],
[ "XCHG", "86 /r", "r8, r/m8", "RM", True, True, "Exchange Register/Memory with Register", "Exchange byte from r/m8 with r8 (byte register)." ],
[ "XCHG", "REX+ 86 /r", "r8, r/m8", "RM", True, False, "Exchange Register/Memory with Register", "Exchange byte from r/m8 with r8 (byte register)." ],
[ "XCHG", "87 /r", "r/m16, r16", "MR", True, True, "Exchange Register/Memory with Register", "Exchange r16 with word from r/m16." ],
[ "XCHG", "87 /r", "r16, r/m16", "RM", True, True, "Exchange Register/Memory with Register", "Exchange word from r/m16 with r16." ],
[ "XCHG", "87 /r", "r/m32, r32", "MR", True, True, "Exchange Register/Memory with Register", "Exchange r32 with doubleword from r/m32." ],
[ "XCHG", "REX.W+ 87 /r", "r/m64, r64", "MR", True, False, "Exchange Register/Memory with Register", "Exchange r64 with quadword from r/m64." ],
[ "XCHG", "87 /r", "r32, r/m32", "RM", True, True, "Exchange Register/Memory with Register", "Exchange doubleword from r/m32 with r32." ],
[ "XCHG", "REX.W+ 87 /r", "r64, r/m64", "RM", True, False, "Exchange Register/Memory with Register", "Exchange quadword from r/m64 with r64." ],
[ "XGETBV", "0F 01 D0", "", "", True, True, "Get Value of Extended Control Register", "Reads an XCR specified by ECX into EDX:EAX." ],
[ "XLAT", "D7", "m8", "", True, True, "Table Look-up Translation", "Set AL to memory byte DS:[(E)BX + unsigned AL]." ],
[ "XLATB", "D7", "", "", True, True, "Table Look-up Translation", "Set AL to memory byte DS:[(E)BX + unsigned AL]." ],
[ "XLATB", "REX.W+ D7", "", "", True, False, "Table Look-up Translation", "Set AL to memory byte [RBX + unsigned AL]." ],
[ "XOR", "34 ib", "AL, imm8", "FI", True, True, "Logical Exclusive OR", "AL XOR imm8." ],
[ "XOR", "35 iw", "AX, imm16", "FI", True, True, "Logical Exclusive OR", "AX XOR imm16." ],
[ "XOR", "35 id", "EAX, imm32", "FI", True, True, "Logical Exclusive OR", "EAX XOR imm32." ],
[ "XOR", "REX.W+ 35 id", "RAX, imm32", "FI", True, False, "Logical Exclusive OR", "RAX XOR imm32 (sign-extended)." ],
[ "XOR", "80 /6 ib", "r/m8, imm8", "MI", True, True, "Logical Exclusive OR", "r/m8 XOR imm8." ],
[ "XOR", "REX+ 80 /6 ib", "r/m8, imm8", "MI", True, False, "Logical Exclusive OR", "r/m8 XOR imm8." ],
[ "XOR", "81 /6 iw", "r/m16, imm16", "MI", True, True, "Logical Exclusive OR", "r/m16 XOR imm16." ],
[ "XOR", "81 /6 id", "r/m32, imm32", "MI", True, True, "Logical Exclusive OR", "r/m32 XOR imm32." ],
[ "XOR", "REX.W+ 81 /6 id", "r/m64, imm32", "MI", True, False, "Logical Exclusive OR", "r/m64 XOR imm32 (sign-extended)." ],
[ "XOR", "83 /6 ib", "r/m16, imm8", "MI", True, True, "Logical Exclusive OR", "r/m16 XOR imm8 (sign-extended)." ],
[ "XOR", "83 /6 ib", "r/m32, imm8", "MI", True, True, "Logical Exclusive OR", "r/m32 XOR imm8 (sign-extended)." ],
[ "XOR", "REX.W+ 83 /6 ib", "r/m64, imm8", "MI", True, False, "Logical Exclusive OR", "r/m64 XOR imm8 (sign-extended)." ],
[ "XOR", "30 /r", "r/m8, r8", "MR", True, True, "Logical Exclusive OR", "r/m8 XOR r8." ],
[ "XOR", "REX+ 30 /r", "r/m8, r8", "MR", True, False, "Logical Exclusive OR", "r/m8 XOR r8." ],
[ "XOR", "31 /r", "r/m16, r16", "MR", True, True, "Logical Exclusive OR", "r/m16 XOR r16." ],
[ "XOR", "31 /r", "r/m32, r32", "MR", True, True, "Logical Exclusive OR", "r/m32 XOR r32." ],
[ "XOR", "REX.W+ 31 /r", "r/m64, r64", "MR", True, False, "Logical Exclusive OR", "r/m64 XOR r64." ],
[ "XOR", "32 /r", "r8, r/m8", "RM", True, True, "Logical Exclusive OR", "r8 XOR r/m8." ],
[ "XOR", "REX+ 32 /r", "r8, r/m8", "RM", True, False, "Logical Exclusive OR", "r8 XOR r/m8." ],
[ "XOR", "33 /r", "r16, r/m16", "RM", True, True, "Logical Exclusive OR", "r16 XOR r/m16." ],
[ "XOR", "33 /r", "r32, r/m32", "RM", True, True, "Logical Exclusive OR", "r32 XOR r/m32." ],
[ "XOR", "REX.W+ 33 /r", "r64, r/m64", "RM", True, False, "Logical Exclusive OR", "r64 XOR r/m64." ],
[ "XRSTOR", "0F AE /5", "mem", "M", True, True, "Restore Processor Extended States", "Restore state components specified by EDX:EAX from mem." ],
[ "XRSTOR64", "REX.W+ 0F AE /5", "mem", "M", True, False, "Restore Processor Extended States", "Restore state components specified by EDX:EAX from mem." ],
[ "XRSTORS", "0F C7 /3", "mem", "M", True, True, "Restore Processor Extended States Supervisor", "Restore state components specified by EDX:EAX from mem." ],
[ "XRSTORS64", "REX.W+ 0F C7 /3", "mem", "M", True, False, "Restore Processor Extended States Supervisor", "Restore state components specified by EDX:EAX from mem." ],
[ "XSAVE", "0F AE /4", "mem", "M", True, True, "Save Processor Extended States", "Save state components specified by EDX:EAX to mem." ],
[ "XSAVE64", "REX.W+ 0F AE /4", "mem", "M", True, False, "Save Processor Extended States", "Save state components specified by EDX:EAX to mem." ],
[ "XSAVEC", "0F C7 /4", "mem", "M", True, True, "Save Processor Extended States with Compaction", "Save state components specified by EDX:EAX to mem with compaction." ],
[ "XSAVEC64", "REX.W+ 0F C7 /4", "mem", "M", True, False, "Save Processor Extended States with Compaction", "Save state components specified by EDX:EAX to mem with compaction." ],
[ "XSAVES", "0F C7 /5", "mem", "M", True, True, "Save Processor Extended States Supervisor", "Save state components specified by EDX:EAX to mem with compaction, optimizing if possible." ],
[ "XSAVES64", "REX.W+ 0F C7 /5", "mem", "M", True, False, "Save Processor Extended States Supervisor", "Save state components specified by EDX:EAX to mem with compaction, optimizing if possible." ],
[ "XSETBV", "0F 01 D1", "", "", True, True, "Set Extended Control Register", "Write the value in EDX:EAX to the XCR specified by ECX." ],
[ "JA", "77 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if above (CF=0 and ZF=0)." ],
[ "JAE", "73 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if above or equal (CF=0)." ],
[ "JB", "72 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if below (CF=1)." ],
[ "JBE", "76 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if below or equal (CF=1 or ZF=1)." ],
[ "JC", "72 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if carry (CF=1)." ],
[ "JCXZ", "E3 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if CX register is 0." ],
[ "JECXZ", "E3 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if ECX register is 0." ],
[ "JRCXZ", "E3 cb", "rel8", "D", True, False, "Jump if Condition Is Met", "Jump short if RCX register is 0." ],
[ "JE", "74 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if equal (ZF=1)." ],
[ "JG", "7F cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if greater (ZF=0 and SF=OF)." ],
[ "JGE", "7D cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if greater or equal (SF=OF)." ],
[ "JL", "7C cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if less (SF^OF)." ],
[ "JLE", "7E cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if less or equal (ZF=1 or SF^OF)." ],
[ "JNA", "76 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not above (CF=1 or ZF=1)." ],
[ "JNAE", "72 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not above or equal (CF=1)." ],
[ "JNB", "73 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not below (CF=0)." ],
[ "JNBE", "77 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not below or equal (CF=0 and ZF=0)." ],
[ "JNC", "73 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not carry (CF=0)." ],
[ "JNE", "75 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not equal (ZF=0)." ],
[ "JNG", "7E cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not greater (ZF=1 or SF^OF)." ],
[ "JNGE", "7C cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not greater or equal (SF^OF)." ],
[ "JNL", "7D cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not less (SF=OF)." ],
[ "JNLE", "7F cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not less or equal (ZF=0 and SF=OF)." ],
[ "JNO", "71 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not overflow (OF=0)." ],
[ "JNP", "7B cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not parity (PF=0)." ],
[ "JNS", "79 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not sign (SF=0)." ],
[ "JNZ", "75 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if not zero (ZF=0)." ],
[ "JO", "70 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if overflow (OF=1)." ],
[ "JP", "7A cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if parity (PF=1)." ],
[ "JPE", "7A cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if parity even (PF=1)." ],
[ "JPO", "7B cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if parity odd (PF=0)." ],
[ "JS", "78 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if sign (SF=1)." ],
[ "JZ", "74 cb", "rel8", "D", True, True, "Jump if Condition Is Met", "Jump short if zero (ZF = 1)." ],
[ "JA", "0F 87 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if above (CF=0 and ZF=0). Not supported in 64-bit mode." ],
[ "JA", "0F 87 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if above (CF=0 and ZF=0)." ],
[ "JAE", "0F 83 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if above or equal (CF=0). Not supported in 64-bit mode." ],
[ "JAE", "0F 83 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if above or equal (CF=O)." ],
[ "JB", "0F 82 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if below (CF=1). Not supported in 64-bit mode." ],
[ "JB", "0F 82 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if below (CF=1)." ],
[ "JBE", "0F 86 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if below or equal (CF=1 or ZF=1). Not supported in 64-bit mode." ],
[ "JBE", "0F 86 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if below or equal (CF=1 or ZF=1)." ],
[ "JC", "0F 82 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if carry (CF=1). Not supported in 64-bit mode." ],
[ "JC", "0F 82 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if carry (CF=1)." ],
[ "JE", "0F 84 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if equal (ZF=1). Not supported in 64-bit mode." ],
[ "JE", "0F 84 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if equal (ZF=1)." ],
[ "JZ", "0F 84 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if O (ZF=1). Not supported in 64-bit mode." ],
[ "JZ", "0F 84 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if O (ZF=1)." ],
[ "JG", "0F 8F cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if greater (ZF=O and SF=OF). Not supported in 64-bit mode." ],
[ "JG", "0F 8F cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if greater (ZF=O and SF=OF)." ],
[ "JGE", "0F 8D cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if greater or equal (SF=OF). Not supported in 64-bit mode." ],
[ "JGE", "0F 8D cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if greater or equal (SF=OF)." ],
[ "JL", "0F 8C cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if less (SF^OF). Not supported in 64-bit mode." ],
[ "JL", "0F 8C cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if less (SF^OF)." ],
[ "JLE", "0F 8E cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if less or equal (ZF=1 or SF^OF). Not supported in 64-bit mode." ],
[ "JLE", "0F 8E cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if less or equal (ZF=1 or SF^OF)." ],
[ "JNA", "0F 86 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not above (CF=1 or ZF=1). Not supported in 64-bit mode." ],
[ "JNA", "0F 86 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not above (CF=1 or ZF=1)." ],
[ "JNAE", "0F 82 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not above or equal (CF=1). Not supported in 64-bit mode." ],
[ "JNAE", "0F 82 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not above or equal (CF=1)." ],
[ "JNB", "0F 83 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not below (CF=O). Not supported in 64-bit mode." ],
[ "JNB", "0F 83 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not below (CF=O)." ],
[ "JNBE", "0F 87 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not below or equal (CF=O and ZF=O). Not supported in 64-bit mode." ],
[ "JNBE", "0F 87 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not below or equal (CF=O and ZF=O)." ],
[ "JNC", "0F 83 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not carry (CF=O). Not supported in 64-bit mode." ],
[ "JNC", "0F 83 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not carry (CF=O)." ],
[ "JNE", "0F 85 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not equal (ZF=0). Not supported in 64-bit mode." ],
[ "JNE", "0F 85 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not equal (ZF=0)." ],
[ "JNG", "0F 8E cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not greater (ZF=1 or SF^OF). Not supported in 64-bit mode." ],
[ "JNG", "0F 8E cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not greater (ZF=1 or SF^OF)." ],
[ "JNGE", "0F 8C cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not greater or equal (SF^OF). Not supported in 64-bit mode." ],
[ "JNGE", "0F 8C cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not greater or equal (SF^OF)." ],
[ "JNL", "0F 8D cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not less (SF=OF). Not supported in 64-bit mode." ],
[ "JNL", "0F 8D cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not less (SF=OF)." ],
[ "JNLE", "0F 8F cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not less or equal (ZF=0 and SF=OF). Not supported in 64-bit mode." ],
[ "JNLE", "0F 8F cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not less or equal (ZF=0 and SF=OF)." ],
[ "JNO", "0F 81 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not overflow (OF=0). Not supported in 64-bit mode." ],
[ "JNO", "0F 81 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not overflow (OF=0)." ],
[ "JNP", "0F 8B cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not parity (PF=0). Not supported in 64-bit mode." ],
[ "JNP", "0F 8B cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not parity (PF=0)." ],
[ "JNS", "0F 89 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not sign (SF=0). Not supported in 64-bit mode." ],
[ "JNS", "0F 89 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not sign (SF=0)." ],
[ "JNZ", "0F 85 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if not zero (ZF=0). Not supported in 64-bit mode." ],
[ "JNZ", "0F 85 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if not zero (ZF=0)." ],
[ "JO", "0F 80 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if overflow (OF=1). Not supported in 64-bit mode." ],
[ "JO", "0F 80 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if overflow (OF=1)." ],
[ "JP", "0F 8A cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if parity (PF=1). Not supported in 64-bit mode." ],
[ "JP", "0F 8A cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if parity (PF=1)." ],
[ "JPE", "0F 8A cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if parity even (PF=1). Not supported in 64-bit mode." ],
[ "JPE", "0F 8A cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if parity even (PF=1)." ],
[ "JPO", "0F 8B cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if parity odd (PF=0). Not supported in 64-bit mode." ],
[ "JPO", "0F 8B cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if parity odd (PF=0)." ],
[ "JS", "0F 88 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if sign (SF=1). Not supported in 64- bit mode." ],
[ "JS", "0F 88 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if sign (SF=1)." ],
[ "JZ", "0F 84 cw", "rel16", "D", False, True, "Jump if Condition Is Met", "Jump near if 0 (ZF=1). Not supported in 64-bit mode." ],
[ "JZ", "0F 84 cd", "rel32", "D", True, True, "Jump if Condition Is Met", "Jump near if 0 (ZF=1)." ],
]