asm-cfg.rs

#[naked]
#[no_mangle]
#[link_section = ".rwtext"]
unsafe extern "C" fn save_context() {
    asm!(
        "
        s32i    a2,  sp, +XT_STK_A2
        s32i    a3,  sp, +XT_STK_A3
        s32i    a4,  sp, +XT_STK_A4
        s32i    a5,  sp, +XT_STK_A5
        s32i    a6,  sp, +XT_STK_A6
        s32i    a7,  sp, +XT_STK_A7
        s32i    a8,  sp, +XT_STK_A8
        s32i    a9,  sp, +XT_STK_A9
        s32i    a10, sp, +XT_STK_A10
        s32i    a11, sp, +XT_STK_A11
        s32i    a12, sp, +XT_STK_A12
        s32i    a13, sp, +XT_STK_A13
        s32i    a14, sp, +XT_STK_A14
        s32i    a15, sp, +XT_STK_A15
 
        rsr     a3,  SAR
        s32i    a3,  sp, +XT_STK_SAR

        ",
        #[cfg(target_feature = "loop")]
        "
        // Loop Option
        rsr     a3,  LBEG
        s32i    a3,  sp, +XT_STK_LBEG
        rsr     a3,  LEND
        s32i    a3,  sp, +XT_STK_LEND
        rsr     a3,  LCOUNT
        s32i    a3,  sp, +XT_STK_LCOUNT
        ",
        "
        // Thread Pointer Option
        rur     a3, threadptr
        s32i    a3, sp, +XT_STK_THREADPTR

        // Conditional Store Option
        rsr     a3, scompare1
        s32i    a3, sp, +XT_STK_SCOMPARE1
        
        // Boolean Option
        rsr     a3, br
        s32i    a3, sp, +XT_STK_BR

        // MAC16 Option
        rsr     a3, acclo
        s32i    a3, sp, +XT_STK_ACCLO
        rsr     a3, acchi
        s32i    a3, sp, +XT_STK_ACCHI
        rsr     a3, m0
        s32i    a3, sp, +XT_STK_M0
        rsr     a3, m1
        s32i    a3, sp, +XT_STK_M1
        rsr     a3, m2
        s32i    a3, sp, +XT_STK_M2
        rsr     a3, m3
        s32i    a3, sp, +XT_STK_M3

        // Double Precision Accelerator Option
        rur     a3, f64r_lo 
        s32i    a3, sp, +XT_STK_F64R_LO
        rur     a3, f64r_hi
        s32i    a3, sp, +XT_STK_F64R_HI
        rur     a3, f64s   
        s32i    a3, sp, +XT_STK_F64S

        // Coprocessor Option
        rur     a3, fcr
        s32i    a3, sp, +XT_STK_FCR
        rur     a3, fsr
        s32i    a3, sp, +XT_STK_FSR
        ssi     f0, sp, +XT_STK_F0
        ssi     f1, sp, +XT_STK_F1
        ssi     f2, sp, +XT_STK_F2
        ssi     f3, sp, +XT_STK_F3
        ssi     f4, sp, +XT_STK_F4
        ssi     f5, sp, +XT_STK_F5
        ssi     f6, sp, +XT_STK_F6
        ssi     f7, sp, +XT_STK_F7
        ssi     f8, sp, +XT_STK_F8
        ssi     f9, sp, +XT_STK_F9
        ssi     f10, sp, +XT_STK_F10
        ssi     f11, sp, +XT_STK_F11
        ssi     f12, sp, +XT_STK_F12
        ssi     f13, sp, +XT_STK_F13
        ssi     f14, sp, +XT_STK_F14
        ssi     f15, sp, +XT_STK_F15

        // Spill all windows (up to 64) to the stack
        // Uses the overflow exception: doing a noop write to the high registers 
        // will trigger if needed. WOE needs to be enabled before this routine.
        
        mov     a9, a0                   // store return address
        addmi   sp,  sp, +XT_STK_FRMSZ   // go back to spill register region

        SPILL_REGISTERS

        addmi   sp,  sp, -XT_STK_FRMSZ   // return the current stack pointer
        mov     a0, a9                   // retrieve return address

        ret
    ",
        options(noreturn)
    )
}