Created
September 25, 2012 04:30
-
-
Save MarcoPolo/3779993 to your computer and use it in GitHub Desktop.
KEYPAD.asm
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
;**************************************************************************************** | |
; file = ex0.asm | |
; Quick examples of Assembler directives & 28F335 DSP code | |
; Dr. Karl Gugel, May/2009 | |
; | |
; To be assembled using Code Composer Studio which requires a linker command | |
; file to tell CCR where to place code & data into DSP SRAM. | |
; The command file used = 28335_RAM_lnk.com | |
; Important Code locations: | |
; .text RAML1 (internal DSP memory) starting address = 09000 Hex, 4K Words | |
; .data RAML2 (internal DSP memory) starting address = 0A000 Hex, 4K Words | |
; | |
; Special Note: | |
; Assembler directives are used to place data and variables into memory. | |
; They are not F335 instructions and thus are not executed at "run-time". | |
; When this program is loaded into memory, the data (created above by the | |
; assembler) is also copied down into memory. This is called "load-time". | |
; | |
.global _c_int00 ;This assembler directive allows _c_int00 to be a | |
;global variable. This tells the linker where your | |
;program (.text code) begins and where to boot from. | |
; | |
; Additional References: | |
; Assembler Directives: spru513c.pdf | |
; Memory Map/Hardware Related: sprs439e.pdf (also called 320f28335.pdf) | |
; CPU Registers & Assembly Code: spru430.pdf (version E) | |
;**************************************************************************************** | |
;***************************** Program Constants **************************************** | |
; Creating constants using the .set assembler directive. This should be at the top of your | |
; program. This is like a define statement in C. | |
num1 .set 0h ;assembly-time constant (hex number) | |
num2 .set 11110000b ;assembly-time constant (binary no.) | |
num3 .set 65535 ;assembly-time constant (decimal no.) | |
count .set 3 ;number of characters to add in EEL4744 ('E'+'E'+'L') | |
data_sect .set 0xa000 ;constant that is actually the starting addr of .data section | |
bss_sect .set 0xb000 ;constant that is actually the starting addr of .bss section | |
score_addr .set 0xa000 | |
score_vector_len .set 10 | |
gpamux_1 .set 0x6F86 | |
GPAMUX1 .set 0x6F86 | |
GPATOGGLE .set 0x6FC6 | |
GPADIR .set 0x6F8A | |
GPADAT .set 0X6FC0 | |
INT13_VECT .set 0x00001A ;VECTOR FOR TIMER1 INTERUPT, VMAP = 0 | |
TIMREGPG .set 0xC00>>6 ;START OF TIMER REGISTER PAGE | |
TIMER1PRD .set 0x0C0A ;HOLDS PERIOD OF COUNTER | |
TIMER1PRDH .set 0x0C0B ;HOLDS PERIOD OF COUNTER [HIGH] | |
TIMER1TCR .set 0x0C0C ;TIMER CONTROL REGISTER | |
TIMER1PR .set 0x0C0E ;MSB CURRENT PRESCALLER COUNT, PRESCALE AMOUNT [LOW BYTES] | |
TIMER1PRH .set 0x0C0F ;MSB CURRENT PRESCALLER COUNT, PRESCALE AMOUNT [HIGH BYTES] | |
PERIODL .set 0xFFFF ;16 BIT LOWER COUNT VALUE | |
PERIODH .set 0x000F ;16 BIT UPPER COUNT VALUE | |
PRESCALEL .set 0x3 ;8 BIT LOWER PRESCALE VALUE | |
PRESCALEH .set 0x00 ;8 BIT UPPER PRESCALE VALUE | |
firstPattern .set 0x7 | |
secondPattern .set 0xB | |
thirdPattern .set 0xD | |
fourthPattern .set 0xE | |
;**************************************************************************************** | |
;******************* DATA ALLOCATION SECTION - Variables/Data *************************** | |
; Data can go before or after your program code but should not be placed in the middle | |
; nof a program for clarity reasons. | |
.data ;data section, see the command linker file, this puts the | |
;following data defined below in a block of internal SRAM | |
;starting at 0xA000. | |
;.score_addr | |
;score_vector .word 0 | |
score_vector .word 100 | |
.word 10 | |
.word 15 | |
.word 50 | |
.word 25 | |
.word 35 | |
.word 65 | |
.word 8 | |
.word 95 | |
.word 10 | |
allhigh .word 0xffff | |
;.BSS SECTION is used to reserve space in SRAM for run-time results. | |
; See the command linker file, the starting address is 0xB000 | |
.bss results,3 ;reserves three words at label 'results' in the .bss section | |
.bss sum,1 ;reserves one word at label 'sum' in the .bss section | |
.bss max_addr, 1 | |
.bss min_addr, 1 | |
;.global directive lets you to see the assigned addresses in map file. | |
.global num1,num2,num3,num3,num4,counter,char,val1,val2,val3,results,sum,score_addr | |
;**************************************************************************************** | |
;******************** Brief Introduction to CPU Model *********************************** | |
; CPU Registers: | |
; ACC Accumulator (32 bits) comprised of AH (upper 16 bits) and AL (lower 16 bits) | |
; XAR0 Auxiliary Register0 (32 bits) comprised of AR0H (upper 16 bits) and AR0 (lower 16 bits) | |
; XAR1 Auxiliary Register1 (32 bits) comprised of AR1H (upper 16 bits) and AR1 (lower 16 bits) | |
; XAR2 Auxiliary Register2 (32 bits) comprised of AR2H (upper 16 bits) and AR2 (lower 16 bits) | |
; XAR3 Auxiliary Register3 (32 bits) comprised of AR3H (upper 16 bits) and AR3 (lower 16 bits) | |
; XAR4 Auxiliary Register4 (32 bits) comprised of AR4H (upper 16 bits) and AR4 (lower 16 bits) | |
; XAR5 Auxiliary Register5 (32 bits) comprised of AR5H (upper 16 bits) and AR5 (lower 16 bits) | |
; XAR6 Auxiliary Register6 (32 bits) comprised of AR6H (upper 16 bits) and AR6 (lower 16 bits) | |
; XAR7 Auxiliary Register7 (32 bits) comprised of AR7H (upper 16 bits) and AR6 (lower 16 bits) | |
; XT Multiplicand Register (32 bits) comprised of T (upper 16 bits) and TL (lower 16 bits) | |
; P Product Register (32 bits) comprised PH (upper 16 bits) and PL (lower 16 bits) | |
; PC Program Counter (22 bits) | |
; SP Stack Pointer (16 bits) | |
; DP Data Page Register (16 bits) | |
; ST1,ST0 Status Registers (flags) | |
;**************************************************************************************** | |
;****************** F335 Program Examples *********************** | |
.text ;Program section, see the command linker file, program code | |
;should be placed in the text section which starts at 0x9000 | |
_c_int00: ;This label tells the linker where the entry (starting) point for | |
;the first instruction in your program. | |
mov @gpamux_1, #allhigh | |
EALLOW ;allow write access to GPIO regs | |
LC INIT_CPU ;INITIALIZE CPU (OBJMODE, DISABLE WATCHDOG) | |
B INIT_KEYPAD, UNC ; | |
;LC INIT_OUTPUT0 ;INITIALIZE LED (OUTPUT, MUX = 00) | |
;LC INIT_TIMER1_INT ;INTITIALIZE TIMER (PRS = 132h, TIM = F FFFFh, ENABLE INTS) | |
;OR IER,#0x1000 ;ENABLE INT13 (BIT 12 IN IER) MUST BE DONE WITH AN OR | |
;CLRC INTM ;ENABLE GLOBAL INTS | |
INIT_KEYPAD: | |
PUSH AR0 | |
PUSH AR1 | |
MOV AR0,#0 ;Set Mux for I/O purposes | |
MOV AR1,#GPAMUX1 | |
MOV *AR1,AR0 | |
INC AR1 | |
MOV *AR1,AR0 | |
MOV AR0,#0xFF ;Set GPIO0 as an output, and the top 8 bits for the input | |
MOV AR1,#GPADIR | |
MOV *AR1,AR0 | |
INC AR1 | |
MOV AR0,#0xF ;Set output for keypad | |
MOV *AR1,AR0 ;Get the top 16 bits chosen for output | |
LOOP: | |
MOV AR0, #firstPattern | |
LC DRAW_PATTERN | |
LC READ_PATTERN | |
CMP AR0, #firstPattern ;First col | |
B READ_1, EQ | |
CMP AR0, #secondPattern ;First col | |
B READ_2, EQ | |
CMP AR0, #thirdPattern ;First col | |
B READ_3, EQ | |
CMP AR0, #fourthPattern ;First col | |
B READ_A, EQ | |
MOV AR0, #secondPattern | |
LC DRAW_PATTERN | |
LC READ_PATTERN | |
CMP AR0, #firstPattern ;First col | |
B READ_4, EQ | |
CMP AR0, #secondPattern ;First col | |
B READ_5, EQ | |
CMP AR0, #thirdPattern ;First col | |
B READ_6, EQ | |
CMP AR0, #fourthPattern ;First col | |
B READ_B, EQ | |
MOV AR0, #secondPattern | |
LC DRAW_PATTERN | |
LC READ_PATTERN | |
CMP AR0, #firstPattern ;First col | |
B READ_4, EQ | |
CMP AR0, #secondPattern ;First col | |
B READ_5, EQ | |
CMP AR0, #thirdPattern ;First col | |
B READ_6, EQ | |
CMP AR0, #fourthPattern ;First col | |
B READ_B, EQ | |
MOV AR0, #thirdPattern | |
LC DRAW_PATTERN | |
LC READ_PATTERN | |
CMP AR0, #firstPattern ;First col | |
B READ_7, EQ | |
CMP AR0, #secondPattern ;First col | |
B READ_8, EQ | |
CMP AR0, #thirdPattern ;First col | |
B READ_9, EQ | |
CMP AR0, #fourthPattern ;First col | |
B READ_C, EQ | |
MOV AR0, #fourthPattern | |
LC DRAW_PATTERN | |
LC READ_PATTERN | |
CMP AR0, #firstPattern ;First col | |
B READ_E, EQ | |
CMP AR0, #secondPattern ;First col | |
B READ_0, EQ | |
CMP AR0, #thirdPattern ;First col | |
B READ_F, EQ | |
CMP AR0, #fourthPattern ;First col | |
B READ_D, EQ | |
B LOOP, UNC | |
WAIT B WAIT, UNC ;WAIT FOR INTS | |
POP AR1 | |
POP AR0 | |
READ_0: | |
MOV AL, #0x0 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_1: | |
MOV AL, #0x1 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_2: | |
MOV AL, #0x2 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_3: | |
MOV AL, #0x3 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_4: | |
MOV AL, #0x4 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_5: | |
MOV AL, #0x5 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_6: | |
MOV AL, #0x6 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_7: | |
MOV AL, #0x7 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_8: | |
MOV AL, #0x8 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_9: | |
MOV AL, #0x9 | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_A: | |
MOV AL, #0xA | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_B: | |
MOV AL, #0xB | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_C: | |
MOV AL, #0xC | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_D: | |
MOV AL, #0xD | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_E: | |
MOV AL, #0xE | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
READ_F: | |
MOV AL, #0xF | |
NOT AL | |
MOV AR0, AL | |
B DRAW_LED, UNC | |
LRET | |
INIT_CPU: | |
PUSH DP | |
SETC OBJMODE ;allow 32 bit mov instructions | |
MOVZ DP,#0x7029>>6 ;turn off that pesky watchdog timer | |
MOV @7029h,#0x68 | |
POP DP | |
LRET | |
DRAW_LED: ; Set the value into AR0 | |
PUSH AR1 | |
MOV AR1,#GPADAT | |
MOV *AR1, AR0 | |
POP AR1 | |
B LOOP, UNC ; go back to where we where | |
;LRET we branched here not lc | |
READ_PATTERN: ;stores the pattern in AR0 | |
PUSH AR1 | |
MOV AR1,#GPADAT | |
MOV AL, *AR1 ;TOGGLE GPIO0 | |
LSR AL, #12 | |
MOV AR0, AL | |
POP AR1 | |
LRET | |
DRAW_PATTERN: ;Draw the pattern on the keypad pattern is in AR0 | |
PUSH AR1 | |
MOV AR1,#GPADAT | |
INC AR1 | |
MOV *AR1, AR0 | |
POP AR1 | |
LRET | |
INIT_OUTPUT0: | |
PUSH AR0 | |
PUSH AR1 | |
MOV AR0,#0 ;Set Mux for I/O purposes | |
MOV AR1,#GPAMUX1 | |
MOV *AR1,AR0 | |
INC AR1 | |
MOV *AR1,AR0 | |
MOV AR0,#0xFF ;Set GPIO0 as an output | |
MOV AR1,#GPADIR | |
MOV *AR1,AR0 | |
MOV AR1,#GPADAT | |
MOV AR0,#0x00 | |
MOV *AR1, AR0 | |
MOV AR1,#GPADAT | |
;INC AR1 | |
MOV AL, *AR1 ;TOGGLE GPIO0 | |
LSR AL, #8 | |
MOV *AR1, AL | |
POP AR1 | |
POP AR0 | |
LRET | |
INIT_TIMER1_INT: | |
PUSH DP ;SAVE NEEDED REGISTER | |
CLRC VMAP ;SET INTERUPT VECTORS TO BEGINING OF MEMORY MAP | |
;INSTEAD OF THE END. THIS ALLOWS USER TO WRITE THE | |
;ADDRESS OF THE ISR DIRECTLY INTO THE INTERUPT VECTOR, | |
;SINCE THIS IS RAM INSTEAD OF ROM (WHICH IS AT THE END) | |
MOV DP, #TIMREGPG ;SET DATA PAGE TO TIMER REGISTERS | |
MOV @TIMER1PRD, #PERIODL ;SET PERIOD (2 INSTRUCTIONS) | |
MOV @TIMER1PRDH, #PERIODH | |
MOV @TIMER1PR, #PRESCALEL ;SET PRESCALER (2 INSTRUCTIONS) | |
MOV @TIMER1PRH, #PRESCALEH | |
TSET @TIMER1TCR, #14 ;SET BIT 14 TO ENABLE TIMER1 | |
TSET @TIMER1TCR, #5 ;LOAD PRESCALER AND PERIOD | |
MOVL XAR0, #INT13_VECT ;NEED TO LOAD INT VECTOR WITH ISR ADDRESS | |
MOV *XAR0++, #ISR ;LOAD LOWER BYTE (LITTLE ENDIAN) | |
MOV *XAR0, #ISR>>16 ;LOAD UPPER BYTE | |
POP DP ;RESTORE REGISTER | |
LRET | |
ISR: ;SEVERAL REGISTERS AUTO-SAVED, INCLUDING DP, AR1 AND AR0 | |
MOV AR1, #GPATOGGLE ;LOAD AR1 WITH ADDRESS OF GPIO0 | |
MOV *AR1, #1 ;TOGGLE GPIO0 | |
MOV DP, #TIMREGPG ;SET DP FOR DIRECT ADDRESSING | |
TSET @TIMER1TCR, #15 ;CLEAR TIMER INTERUPT FLAG, INT13 FLAG AUTO-CLEARS | |
IRET ;REGISTERS RELOADED | |
;ENDPROGRAM | |
endMAN b endMAN, UNC | |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment