0001-Xen-PT-power-management-support-including-PME-passth.patch

From 997148331011406a54157ad225ace20510eacc56 Mon Sep 17 00:00:00 2001
From: Vertex X7-53 <[email protected]>
Date: Sun, 17 Aug 2025 11:00:09 +0100
Subject: [PATCH] Xen PT power management support, including PME passthrough

---
 hw/xen/xen_pt.c             |  1 +
 hw/xen/xen_pt.h             |  1 +
 hw/xen/xen_pt_config_init.c | 61 +++++++++++++++++++++++++++++++++++--
 3 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 7c70b9cdec..118fe29167 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -961,6 +961,7 @@ static void xen_pt_unregister_device(PCIDevice *d)
 static Property xen_pci_passthrough_properties[] = {
     DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState, hostaddr),
     DEFINE_PROP_BOOL("permissive", XenPCIPassthroughState, permissive, false),
+    DEFINE_PROP_BOOL("power_mgmt", XenPCIPassthroughState, power_mgmt, false),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index 095a0f0365..5557860aa0 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -237,6 +237,7 @@ struct XenPCIPassthroughState {
     bool is_virtfn;
     bool permissive;
     bool permissive_warned;
+    bool power_mgmt;
     XenHostPCIDevice real_device;
     XenPTRegion bases[PCI_NUM_REGIONS]; /* Access regions */
     QLIST_HEAD(, XenPTRegGroup) reg_grps;
diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
index 9843684305..e0b57ff8ff 100644
--- a/hw/xen/xen_pt_config_init.c
+++ b/hw/xen/xen_pt_config_init.c
@@ -1024,6 +1024,28 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = {
  * Power Management Capability
  */
 
+static int xen_pt_pm_ctrl_reg_init_off(XenPCIPassthroughState *s, XenPTRegInfo *reg,
+                              uint32_t real_offset, uint32_t *data) {
+    if (s->power_mgmt) {
+        *data = XEN_PT_INVALID_REG;
+        return 0;
+    }
+
+    XEN_PT_LOG(&s->dev, "PCI power management control passthrough is off\n");
+    return xen_pt_common_reg_init(s, reg, real_offset, data);
+}
+
+static int xen_pt_pm_ctrl_reg_init_on(XenPCIPassthroughState *s, XenPTRegInfo *reg,
+                              uint32_t real_offset, uint32_t *data) {
+    if (!s->power_mgmt) {
+        *data = XEN_PT_INVALID_REG;
+        return 0;
+    }
+
+    XEN_PT_LOG(&s->dev, "PCI power management control passthrough is on\n");
+    return xen_pt_common_reg_init(s, reg, real_offset, data);
+}
+
 /* Power Management Capability reg static information table */
 static XenPTRegInfo xen_pt_emu_reg_pm[] = {
     /* Next Pointer reg */
@@ -1048,7 +1070,29 @@ static XenPTRegInfo xen_pt_emu_reg_pm[] = {
         .u.w.read   = xen_pt_word_reg_read,
         .u.w.write  = xen_pt_word_reg_write,
     },
-    /* PCI Power Management Control/Status reg */
+    /* PCI Power Management Capabilities reg (power_mgmt = 0)*/
+    {
+        .offset     = PCI_PM_PMC,
+        .size       = 2,
+        .init_val   = 0x0000,
+        .ro_mask    = 0xFFFF,
+        .emu_mask   = 0xFFFF,
+        .init       = xen_pt_pm_ctrl_reg_init_off,
+        .u.w.read   = xen_pt_word_reg_read,
+        .u.w.write  = xen_pt_word_reg_write,
+    },
+    /* PCI Power Management Capabilities reg (power_mgmt = 1)*/
+    {
+        .offset     = PCI_PM_PMC,
+        .size       = 2,
+        .init_val   = 0x0000,
+        .ro_mask    = 0xFFFF,
+        .emu_mask   = 0x0000,
+        .init       = xen_pt_pm_ctrl_reg_init_on,
+        .u.w.read   = xen_pt_word_reg_read,
+        .u.w.write  = xen_pt_word_reg_write,
+    },
+    /* PCI Power Management Control/Status reg (power_mgmt = 0)*/
     {
         .offset     = PCI_PM_CTRL,
         .size       = 2,
@@ -1057,7 +1101,20 @@ static XenPTRegInfo xen_pt_emu_reg_pm[] = {
         .ro_mask    = 0x610C,
         .rw1c_mask  = 0x8000,
         .emu_mask   = 0x810B,
-        .init       = xen_pt_common_reg_init,
+        .init       = xen_pt_pm_ctrl_reg_init_off,
+        .u.w.read   = xen_pt_word_reg_read,
+        .u.w.write  = xen_pt_word_reg_write,
+    },
+    /* PCI Power Management Control/Status reg (power_mgmt = 1)*/
+    {
+        .offset     = PCI_PM_CTRL,
+        .size       = 2,
+        .init_val   = 0x0008,
+        .res_mask   = 0x00F0,
+        .ro_mask    = 0x600C,
+        .rw1c_mask  = 0x8000,
+        .emu_mask   = 0x0008,
+        .init       = xen_pt_pm_ctrl_reg_init_on,
         .u.w.read   = xen_pt_word_reg_read,
         .u.w.write  = xen_pt_word_reg_write,
     },
-- 
2.49.0