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@Sciss
Last active September 21, 2017 15:20
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package de.sciss.synth
package ugen
import UGenSource._
object SinOsc {
def kr: SinOsc = kr()
def kr(freq: GE = 440.0f, phase: GE = 0.0f): SinOsc = new SinOsc(control, freq, phase)
def ar: SinOsc = ar()
def ar(freq: GE = 440.0f, phase: GE = 0.0f): SinOsc = new SinOsc(audio, freq, phase)
}
final case class SinOsc(rate: Rate, freq: GE = 440.0f, phase: GE = 0.0f) extends UGenSource.SingleOut {
protected def makeUGens: UGenInLike = unwrap(this, Vec(freq.expand, phase.expand))
def makeUGen(args: Vec[UGenIn]): UGenInLike = UGen.SingleOut(name, rate, args)
}
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