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@Subv
Last active August 29, 2015 14:16
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diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp
index 643e4ff..b6d410f 100644
--- a/src/core/hw/gpu.cpp
+++ b/src/core/hw/gpu.cpp
@@ -147,19 +147,19 @@ inline void Write(u32 addr, const T data) {
const unsigned int block_width = 8;
const unsigned int block_height = 8;
- const unsigned int coarse_x = x & ~7;
+ const unsigned int coarse_x = (config.scale_horizontally ? x * 2 : x) & ~7;
const unsigned int coarse_y = y & ~7;
- u32 i = MathUtil::MortonInterleave(x, y);
+ u32 i = MathUtil::MortonInterleave(config.scale_horizontally ? x * 2 : x, y);
const unsigned int offset = coarse_x * block_height;
- u32 dst_offset = (x + y * config.output_width) * GPU::Regs::BytesPerPixel(config.output_format) / pixel_skip;
+ u32 dst_offset = (x + y * config.output_width) * GPU::Regs::BytesPerPixel(config.output_format);
u32 src_offset = (offset + i + coarse_y * output_width) * GPU::Regs::BytesPerPixel(config.input_format);
if (config.output_tiled) {
// Reverse the addressing, interpret the input as linear and the output as tiled
- src_offset = (x + y * config.output_width) * GPU::Regs::BytesPerPixel(config.input_format) / pixel_skip;
+ src_offset = (x + y * config.output_width) * GPU::Regs::BytesPerPixel(config.input_format);
dst_offset = (offset + i + coarse_y * output_width) * GPU::Regs::BytesPerPixel(config.output_format);
}
@@ -171,6 +171,13 @@ inline void Write(u32 addr, const T data) {
source_color.g = srcptr[2]; // green
source_color.b = srcptr[1]; // blue
source_color.a = srcptr[0]; // alpha
+ if (config.scale_horizontally) {
+ u8* nextptr = srcptr + 4;
+ source_color.r = (source_color.r + nextptr[3]) / 2;
+ source_color.g = (source_color.g + nextptr[2]) / 2;
+ source_color.b = (source_color.b + nextptr[1]) / 2;
+ source_color.a = (source_color.a + nextptr[0]) / 2;
+ }
break;
}
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