Subv

00007FF67A201700  mov         r8,rcx  
00007FF67A201703  lea         eax,[rdx+rdx]  
00007FF67A201706  mov         ecx,0Bh  
00007FF67A20170B  sub         ecx,eax  
00007FF67A20170D  mov         eax,dword ptr [r8]  
00007FF67A201710  shr         eax,cl  
00007FF67A201712  and         eax,3  
00007FF67A201715  ret  

Subv

Selector GetSelectorSrc1(int comp) const {
      /*Selector selectors[] = {
          src1_selector_0, src1_selector_1, src1_selector_2, src1_selector_3
      };
      return selectors[comp];*/
      return static_cast<Selector>((hex >> (11 - (comp << 1))) & 0x3);
  }

Subv

00007FF723760A90  sub         rsp,48h  
00007FF723760A94  mov         r8,rcx  
00007FF723760A97  cmp         edx,4  
00007FF723760A9A  jae         nihstro::SwizzlePattern::DestComponentEnabled+23h (07FF723760AB3h)  
00007FF723760A9C  mov         eax,8  
00007FF723760AA1  mov         ecx,edx  
00007FF723760AA3  sar         eax,cl  
00007FF723760AA5  and         eax,0Fh  
00007FF723760AA8  test        byte ptr [r8],al  
00007FF723760AAB  setne       al  

Subv

00007FF7148D8060  mov         r8d,dword ptr [rdx]  
00007FF7148D8063  mov         r9,rcx  
00007FF7148D8066  cmp         r8d,10h  
00007FF7148D806A  jae         <lambda_1619aabc5def9737e5d9abae5fbc4cef>::operator()+10h (07FF7148D8070h)  
00007FF7148D806C  xor         edx,edx  
00007FF7148D806E  jmp         <lambda_1619aabc5def9737e5d9abae5fbc4cef>::operator()+19h (07FF7148D8079h)  
00007FF7148D8070  cmp         r8d,20h  
00007FF7148D8074  sbb         edx,edx  
00007FF7148D8076  add         edx,3  
00007FF7148D8079  test        edx,edx  

Subv

auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
            switch (source_reg.GetRegisterType()) {
            case RegisterType::Input:
                return state.input_register_table[source_reg.GetIndex()];

            case RegisterType::Temporary:
                return &state.temporary_registers[source_reg.GetIndex()].x;

            case RegisterType::FloatUniform:
                return &uniforms.f[source_reg.GetIndex()].x;

Subv

00007FF76B5A80B0  mov         r8d,dword ptr [rdx]  
00007FF76B5A80B3  mov         r9,rcx  
00007FF76B5A80B6  cmp         r8d,10h  
00007FF76B5A80BA  jae         <lambda_50aa66b5c217ab9b9775925e6eed09bb>::operator()+10h (07FF76B5A80C0h)  
00007FF76B5A80BC  xor         edx,edx  
00007FF76B5A80BE  jmp         <lambda_50aa66b5c217ab9b9775925e6eed09bb>::operator()+19h (07FF76B5A80C9h)  
00007FF76B5A80C0  cmp         r8d,20h  
00007FF76B5A80C4  sbb         edx,edx  
00007FF76B5A80C6  add         edx,3  
00007FF76B5A80C9  test        edx,edx  

Subv

00007FF76B5A81B0  mov         qword ptr [rsp+8],rbx  
00007FF76B5A81B5  push        rdi  
00007FF76B5A81B6  sub         rsp,30h  
00007FF76B5A81BA  mov         rax,qword ptr [rcx]  
00007FF76B5A81BD  mov         r10d,r8d  
00007FF76B5A81C0  lea         rbx,[rdx+298h]  
00007FF76B5A81C7  lea         rcx,[r10-1]  
00007FF76B5A81CB  mov         dword ptr [rsp+2Ch],r8d  
00007FF76B5A81D0  lea         rcx,[rax+rcx*4]  
00007FF76B5A81D4  lea         eax,[r8+r9]  

Subv

static auto call = [&program_code](VertexShaderState& state, u32 offset, u32 num_instructions,
                      u32 return_offset, u8 repeat_count, u8 loop_increment) {
    state.program_counter = &program_code[offset] - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
    state.call_stack.push({ offset + num_instructions, return_offset, repeat_count, loop_increment, offset });
};

Subv

diff --git a/include/nihstro/shader_bytecode.h b/include/nihstro/shader_bytecode.h
index 4b609eb..5686c6c 100644
--- a/include/nihstro/shader_bytecode.h
+++ b/include/nihstro/shader_bytecode.h
@@ -380,8 +380,7 @@ struct OpCode {
     }
 
     const Info& GetInfo() const {
-        static const OpCode::Info unknown_instruction = { OpCode::Type::Unknown, 0, "UNK" };
-        static const OpCode::Info dummy = { OpCode::Type::Unknown, 0, "DMY" };

Subv

diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp
index 87006a8..cfa1d3b 100644
--- a/src/video_core/vertex_shader.cpp
+++ b/src/video_core/vertex_shader.cpp
@@ -103,13 +103,13 @@ static void ProcessShaderCode(VertexShaderState& state) {
         auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
             switch (source_reg.GetRegisterType()) {
             case RegisterType::Input:
-                return state.input_register_table[source_reg.GetIndex()];
+                return state.input_register_table[source_reg];