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SwapnilGaikwad/sve_dup_reg_allocation_issue.dump

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sve_dup_reg_allocation_issue.dump
Beginning scenario: RunBasicScenario_UnsafeRead
****** START compiling System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short] (MethodHash=3d7d92ae)
Generating code for Unix arm64
OPTIONS: Tier-0 compilation (set DOTNET_TieredCompilation=0 to disable)
OPTIONS: compCodeOpt = BLENDED_CODE
OPTIONS: compDbgCode = false
OPTIONS: compDbgInfo = true
OPTIONS: compDbgEnC = false
OPTIONS: compProcedureSplitting = false
OPTIONS: compProcedureSplittingEH = false
IL to import:
IL_0000 02 ldarg.0
IL_0001 03 ldarg.1
IL_0002 28 b2 5b 00 06 call 0x6005BB2
IL_0007 2a ret
Notify VM instruction set (AdvSimd) must be supported.
Found Vector<short>
Notify VM instruction set (VectorT128) must be supported.
Found Vector<short>
Arg #0 passed in register(s) d0
Arg #1 passed in register(s) x0
Parameter V00 ABI info: [00..16) reg d0
Parameter V01 ABI info: [00..01) reg x0
lvaGrabTemp returning 2 (V02 tmp0) (a long lifetime temp) called for OutgoingArgSpace.
Local V02 should not be enregistered because: it is address exposed
; Initial local variable assignments
;
; V00 arg0 simd16 HFA(simd16) <System.Numerics.Vector`1[short]>
; V01 arg1 ubyte
; V02 OutArgs struct <0> do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
*************** In compInitDebuggingInfo() for System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]
getVars() returned cVars = 0, extendOthers = true
info.compVarScopesCount = 2
VarNum LVNum Name Beg End
0: 00h 00h V00 arg0 000h 008h
1: 01h 01h V01 arg1 000h 008h
info.compStmtOffsetsCount = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]
Jump targets:
none
New Basic Block BB01 [0000] created.
BB01 [0000] [000..008)
CLFLG_MINOPT set for method System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]
IL Code Size,Instr 8, 4, Basic Block count 1, Local Variable Num,Ref count 3, 2 for method System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]
IL Code Size,Instr 8, 4, Basic Block count 1, Local Variable Num,Ref count 3, 2 for method System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]
OPTIONS: opts.MinOpts() == true
Basic block list for 'System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]'
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return)
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
*************** Starting PHASE Pre-import
*************** Finishing PHASE Pre-import
Trees after Pre-import
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return)
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** Starting PHASE Profile incorporation
not optimizing, so not incorporating any profile data
*************** Finishing PHASE Profile incorporation [no changes]
*************** Starting PHASE Importation
impImportBlockPending for BB01
Importing BB01 (PC=000) of 'System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldarg.1
[ 2] 2 (0x002) call 06005BB2
In Compiler::impImportCall: opcode is call, kind=0, callRetType is struct, structSize is 16
Named Intrinsic System.Runtime.Intrinsics.Arm.Sve.DuplicateSelectedScalarToVector: Notify VM instruction set (Sve) must be supported.
Recognized
Found Vector<short>
Found Vector<short>
Found Vector<short>
Found Vector<short>
[ 1] 7 (0x007) ret
impFixupStructReturnType: retyping
[000006] ---X------- * HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X------- \--* COMMA ubyte
[000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
[000003] ----------- | +--* LCL_VAR ubyte V01 arg1
[000002] ----------- | \--* CNS_INT int 32
[000001] ----------- \--* LCL_VAR ubyte V01 arg1
STMT00000 ( 0x000[E-] ... ??? )
[000007] ---X------- * RETURN simd16
[000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X------- \--* COMMA ubyte
[000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
[000003] ----------- | +--* LCL_VAR ubyte V01 arg1
[000002] ----------- | \--* CNS_INT int 32
[000001] ----------- \--* LCL_VAR ubyte V01 arg1
*************** Finishing PHASE Importation
Trees after Importation
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x007 )
[000007] ---X------- * RETURN simd16
[000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X------- \--* COMMA ubyte
[000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
[000003] ----------- | +--* LCL_VAR ubyte V01 arg1
[000002] ----------- | \--* CNS_INT int 32
[000001] ----------- \--* LCL_VAR ubyte V01 arg1
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Expand patchpoints
-- no patchpoints to transform
*************** Finishing PHASE Expand patchpoints [no changes]
*************** Starting PHASE Indirect call transform
-- no candidates to transform
*************** Finishing PHASE Indirect call transform [no changes]
*************** Starting PHASE Post-import
*************** Finishing PHASE Post-import [no changes]
*************** Starting PHASE Morph - Init
New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short)
*************** Finishing PHASE Morph - Init [no changes]
*************** Starting PHASE Morph - Inlining
*************** Finishing PHASE Morph - Inlining [no changes]
*************** Starting PHASE Allocate Objects
no newobjs in this method; punting
*************** Finishing PHASE Allocate Objects [no changes]
*************** Starting PHASE Morph - Add internal blocks
*************** After fgAddInternal()
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
*************** Finishing PHASE Morph - Add internal blocks [no changes]
*************** Starting PHASE Add Swift error returns
*************** Finishing PHASE Add Swift error returns [no changes]
*************** Starting PHASE Remove empty try
*************** In fgRemoveEmptyTry()
No EH in this method, nothing to remove.
*************** Finishing PHASE Remove empty try [no changes]
*************** Starting PHASE Remove empty finally
No EH in this method, nothing to remove.
*************** Finishing PHASE Remove empty finally [no changes]
*************** Starting PHASE Merge callfinally chains
No EH in this method, nothing to merge.
*************** Finishing PHASE Merge callfinally chains [no changes]
*************** Starting PHASE Clone finally
No EH in this method, no cloning.
*************** Finishing PHASE Clone finally [no changes]
*************** Starting PHASE Morph - Promote Structs
promotion opt flag not enabled
*************** Finishing PHASE Morph - Promote Structs [no changes]
*************** Starting PHASE Morph - Structs/AddrExp
LocalAddressVisitor visiting statement:
STMT00000 ( 0x000[E-] ... 0x007 )
[000007] ---X------- * RETURN simd16
[000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X------- \--* COMMA ubyte
[000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
[000003] ----------- | +--* LCL_VAR ubyte V01 arg1
[000002] ----------- | \--* CNS_INT int 32
[000001] ----------- \--* LCL_VAR ubyte V01 arg1
*************** Finishing PHASE Morph - Structs/AddrExp [no changes]
*************** Starting PHASE Early liveness
*************** Finishing PHASE Early liveness [no changes]
*************** Starting PHASE Forward Substitution
*************** Finishing PHASE Forward Substitution [no changes]
*************** Starting PHASE Physical promotion
*************** Finishing PHASE Physical promotion [no changes]
*************** Starting PHASE Identify candidates for implicit byref copy omission
*************** Finishing PHASE Identify candidates for implicit byref copy omission [no changes]
*************** Starting PHASE Morph - ByRefs
*************** Finishing PHASE Morph - ByRefs [no changes]
*************** Starting PHASE Morph - Global
compEnregLocals() is false, setting doNotEnreg flag for all locals.
Local V00 should not be enregistered because: opts.compFlags & CLFLG_REGVAR is not set
Local V01 should not be enregistered because: opts.compFlags & CLFLG_REGVAR is not set
Local V02 should not be enregistered because: opts.compFlags & CLFLG_REGVAR is not set
Morphing BB01
fgMorphTree BB01, STMT00000 (before)
[000007] ---X------- * RETURN simd16
[000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X------- \--* COMMA ubyte
[000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
[000003] ----------- | +--* LCL_VAR ubyte V01 arg1
[000002] ----------- | \--* CNS_INT int 32
[000001] ----------- \--* LCL_VAR ubyte V01 arg1
BB01 requires throw helper block for SCK_ARG_RNG_EXCPN
fgMorphTree BB01, STMT00000 (after)
[000007] ---X-+----- * RETURN simd16
[000006] ---X-+----- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] -----+----- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X-+----- \--* COMMA ubyte
[000004] ---X-+----- +--* BOUNDS_CHECK_ArgRng void
[000008] -----+----- | +--* CAST int <- ubyte <- int
[000003] -----+----- | | \--* LCL_VAR int V01 arg1
[000002] -----+----- | \--* CNS_INT int 32
[000009] -----+----- \--* CAST int <- ubyte <- int
[000001] -----+----- \--* LCL_VAR int V01 arg1
*************** Finishing PHASE Morph - Global
Trees after Morph - Global
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x007 )
[000007] ---X-+----- * RETURN simd16
[000006] ---X-+----- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] -----+----- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X-+----- \--* COMMA ubyte
[000004] ---X-+----- +--* BOUNDS_CHECK_ArgRng void
[000008] -----+----- | +--* CAST int <- ubyte <- int
[000003] -----+----- | | \--* LCL_VAR int V01 arg1
[000002] -----+----- | \--* CNS_INT int 32
[000009] -----+----- \--* CAST int <- ubyte <- int
[000001] -----+----- \--* LCL_VAR int V01 arg1
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Post-Morph
*************** In fgMarkDemotedImplicitByRefArgs()
*************** Finishing PHASE Post-Morph
Trees after Post-Morph
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x007 )
[000007] ---X-+----- * RETURN simd16
[000006] ---X-+----- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
[000000] -----+----- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
[000005] ---X-+----- \--* COMMA ubyte
[000004] ---X-+----- +--* BOUNDS_CHECK_ArgRng void
[000008] -----+----- | +--* CAST int <- ubyte <- int
[000003] -----+----- | | \--* LCL_VAR int V01 arg1
[000002] -----+----- | \--* CNS_INT int 32
[000009] -----+----- \--* CAST int <- ubyte <- int
[000001] -----+----- \--* LCL_VAR int V01 arg1
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE GS Cookie
No GS security needed
*************** Finishing PHASE GS Cookie [no changes]
*************** Starting PHASE Compute block weights
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
-- no profile data, so using default called count
*************** Finishing PHASE Compute block weights [no changes]
*************** Starting PHASE Create EH funclets
*************** Finishing PHASE Create EH funclets [no changes]
*************** Starting PHASE Morph array ops
No multi-dimensional array references in the function
*************** Finishing PHASE Morph array ops [no changes]
*************** Starting PHASE Mark local vars
*************** In lvaMarkLocalVars()
*** lvaComputeRefCounts ***
*************** Finishing PHASE Mark local vars [no changes]
*************** Starting PHASE Find oper order
*************** In fgFindOperOrder()
*************** Finishing PHASE Find oper order
Trees after Find oper order
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x007 )
( 18, 21) [000007] ---X------- * RETURN simd16
( 17, 20) [000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
( 3, 2) [000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
( 13, 17) [000005] ---X------- \--* COMMA ubyte
( 9, 13) [000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
( 4, 4) [000008] ----------- | +--* CAST int <- ubyte <- int
( 3, 2) [000003] ----------- | | \--* LCL_VAR int V01 arg1
( 1, 2) [000002] ----------- | \--* CNS_INT int 32
( 4, 4) [000009] ----------- \--* CAST int <- ubyte <- int
( 3, 2) [000001] ----------- \--* LCL_VAR int V01 arg1
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Set block order
*************** In fgSetBlockOrder()
The biggest BB has 10 tree nodes
*************** Finishing PHASE Set block order
Trees after Set block order
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x007 )
N010 ( 18, 21) [000007] ---X------- * RETURN simd16
N009 ( 17, 20) [000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
N001 ( 3, 2) [000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
N008 ( 13, 17) [000005] ---X------- \--* COMMA ubyte
N005 ( 9, 13) [000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
N003 ( 4, 4) [000008] ----------- | +--* CAST int <- ubyte <- int
N002 ( 3, 2) [000003] ----------- | | \--* LCL_VAR int V01 arg1
N004 ( 1, 2) [000002] ----------- | \--* CNS_INT int 32
N007 ( 4, 4) [000009] ----------- \--* CAST int <- ubyte <- int
N006 ( 3, 2) [000001] ----------- \--* LCL_VAR int V01 arg1
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Stress gtSplitTree
*************** Finishing PHASE Stress gtSplitTree [no changes]
*************** Starting PHASE Expand casts
*************** Finishing PHASE Expand casts [no changes]
*************** Starting PHASE Expand runtime lookups
*************** Finishing PHASE Expand runtime lookups [no changes]
*************** Starting PHASE Expand static init
Nothing to expand.
*************** Finishing PHASE Expand static init [no changes]
*************** Starting PHASE Expand TLS access
Nothing to expand.
*************** Finishing PHASE Expand TLS access [no changes]
*************** Starting PHASE Insert GC Polls
*************** Finishing PHASE Insert GC Polls [no changes]
*************** Starting PHASE Create throw helper blocks
fgNewBBinRegion(jumpKind=BBJ_THROW, tryIndex=0, hndIndex=0, putInFilter=false, runRarely=true, insertAtEnd=true): inserting after BB01
New Basic Block BB02 [0001] created.
Adding throw helper BB02 for SCK_ARG_RNG_EXCPN in non-EH region for ARG_RNG_EXCPN (inspired by BB01)
Initializing arg info for 10.CALL:
Args for call [000010] CALL after AddFinalArgsAndDetermineABIInfo:
Morphing args for 10.CALL:
Args for [000010].CALL after fgMorphArgs:
OutgoingArgsStackSize is 0
*************** Finishing PHASE Create throw helper blocks
Trees after Create throw helper blocks
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i
BB02 [0001] 0 0 [???..???) (throw ) i rare keep internal
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x007 )
N010 ( 18, 21) [000007] ---X------- * RETURN simd16
N009 ( 17, 20) [000006] ---X------- \--* HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
N001 ( 3, 2) [000000] ----------- +--* LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
N008 ( 13, 17) [000005] ---X------- \--* COMMA ubyte
N005 ( 9, 13) [000004] ---X------- +--* BOUNDS_CHECK_ArgRng void
N003 ( 4, 4) [000008] ----------- | +--* CAST int <- ubyte <- int
N002 ( 3, 2) [000003] ----------- | | \--* LCL_VAR int V01 arg1
N004 ( 1, 2) [000002] ----------- | \--* CNS_INT int 32
N007 ( 4, 4) [000009] ----------- \--* CAST int <- ubyte <- int
N006 ( 3, 2) [000001] ----------- \--* LCL_VAR int V01 arg1
------------ BB02 [0001] [???..???) (throw), preds={} succs={}
***** BB02 [0001]
STMT00001 ( ??? ... ??? )
N001 ( 14, 2) [000010] --CXG------ * CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Determine first cold block
No procedure splitting will be done for this method
*************** Finishing PHASE Determine first cold block [no changes]
*************** Starting PHASE Rationalize IR
*************** Finishing PHASE Rationalize IR
Trees after Rationalize IR
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i LIR
BB02 [0001] 0 0 [???..???) (throw ) i LIR rare keep internal
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
[000011] ----------- IL_OFFSET void INLRT @ 0x000[E-]
N001 ( 3, 2) [000000] ----------- t0 = LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
N002 ( 3, 2) [000003] ----------- t3 = LCL_VAR int V01 arg1
/--* t3 int
N003 ( 4, 4) [000008] ----------- t8 = * CAST int <- ubyte <- int
N004 ( 1, 2) [000002] ----------- t2 = CNS_INT int 32
/--* t8 int
+--* t2 int
N005 ( 9, 13) [000004] ---X------- * BOUNDS_CHECK_ArgRng void
N006 ( 3, 2) [000001] ----------- t1 = LCL_VAR int V01 arg1
/--* t1 int
N007 ( 4, 4) [000009] ----------- t9 = * CAST int <- ubyte <- int
/--* t0 simd16
+--* t9 int
N009 ( 17, 20) [000006] ---X------- t6 = * HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
/--* t6 simd16
N010 ( 18, 21) [000007] ---X------- * RETURN simd16
------------ BB02 [0001] [???..???) (throw), preds={} succs={}
N001 ( 14, 2) [000010] --CXG------ CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Lowering nodeinfo
compEnregLocals() is false, setting doNotEnreg flag for all locals.
Local V00 should not be enregistered because: opts.compFlags & CLFLG_REGVAR is not set
Local V01 should not be enregistered because: opts.compFlags & CLFLG_REGVAR is not set
Local V02 should not be enregistered because: opts.compFlags & CLFLG_REGVAR is not set
LowerCast for: N003 ( 4, 4) [000008] ----------- * CAST int <- ubyte <- int
LowerCast for: N007 ( 4, 4) [000009] ----------- * CAST int <- ubyte <- int
lowering return node
N010 ( 18, 21) [000007] ---X------- * RETURN simd16
============
lowering call (before):
N001 ( 14, 2) [000010] --CXG------ CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION
args:
======
late:
======
lowering call (after):
N001 ( 14, 2) [000010] --CXG------ CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION
Lower has completed modifying nodes.
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i LIR
BB02 [0001] 0 0 [???..???) (throw ) i LIR rare keep internal
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
[000011] ----------- IL_OFFSET void INLRT @ 0x000[E-]
N001 ( 3, 2) [000000] ----------- t0 = LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
N002 ( 3, 2) [000003] ----------- t3 = LCL_VAR int V01 arg1
/--* t3 int
N003 ( 4, 4) [000008] ----------- t8 = * CAST int <- ubyte <- int
N004 ( 1, 2) [000002] -c--------- t2 = CNS_INT int 32
/--* t8 int
+--* t2 int
N005 ( 9, 13) [000004] ---X------- * BOUNDS_CHECK_ArgRng void
N006 ( 3, 2) [000001] ----------- t1 = LCL_VAR int V01 arg1
/--* t1 int
N007 ( 4, 4) [000009] ----------- t9 = * CAST int <- ubyte <- int
/--* t0 simd16
+--* t9 int
N009 ( 17, 20) [000006] ---X------- t6 = * HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
/--* t6 simd16
N010 ( 18, 21) [000007] ---X------- * RETURN simd16
------------ BB02 [0001] [???..???) (throw), preds={} succs={}
N001 ( 14, 2) [000010] --CXG------ CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION
-------------------------------------------------------------------------------------------------------------------
*** lvaComputeRefCounts ***
*************** In fgLocalVarLiveness()
; Initial local variable assignments
;
; V00 arg0 simd16 HFA(simd16) do-not-enreg[S] <System.Numerics.Vector`1[short]>
; V01 arg1 ubyte do-not-enreg[]
; V02 OutArgs struct <0> do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
In fgLocalVarLivenessInit
*************** In fgPerBlockLocalVarLiveness()
*************** In fgInterBlockLocalVarLiveness()
*************** In fgRemoveDeadBlocks()
New BlockSet epoch 2, # of blocks (including unused BB00): 3, bitset array size: 1 (short)
Removing unreachable blocks for fgRemoveDeadBlocks iteration #1
*************** In fgDebugCheckBBlist
*** lvaComputeRefCounts ***
*************** Finishing PHASE Lowering nodeinfo
Trees after Lowering nodeinfo
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..008) (return) i LIR
BB02 [0001] 0 0 [???..???) (throw ) i LIR rare keep internal
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [0000] [000..008) (return), preds={} succs={}
[000011] ----------- IL_OFFSET void INLRT @ 0x000[E-]
N001 ( 3, 2) [000000] ----------- t0 = LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0
N002 ( 3, 2) [000003] ----------- t3 = LCL_VAR int V01 arg1
/--* t3 int
N003 ( 4, 4) [000008] ----------- t8 = * CAST int <- ubyte <- int
N004 ( 1, 2) [000002] -c--------- t2 = CNS_INT int 32
/--* t8 int
+--* t2 int
N005 ( 9, 13) [000004] ---X------- * BOUNDS_CHECK_ArgRng void
N006 ( 3, 2) [000001] ----------- t1 = LCL_VAR int V01 arg1
/--* t1 int
N007 ( 4, 4) [000009] ----------- t9 = * CAST int <- ubyte <- int
/--* t0 simd16
+--* t9 int
N009 ( 17, 20) [000006] ---X------- t6 = * HWINTRINSIC simd16 short DuplicateSelectedScalarToVector
/--* t6 simd16
N010 ( 18, 21) [000007] ---X------- * RETURN simd16
------------ BB02 [0001] [???..???) (throw), preds={} succs={}
N001 ( 14, 2) [000010] --CXG------ CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
[deferred prior check failed -- skipping this check]
*************** Starting PHASE Calculate stack level slots
*************** Finishing PHASE Calculate stack level slots [no changes]
*************** Starting PHASE Linear scan register alloc
Clearing modified regs.
buildIntervals ========
-----------------
LIVENESS:
-----------------
BB01
use: {}
def: {}
in: {}
out: {}
BB02
use: {}
def: {}
in: {}
out: {}
FP callee save candidate vars: None
floatVarCount = 0; hasLoops = false, singleExit = true
; Decided to create an EBP based frame for ETW stackwalking (Debug Code)
*************** In lvaAssignFrameOffsets(REGALLOC_FRAME_LAYOUT)
Setting genSaveFpLrWithAllCalleeSavedRegisters to false
Pad V00 arg0, size=16, stkOffs=-0x90, pad=0
Assign V00 arg0, size=16, stkOffs=-0xa0
Assign V01 arg1, size=4, stkOffs=-0xa4
--- delta bump 216 for FP frame
--- virtual stack offset to actual stack offset delta is 216
-- V00 was -160, now 56
-- V01 was -164, now 52
-- V02 was 0, now 216
compRsvdRegCheck
frame size = 216
compArgSize = 24
Returning true (MinOpts)
Reserved REG_OPT_RSVD (xip1) due to large frame
TUPLE STYLE DUMP BEFORE LSRA
Start LSRA Block Sequence:
Current block: BB01
Unvisited block: BB02, Criteria: weight, Worklist: [BB02 ]
Current block: BB02
Final LSRA Block Sequence:
BB01 ( 1 )
BB02 ( 0 )
BB01 [0000] [000..008) (return), preds={} succs={}
=====
N000. IL_OFFSET INLRT @ 0x000[E-]
N001. t0 = V00 MEM
N002. t3 = V01 MEM
N003. t8 = CAST ; t3
N004. CNS_INT 32
N005. BOUNDS_CHECK_ArgRng; t8
N006. t1 = V01 MEM
N007. t9 = CAST ; t1
N009. t6 = HWINTRINSIC; t0,t9
N010. RETURN ; t6
BB02 [0001] [???..???) (throw), preds={} succs={}
=====
N001. CALL help
buildIntervals second part ========
Float arg V00 in reg d0
Int arg V01 in reg x0
NEW BLOCK BB01
<RefPosition #0 @0 RefTypeBB BB01 regmask=[] minReg=1 wt=100.00>
DefList: { }
N002 (???,???) [000011] ----------- * IL_OFFSET void INLRT @ 0x000[E-] REG NA
DefList: { }
N004 ( 3, 2) [000000] ----------- * LCL_VAR simd16<System.Numerics.Vector`1> V00 arg0 NA REG NA
Interval 0: simd16 RefPositions {} physReg:NA Preferences=[allFloat] Aversions=[]
<RefPosition #1 @5 RefTypeDef <Ivl:0> LCL_VAR BB01 regmask=[allFloat] minReg=1 wt=400.00>
DefList: { N004.t0. LCL_VAR }
N006 ( 3, 2) [000003] ----------- * LCL_VAR int V01 arg1 NA REG NA
Interval 1: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
<RefPosition #2 @7 RefTypeDef <Ivl:1> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
DefList: { N004.t0. LCL_VAR; N006.t3. LCL_VAR }
N008 ( 4, 4) [000008] ----------- * CAST int <- ubyte <- int REG NA
<RefPosition #3 @8 RefTypeUse <Ivl:1> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
Interval 2: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
<RefPosition #4 @9 RefTypeDef <Ivl:2> CAST BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
DefList: { N004.t0. LCL_VAR; N008.t8. CAST }
N010 ( 1, 2) [000002] -c--------- * CNS_INT int 32 REG NA
Contained
DefList: { N004.t0. LCL_VAR; N008.t8. CAST }
N012 ( 9, 13) [000004] ---X------- * BOUNDS_CHECK_ArgRng void REG NA
<RefPosition #5 @12 RefTypeUse <Ivl:2> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
DefList: { N004.t0. LCL_VAR }
N014 ( 3, 2) [000001] ----------- * LCL_VAR int V01 arg1 NA REG NA
Interval 3: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
<RefPosition #6 @15 RefTypeDef <Ivl:3> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
DefList: { N004.t0. LCL_VAR; N014.t1. LCL_VAR }
N016 ( 4, 4) [000009] ----------- * CAST int <- ubyte <- int REG NA
<RefPosition #7 @16 RefTypeUse <Ivl:3> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
Interval 4: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
<RefPosition #8 @17 RefTypeDef <Ivl:4> CAST BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
DefList: { N004.t0. LCL_VAR; N016.t9. CAST }
N018 ( 17, 20) [000006] ---X------- * HWINTRINSIC simd16 short DuplicateSelectedScalarToVector REG NA
Interval 5: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
<RefPosition #9 @18 RefTypeDef <Ivl:5 internal> HWINTRINSIC BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #10 @18 RefTypeUse <Ivl:0> BB01 regmask=[allFloat] minReg=1 last wt=100.00>
<RefPosition #11 @18 RefTypeUse <Ivl:4> BB01 regmask=[d0-d15] minReg=1 last wt=100.00>
<RefPosition #12 @18 RefTypeUse <Ivl:5 internal> HWINTRINSIC BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=400.00>
Interval 6: simd16 RefPositions {} physReg:NA Preferences=[allFloat] Aversions=[]
<RefPosition #13 @19 RefTypeDef <Ivl:6> HWINTRINSIC BB01 regmask=[allFloat] minReg=1 wt=400.00>
DefList: { N018.t6. HWINTRINSIC }
N020 ( 18, 21) [000007] ---X------- * RETURN simd16 REG NA
<RefPosition #14 @20 RefTypeFixedReg <Reg:d0 > BB01 regmask=[d0] minReg=1 wt=100.00>
<RefPosition #15 @20 RefTypeUse <Ivl:6> BB01 regmask=[d0] minReg=1 last fixed wt=100.00>
NEW BLOCK BB02
No predecessor; - throw block; <RefPosition #16 @22 RefTypeBB BB02 regmask=[] minReg=1 wt=0.00>
firstColdLoc = 24
DefList: { }
N024 ( 14, 2) [000010] --CXG------ * CALL help void CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION REG NA
<RefPosition #17 @25 RefTypeKill BB02 regmask=[x0-xip1 lr d0-d7 d16-d31] minReg=1>
Linear scan intervals BEFORE VALIDATING INTERVALS:
Interval 0: simd16 RefPositions {#1@5 #10@18} physReg:NA Preferences=[allFloat] Aversions=[]
Interval 1: int RefPositions {#2@7 #3@8} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 2: int RefPositions {#4@9 #5@12} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 3: int RefPositions {#6@15 #7@16} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 4: int (def-use conflict) RefPositions {#8@17 #11@18} physReg:NA Preferences=[d0-d15] Aversions=[]
Interval 5: int (INTERNAL) RefPositions {#9@18 #12@18} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 6: simd16 RefPositions {#13@19 #15@20} physReg:NA Preferences=[d0] Aversions=[]
------------
REFPOSITIONS BEFORE VALIDATING INTERVALS:
------------
<RefPosition #0 @0 RefTypeBB BB01 regmask=[] minReg=1 wt=100.00>
<RefPosition #1 @5 RefTypeDef <Ivl:0> LCL_VAR BB01 regmask=[allFloat] minReg=1 wt=400.00>
<RefPosition #2 @7 RefTypeDef <Ivl:1> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #3 @8 RefTypeUse <Ivl:1> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
<RefPosition #4 @9 RefTypeDef <Ivl:2> CAST BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #5 @12 RefTypeUse <Ivl:2> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
<RefPosition #6 @15 RefTypeDef <Ivl:3> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #7 @16 RefTypeUse <Ivl:3> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
<RefPosition #8 @17 RefTypeDef <Ivl:4> CAST BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #9 @18 RefTypeDef <Ivl:5 internal> HWINTRINSIC BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #10 @18 RefTypeUse <Ivl:0> BB01 regmask=[allFloat] minReg=1 last wt=100.00>
<RefPosition #11 @18 RefTypeUse <Ivl:4> BB01 regmask=[d0-d15] minReg=1 last wt=100.00>
<RefPosition #12 @18 RefTypeUse <Ivl:5 internal> HWINTRINSIC BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=400.00>
<RefPosition #13 @19 RefTypeDef <Ivl:6> HWINTRINSIC BB01 regmask=[d0] minReg=1 wt=400.00>
<RefPosition #14 @20 RefTypeFixedReg <Reg:d0 > BB01 regmask=[d0] minReg=1 wt=100.00>
<RefPosition #15 @20 RefTypeUse <Ivl:6> BB01 regmask=[d0] minReg=1 last fixed wt=100.00>
<RefPosition #16 @22 RefTypeBB BB02 regmask=[] minReg=1 wt=0.00>
<RefPosition #17 @25 RefTypeKill BB02 regmask=[x0-xip1 lr d0-d7 d16-d31] minReg=1>
TUPLE STYLE DUMP WITH REF POSITIONS
Incoming Parameters:
BB01 [0000] [000..008) (return), preds={} succs={}
=====
N002. IL_OFFSET INLRT @ 0x000[E-]
N004. V00 MEM
Def:<I0>(#1)
N006. V01 MEM
Def:<I1>(#2)
N008. CAST
Use:<I1>(#3) *
Def:<I2>(#4)
N010. CNS_INT 32
N012. BOUNDS_CHECK_ArgRng
Use:<I2>(#5) *
N014. V01 MEM
Def:<I3>(#6)
N016. CAST
Use:<I3>(#7) *
Def:<I4>(#8)
N018. HWINTRINSIC
Def:<T5>(#9)
Use:<I0>(#10) *
Use:<I4>(#11) *
Use:<T5>(#12) *
Def:<I6>(#13)
N020. RETURN
Use:<I6>(#15) Fixed:d0(#14) *
BB02 [0001] [???..???) (throw), preds={} succs={}
=====
N024. CALL help
Kill: [x0-xip1 lr d0-d7 d16-d31]
Linear scan intervals after buildIntervals:
Interval 0: simd16 RefPositions {#1@5 #10@18} physReg:NA Preferences=[allFloat] Aversions=[]
Interval 1: int RefPositions {#2@7 #3@8} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 2: int RefPositions {#4@9 #5@12} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 3: int RefPositions {#6@15 #7@16} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 4: int (def-use conflict) RefPositions {#8@17 #11@18} physReg:NA Preferences=[d0-d15] Aversions=[]
Interval 5: int (INTERNAL) RefPositions {#9@18 #12@18} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 6: simd16 RefPositions {#13@19 #15@20} physReg:NA Preferences=[d0] Aversions=[]
*************** In LinearScan::allocateRegistersMinimal()
Linear scan intervals before allocateRegistersMinimal:
Interval 0: simd16 RefPositions {#1@5 #10@18} physReg:NA Preferences=[allFloat] Aversions=[]
Interval 1: int RefPositions {#2@7 #3@8} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 2: int RefPositions {#4@9 #5@12} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 3: int RefPositions {#6@15 #7@16} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 4: int (def-use conflict) RefPositions {#8@17 #11@18} physReg:NA Preferences=[d0-d15] Aversions=[]
Interval 5: int (INTERNAL) RefPositions {#9@18 #12@18} physReg:NA Preferences=[x0-xip0 x19-x28] Aversions=[]
Interval 6: simd16 RefPositions {#13@19 #15@20} physReg:NA Preferences=[d0] Aversions=[]
------------
REFPOSITIONS BEFORE ALLOCATION:
------------
<RefPosition #0 @0 RefTypeBB BB01 regmask=[] minReg=1 wt=100.00>
<RefPosition #1 @5 RefTypeDef <Ivl:0> LCL_VAR BB01 regmask=[allFloat] minReg=1 wt=400.00>
<RefPosition #2 @7 RefTypeDef <Ivl:1> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #3 @8 RefTypeUse <Ivl:1> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
<RefPosition #4 @9 RefTypeDef <Ivl:2> CAST BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #5 @12 RefTypeUse <Ivl:2> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
<RefPosition #6 @15 RefTypeDef <Ivl:3> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #7 @16 RefTypeUse <Ivl:3> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00>
<RefPosition #8 @17 RefTypeDef <Ivl:4> CAST BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #9 @18 RefTypeDef <Ivl:5 internal> HWINTRINSIC BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00>
<RefPosition #10 @18 RefTypeUse <Ivl:0> BB01 regmask=[allFloat] minReg=1 last wt=100.00>
<RefPosition #11 @18 RefTypeUse <Ivl:4> BB01 regmask=[d0-d15] minReg=1 last wt=100.00>
<RefPosition #12 @18 RefTypeUse <Ivl:5 internal> HWINTRINSIC BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=400.00>
<RefPosition #13 @19 RefTypeDef <Ivl:6> HWINTRINSIC BB01 regmask=[d0] minReg=1 wt=400.00>
<RefPosition #14 @20 RefTypeFixedReg <Reg:d0 > BB01 regmask=[d0] minReg=1 wt=100.00>
<RefPosition #15 @20 RefTypeUse <Ivl:6> BB01 regmask=[d0] minReg=1 last fixed wt=100.00>
<RefPosition #16 @22 RefTypeBB BB02 regmask=[] minReg=1 wt=0.00>
<RefPosition #17 @25 RefTypeKill BB02 regmask=[x0-xip1 lr d0-d7 d16-d31] minReg=1>
Allocating Registers
--------------------
The following table has one or more rows for each RefPosition that is handled during allocation.
The columns are: (1) Loc: LSRA location, (2) RP#: RefPosition number, (3) Name, (4) Type (e.g. Def, Use,
Fixd, Parm, DDef (Dummy Def), ExpU (Exposed Use), Kill) followed by a '*' if it is a last use, and a 'D'
if it is delayRegFree, (5) Action taken during allocation. Some actions include (a) Alloc a new register,
(b) Keep an existing register, (c) Spill a register, (d) ReLod (Reload) a register. If an ALL-CAPS name
such as COVRS is displayed, it is a score name from lsra_score.h, with a trailing '(A)' indicating alloc,
'(C)' indicating copy, and '(R)' indicating re-use. See dumpLsraAllocationEvent() for details.
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is
active, 'p' if it is a large vector that has been partially spilled, and 'i' if it is inactive.
Columns are only printed up to the last modified register, which may increase during allocation,
in which case additional columns will appear. Registers which are not marked modified have ---- in
their column.
------------------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
TreeID LocRP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |
------------------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
| | | | | | | | | | | | | | | |
0.#0 BB1 PredBB0 | | | | | | | | | | | | | | | |
------------------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
TreeID LocRP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |
------------------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
[000000] 5.#1 I0 Def ORDER(A) d16 | | | | | | | | | | | | | | | |I0 a|
[000003] 7.#2 I1 Def ORDER(A) x0 |I1 a| | | | | | | | | | | | | | |I0 a|
[000008] 8.#3 I1 Use * Keep x0 |I1 a| | | | | | | | | | | | | | |I0 a|
9.#4 I2 Def ORDER(A) x0 |I2 a| | | | | | | | | | | | | | |I0 a|
[000004] 12.#5 I2 Use * Keep x0 |I2 a| | | | | | | | | | | | | | |I0 a|
[000001] 15.#6 I3 Def ORDER(A) x0 |I3 a| | | | | | | | | | | | | | |I0 a|
[000009] 16.#7 I3 Use * Keep x0 |I3 a| | | | | | | | | | | | | | |I0 a|
17.#8 I4 Def DUconflict | | | | | | | | | | | | | | | |I0 a|
Case #6 need a copy | | | | | | | | | | | | | | | |I0 a|
ORDER(A) x0 |I4 a| | | | | | | | | | | | | | |I0 a|
[000006] 18.#9 I5 Def ORDER(A) x1 |I4 a|I5 a| | | | | | | | | | | | | |I0 a|
18.#10 I0 Use * Keep d16 |I4 a|I5 a| | | | | | | | | | | | | |I0 a|
Assert failure(PID 1210088 [0x001276e8], Thread: 1210088 [0x1276e8]): Assertion failed '(candidates & allRegs(regType)) != RBM_NONE' in 'System.Runtime.Intrinsics.Arm.Sve:DuplicateSelectedScalarToVector(System.Numerics.Vector`1[short],ubyte):System.Numerics.Vector`1[short]' during 'LSRA build intervals' (IL size 8; hash 0x3d7d92ae; Tier0)
File: /home/swagai01/dotnet/runtime/src/coreclr/jit/lsra.cpp:2913
Image: /home/swagai01/dotnet/runtime/dup-artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun
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