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SwapnilGaikwad/indexOf-patch-arm64

Created July 5, 2022 13:47
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indexOf-patch-arm64
; Assembly listing for method System.Text.Tests.AsciiUtilityTests:GetIndexOfFirstNonAsciiChar_Intrinsifed(long,long):long
; Emitting BLENDED_CODE for generic ARM64 CPU - Unix
; optimized code
; fp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 9 single block inlinees; 7 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T00] ( 34, 35.50) long -> x19
; V01 arg1 [V01,T01] ( 17, 10 ) long -> x1
;* V02 loc0 [V02,T12] ( 0, 0 ) int -> zero-ref single-def
;* V03 loc1 [V03,T13] ( 0, 0 ) int -> zero-ref single-def
; V04 loc2 [V04,T15] ( 15, 14.50) simd16 -> d16 HFA(simd16)
; V05 loc3 [V05,T16] ( 3, 8.50) simd16 -> d17 HFA(simd16)
;* V06 loc4 [V06 ] ( 0, 0 ) int -> zero-ref
; V07 loc5 [V07,T04] ( 8, 4 ) long -> x20 single-def
;* V08 loc6 [V08 ] ( 0, 0 ) long -> zero-ref
; V09 loc7 [V09,T06] ( 3, 1.50) int -> x0
; V10 loc8 [V10,T03] ( 2, 4.50) long -> x0 single-def
;* V11 loc9 [V11 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16)
;* V12 loc10 [V12 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16)
;* V13 loc11 [V13 ] ( 0, 0 ) long -> zero-ref
; V14 loc12 [V14,T05] ( 4, 2 ) long -> x0
;* V15 loc13 [V15 ] ( 0, 0 ) int -> zero-ref
;# V16 OutArgs [V16 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
; V17 tmp1 [V17,T17] ( 3, 3 ) simd16 -> d16 HFA(simd16) "dup spill"
;* V18 tmp2 [V18,T08] ( 0, 0 ) bool -> zero-ref "Inline return value spill temp"
;* V19 tmp3 [V19 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V20 tmp4 [V20,T02] ( 0, 0 ) bool -> zero-ref "Inline return value spill temp"
; V21 tmp5 [V21,T14] ( 3, 24 ) simd16 -> d18 HFA(simd16) "Inlining Arg"
;* V22 tmp6 [V22,T09] ( 0, 0 ) bool -> zero-ref "Inline return value spill temp"
;* V23 tmp7 [V23 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V24 tmp8 [V24,T10] ( 0, 0 ) bool -> zero-ref "Inline return value spill temp"
;* V25 tmp9 [V25 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V26 tmp10 [V26,T11] ( 0, 0 ) bool -> zero-ref "Inline return value spill temp"
;* V27 tmp11 [V27 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg"
;* V28 tmp12 [V28 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V29 tmp13 [V29 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V30 tmp14 [V30 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V31 tmp15 [V31 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
; V32 cse0 [V32,T07] ( 3, 1.50) long -> x0 "CSE - moderate"
;
; Lcl frame size = 0
G_M21315_IG01:
stp fp, lr, [sp,#-32]!
stp x19, x20, [sp,#16]
mov fp, sp
mov x19, x0
;; size=16 bbWeight=1 PerfScore 3.00
G_M21315_IG02:
cbnz x1, G_M21315_IG05
;; size=4 bbWeight=1 PerfScore 1.00
G_M21315_IG03:
mov x0, xzr
;; size=4 bbWeight=0.50 PerfScore 0.25
G_M21315_IG04:
ldp x19, x20, [sp,#16]
ldp fp, lr, [sp],#32
ret lr
;; size=12 bbWeight=0.50 PerfScore 1.50
G_M21315_IG05:
mov x20, x19
cmp x1, #8
blo G_M21315_IG15
ld1 {v16.8h}, [x20]
umaxp v17.8h, v16.8h, v16.8h
umov x0, v17.d[0]
tst x0, #0xd1ffab1e
bne G_M21315_IG13
lsl x1, x1, #1
cmp x1, #32
blo G_M21315_IG08
add x0, x20, #16
and x19, x0, #-16
sub x0, x19, x20
sub x1, x1, x0
cmp x1, #32
blo G_M21315_IG07
add x0, x19, x1
sub x0, x0, #32
align [0 bytes for IG06]
align [0 bytes]
align [0 bytes]
align [0 bytes]
;; size=76 bbWeight=0.50 PerfScore 7.75
G_M21315_IG06:
ld1 {v16.8h}, [x19]
add x2, x19, #16
ld1 {v17.8h}, [x2]
orr v18.8h, v16.8h, v17.8h
umaxp v18.8h, v18.8h, v18.8h
umov x2, v18.d[0]
tst x2, #0xd1ffab1e
bne G_M21315_IG12
add x19, x19, #32
cmp x19, x0
bls G_M21315_IG06
;; size=44 bbWeight=4 PerfScore 50.00
G_M21315_IG07:
tbz x1, #4, G_M21315_IG09
ld1 {v16.8h}, [x19]
umaxp v17.8h, v16.8h, v16.8h
umov x0, v17.d[0]
tst x0, #0xd1ffab1e
bne G_M21315_IG13
;; size=24 bbWeight=0.50 PerfScore 3.75
G_M21315_IG08:
add x19, x19, #16
;; size=4 bbWeight=0.50 PerfScore 0.25
G_M21315_IG09:
uxtb w0, w1
tst w0, #15
beq G_M21315_IG10
and x0, x1, #15
add x0, x0, x19
sub x19, x0, #16
ld1 {v16.8h}, [x19]
umaxp v17.8h, v16.8h, v16.8h
umov x0, v17.d[0]
tst x0, #0xd1ffab1e
bne G_M21315_IG13
add x19, x19, #16
;; size=48 bbWeight=0.50 PerfScore 5.25
G_M21315_IG10:
sub x0, x19, x20
lsr x0, x0, #1
;; size=8 bbWeight=0.50 PerfScore 0.75
G_M21315_IG11:
ldp x19, x20, [sp,#16]
ldp fp, lr, [sp],#32
ret lr
;; size=12 bbWeight=0.50 PerfScore 1.50
G_M21315_IG12:
umaxp v18.8h, v16.8h, v16.8h
umov x1, v18.d[0]
tst x1, #0xd1ffab1e
bne G_M21315_IG13
add x19, x19, #16
mov v16.16b, v17.16b
;; size=24 bbWeight=0.50 PerfScore 2.25
G_M21315_IG13:
ldr q17, [@RWD00]
cmhi v16.8h, v16.8h, v17.8h
uzp2 v16.16b, v16.16b, v16.16b
umov x0, v16.d[0]
rbit x0, x0
clz x0, x0
asr w0, w0, #3
sbfiz x0, x0, #1, #32
add x19, x0, x19
b G_M21315_IG10
;; size=40 bbWeight=0.50 PerfScore 5.00
G_M21315_IG14:
movz x1, #0xd1ffab1e // code for System.Text.Tests.AsciiUtilityTests:FirstCharInUInt32IsAscii
movk x1, #0xd1ffab1e LSL #16
movk x1, #0xd1ffab1e LSL #32
ldr x1, [x1]
blr x1
cbz w0, G_M21315_IG10
add x19, x19, #2
b G_M21315_IG10
;; size=32 bbWeight=0.50 PerfScore 4.00
G_M21315_IG15:
tbz w1, #2, G_M21315_IG17
ldr x0, [x20]
and x0, x0, #0xd1ffab1e
cbz x0, G_M21315_IG16
rbit x1, x0
clz x0, x1
asr w0, w0, #3
sxtw x0, w0
and x0, x0, #-2
add x19, x20, x0
b G_M21315_IG10
;; size=44 bbWeight=0.50 PerfScore 5.25
G_M21315_IG16:
add x19, x20, #8
;; size=4 bbWeight=0.50 PerfScore 0.25
G_M21315_IG17:
tbz w1, #1, G_M21315_IG18
ldr w0, [x19]
tst w0, #0xd1ffab1e
bne G_M21315_IG14
add x19, x19, #4
;; size=20 bbWeight=0.50 PerfScore 3.00
G_M21315_IG18:
tbz w1, #0, G_M21315_IG10
ldrh w0, [x19]
cmp w0, #127
bgt G_M21315_IG10
add x19, x19, #2
b G_M21315_IG10
;; size=24 bbWeight=0.50 PerfScore 3.50
RWD00 dq 007F007F007F007Fh, 007F007F007F007Fh
; Total bytes of code 440, prolog size 16, PerfScore 142.25, instruction count 114, allocated bytes for code 440 (MethodHash=6043acbc) for method System.Text.Tests.AsciiUtilityTests:GetIndexOfFirstNonAsciiChar_Intrinsifed(long,long):long
; ============================================================
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