indexOf-main-arm64

; Assembly listing for method System.Text.Tests.AsciiUtilityTests:GetIndexOfFirstNonAsciiChar_Default(long,long):long
; Emitting BLENDED_CODE for generic ARM64 CPU - Unix
; optimized code
; fp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 10 single block inlinees; 0 inlinees without PGO data
; Final local variable assignments
;
;  V00 arg0         [V00,T00] ( 24, 42   )    long  ->  x19        
;  V01 arg1         [V01,T01] ( 12, 18.50)    long  ->   x1        
;  V02 loc0         [V02,T05] (  6,  4   )    long  ->  x20         single-def
;  V03 loc1         [V03,T02] (  7, 10.50)     int  ->   x0        
;* V04 loc2         [V04,T06] (  0,  0   )     int  ->  zero-ref    single-def
;* V05 loc3         [V05,T07] (  0,  0   )     int  ->  zero-ref    single-def
;  V06 loc4         [V06,T08] (  3,  5   )  simd16  ->  d16         HFA(simd16)  ld-addr-op
;  V07 loc5         [V07,T04] (  2,  4.50)    long  ->   x0         single-def
;  V08 loc6         [V08,T03] (  3,  8.50)     int  ->   x2        
;# V09 OutArgs      [V09    ] (  1,  1   )  lclBlk ( 0) [sp+00H]   "OutgoingArgSpace"
;* V10 tmp1         [V10    ] (  0,  0   )  simd16  ->  zero-ref    HFA(simd16)  "struct address for call/obj"
;* V11 tmp2         [V11    ] (  0,  0   )  simd16  ->  zero-ref    HFA(simd16)  "struct address for call/obj"
;* V12 tmp3         [V12    ] (  0,  0   )  simd16  ->  zero-ref    HFA(simd16)  "Inlining Arg"
;* V13 tmp4         [V13    ] (  0,  0   )  simd16  ->  zero-ref    HFA(simd16)  "Inlining Arg"
;* V14 tmp5         [V14    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
;* V15 tmp6         [V15    ] (  0,  0   )     int  ->  zero-ref    "Inlining Arg"
;
; Lcl frame size = 0

G_M64275_IG01:
            stp     fp, lr, [sp,#-32]!
            stp     x19, x20, [sp,#16]
            mov     fp, sp
            mov     x19, x0
                                                ;; size=16 bbWeight=1    PerfScore 3.00
G_M64275_IG02:
            mov     x20, x19
            cmp     x1, #16
            blo     G_M64275_IG06
                                                ;; size=12 bbWeight=1    PerfScore 2.00
G_M64275_IG03:
            mov     w0, #0xd1ffab1e
            dup     v16.4s, w0
            ldr     q17, [x20]
            cmhs    v17.8h, v16.8h, v17.8h
            mvni    v18.4s, #0x00
            cmeq    v17.2d, v17.2d, v18.2d
            uminv   b17, v17.16b
            umov    w0, v17.b[0]
            cmp     w0, #0
            beq     G_M64275_IG06
            add     x0, x20, x1, LSL #1
            sub     x0, x0, #16
            add     x2, x20, #16
            and     x19, x2, #-16
            align   [0 bytes for IG04]
            align   [0 bytes]
            align   [0 bytes]
            align   [0 bytes]
                                                ;; size=56 bbWeight=0.50 PerfScore 8.00
G_M64275_IG04:
            ldr     q17, [x19]
            cmhi    v17.8h, v17.8h, v16.8h
            umaxv   s17, v17.4s
            umov    w2, v17.s[0]
            cmp     w2, #0
            bne     G_M64275_IG05
            add     x19, x19, #16
            cmp     x19, x0
            bls     G_M64275_IG04
                                                ;; size=36 bbWeight=4    PerfScore 46.00
G_M64275_IG05:
            sub     x0, x19, x20
            lsr     x0, x0, #1
            sub     x1, x1, x0
                                                ;; size=12 bbWeight=0.50 PerfScore 1.00
G_M64275_IG06:
            cmp     x1, #4
            blo     G_M64275_IG08
            align   [0 bytes for IG07]
            align   [0 bytes]
            align   [0 bytes]
            align   [0 bytes]
                                                ;; size=8 bbWeight=1    PerfScore 1.50
G_M64275_IG07:
            ldr     w0, [x19]
            ldr     w2, [x19,#4]
            orr     w3, w0, w2
            tst     w3, #0xd1ffab1e
            bne     G_M64275_IG12
            add     x19, x19, #8
            sub     x1, x1, #4
            cmp     x1, #4
            bhs     G_M64275_IG07
                                                ;; size=36 bbWeight=4    PerfScore 42.00
G_M64275_IG08:
            tbz     w1, #1, G_M64275_IG09
            ldr     w0, [x19]
            tst     w0, #0xd1ffab1e
            bne     G_M64275_IG13
            add     x19, x19, #4
                                                ;; size=20 bbWeight=0.50 PerfScore 3.00
G_M64275_IG09:
            tbz     w1, #0, G_M64275_IG10
            ldrh    w0, [x19]
            cmp     w0, #127
            bgt     G_M64275_IG10
            add     x19, x19, #2
                                                ;; size=20 bbWeight=0.50 PerfScore 3.00
G_M64275_IG10:
            sub     x0, x19, x20
            lsr     x0, x0, #1
                                                ;; size=8 bbWeight=1    PerfScore 1.50
G_M64275_IG11:
            ldp     x19, x20, [sp,#16]
            ldp     fp, lr, [sp],#32
            ret     lr
                                                ;; size=12 bbWeight=1    PerfScore 3.00
G_M64275_IG12:
            tst     w0, #0xd1ffab1e
            bne     G_M64275_IG13
            mov     w0, w2
            add     x19, x19, #4
                                                ;; size=16 bbWeight=0.50 PerfScore 1.25
G_M64275_IG13:
            movz    x1, #0xd1ffab1e      // code for System.Text.Tests.AsciiUtilityTests:FirstCharInUInt32IsAscii
            movk    x1, #0xd1ffab1e LSL #16
            movk    x1, #0xd1ffab1e LSL #32
            ldr     x1, [x1]
            blr     x1
            cbz     w0, G_M64275_IG10
            add     x19, x19, #2
            b       G_M64275_IG10
                                                ;; size=32 bbWeight=0.50 PerfScore 4.00

; Total bytes of code 284, prolog size 16, PerfScore 147.65, instruction count 79, allocated bytes for code 284 (MethodHash=1ab804ec) for method System.Text.Tests.AsciiUtilityTests:GetIndexOfFirstNonAsciiChar_Default(long,long):long
; ============================================================