swy-avx-dissassembly-comp-simd-notes.txt

swy-avx-dissassembly-comp-simd-notes.txt

https://mastodon.gamedev.place/@rygorous/116728450481106448

f(void const*, void const*):
vmovsd xmm0, qword ptr [rdi]
vmovsd xmm1, qword ptr [rsi]
# swy: load bottom-most 64 bits
#      into xmm0, xmm1, respectively.
#      the three top 64 bit lanes of the 256-bit avx register
#      are now zero, due to the v prefix
#      xmm0 = 0 rdi
#      xmm1 = 0 rsi
vinsertf128 ymm0, ymm0, xmm1, 1
# swy: just insert xmm1 as the top 128
#      bit half of ymm0 (see 3rd arg)
#      ymm0 = 0 rsi 0 rdi
vshufps ymm0, ymm0, ymm0, 68
# swy: 68 = 0b01000100 = 01, 00, 01, 00
#      same indices used for bottn n top
#      128 bit halves. here each lane
#      index covers a span of 32 bits:
#      0 0 rsi/hi rsi/lo 0 0 rdi/hi rdi/lo
#      index positions:
#      3 2 1      0    |
#                      | 3 2 1      0
#      so propagate (1 and 0) to
#      (3 and 2) like so
#      rsi/hi rsi/lo rsi/hi rsi/lo rdi/hi rdi/lo rdi/hi rdi/lo
#      i.e. in 64-bit lanes:
#      0 rsi 0 rdi -> rsi rsi rdi rdi
ret

https://officedaytime.com/simd512e/simdimg/si.php?f=vinsertf128
https://officedaytime.com/simd512e/simdimg/si.php?f=shufps

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f(void const*, void const*):
vmovddup xmm0, qword ptr [rdi]
# swy: load 64 bits into bottom,
#      dupe into top 64, full xmm0 128 bits, 
#      clear top 128 in ymm0 (v prefix)
#      why no broadcastsd? bc clang knows we arent
#      going to ever use the top 128 bits, save work
vbroadcastsd ymm1, qword ptr [rsi]
# swy: splat 64-bit elem four times, 
#      1 per lane. we care about
#      the top 128 bit half. save ymm1
vblendps ymm0, ymm1, ymm0, 15
# swy: 15 = 0b1111 = 0, 0, 0, 0, 1, 1, 1, 1
#      what blend does is to pick/mux data from a or b at each position
#      here use top 128 bits from ymm1 (1st input arg. a/lut index 0)
#           and low 128 bits from ymm0 (2nd input arg. b/lut index 1)
#      save into ymm0 (first, output arg)

# swy: blending/muxing is prob more efficient/simple than shuffling
#      but also more inflexible, as we cannot move/swap lanes around.
#      not that we need it here :)
ret

ymm0 =   0   0 rdi rdi    (b)
ymm1 = rsi rsi rsi rsi    (a)
---------------------------------
ymm0 = rsi rsi rdi rdi

https://officedaytime.com/simd512e/simdimg/si.php?f=movddup
https://officedaytime.com/simd512e/simdimg/si.php?f=blendps