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Fereydoun Memarzanjany Thraetaona

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Fully self-learnt programmer and paralegal

Thraetaona / spline.f90

Created December 17, 2024 23:53

Spline interpolation matrices in FORTRAN

	! ----------------------------------------------------------------------
	! SPDX-License-Identifier: CC0-1.0
	! Authored by Fereydoun Memarzanjany
	!
	! To the maximum extent possible under law, the Author waives all
	! copyright and related or neighboring rights to this code.
	!
	! You should have received a copy of the CC0 legalcode along with this
	! work; if not, see <http://creativecommons.org/publicdomain/zero/1.0/>
	! ----------------------------------------------------------------------

Thraetaona / spline.f90

Last active November 26, 2024 17:33

FORTRAN 90 code to compute the Spline for a given set of x and f(x) arrays.

	! ----------------------------------------------------------------------
	! SPDX-License-Identifier: CC0-1.0
	!
	! spline.f90: Spline Interpolation
	! Authored by Fereydoun Memarzanjany
	!
	! To the maximum extent possible under law, the Author waives all
	! copyright and related or neighboring rights to this code.
	!
	! You should have received a copy of the CC0 legalcode along with this

Thraetaona / divided_differences.adb

Last active November 14, 2024 17:23

Newton's Divided Differences table generator implemented in the Ada language.

	-- ---------------------------------------------------------------------
	-- SPDX-License-Identifier: CC0-1.0
	--
	-- Authored by Fereydoun Memarzanjany
	--
	-- To the maximum extent possible under law, the Author waives all
	-- copyright and related or neighboring rights to this code.
	--
	-- You should have received a copy of the CC0 legalcode along with this
	-- work; if not, see <http://creativecommons.org/publicdomain/zero/1.0/>

Thraetaona / netinet.h

Last active July 20, 2024 04:52

C11 TCP/IP header structures

	// ---------------------------------------------------------------------
	// SPDX-License-Identifier: LGPL-3.0-or-later
	// ---------------------------------------------------------------------

	_Pragma ("once")
	#ifndef NETINET_H
	#define NETINET_H


	// NOTE: Unfortunately, <netinet/ip.h> is not a part of the POSIX

Thraetaona / consciousness.pdf

Last active May 30, 2024 08:22

Consciousness

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Thraetaona / srl_prescaler.vhd

Last active January 30, 2024 23:05

A Simple VHDL Abstraction of an Efficient Clock Prescaler Using Cascading Shift Registers

	-------------------------------------------------------------------------------
	-- SPDX-License-Identifier: LGPL-3.0-or-later or CERN-OHL-W-2.0
	--
	-- srl_prescaler.vhd: A Simple VHDL Abstraction of an Efficient Clock
	-- Prescaler Using Cascading Shift Registers.
	--
	-- Copyright (C) 2024 Fereydoun Memarzanjany
	--
	-- This hardware-descriptive model is free hardware design dual-licensed under
	-- the GNU LGPL or CERN OHL v2 Weakly Reciprocal: you can redistribute it