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| .syntax unified | |
| .cpu cortex-m0plus | |
| .thumb | |
| #ifndef FONT_BLIT_UNROLL | |
| #define FONT_BLIT_UNROLL 4 | |
| #endif | |
| .macro decl_func name | |
| .global \name |
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| module tmds_encode ( | |
| input wire clk, | |
| input wire rst_n, | |
| input wire [1:0] c, | |
| input wire [7:0] d, | |
| input wire den, | |
| output reg [9:0] q | |
| ); |
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| module riscboy_fpga #( | |
| parameter PRELOAD_FILE = "bootram_init32.hex" | |
| ) ( | |
| input wire clk_osc, | |
| output wire [7:0] led | |
| ); | |
| `include "gpio_pinmap.vh" | |
| // Clock + Reset resources |
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| module tb(); | |
| localparam W = 29; | |
| localparam TEST_LEN = 10000; | |
| reg [W-1:0] a; | |
| reg [W-1:0] b; | |
| wire [W*2-1:0] out; | |
| wallace_mult #(.W(W)) inst_radix2_mult (.sext_a(1'b0), .sext_b(1'b0), .a(a), .b(b), .out(out)); |
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| module tb(); | |
| localparam W = 29; | |
| localparam TEST_LEN = 10000; | |
| reg [W-1:0] a; | |
| reg [W-1:0] b; | |
| wire [W*2-1:0] out; | |
| wallace_mult #(.W(W)) inst_radix2_mult (.sext_a(1'b0), .sext_b(1'b0), .a(a), .b(b), .out(out)); |
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| module wallace_mult #( | |
| parameter W = 32 | |
| ) ( | |
| input wire sext_a, | |
| input wire sext_b, | |
| input wire [W-1:0] a, | |
| input wire [W-1:0] b, | |
| output wire [W*2-1:0] out | |
| ); |
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| module wallace_adder #( | |
| parameter W = 32, // valid for W >= 1 | |
| parameter N = 3 // valid for N >= 3 | |
| ) ( | |
| input wire [W*N-1:0] in, | |
| output wire [W-1:0] out | |
| ); | |
| generate | |
| if (N == 3) begin: base |
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