Created
April 10, 2019 16:56
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module miter ( | |
input i_clk, | |
input i_reset, | |
input i_tap_wr, | |
input [11:0] i_tap, | |
input i_ce, | |
input [11:0] i_sample | |
); | |
wire [30:0] ref_result; | |
wire [30:0] uut_result; | |
fastfir ref ( | |
.mutsel (8'd 0), | |
.i_clk (i_clk ), | |
.i_reset (i_reset ), | |
.i_tap_wr (i_tap_wr ), | |
.i_tap (i_tap ), | |
.i_ce (i_ce ), | |
.i_sample (i_sample ), | |
.o_result (ref_result) | |
); | |
fastfir uut ( | |
.mutsel (8'd `mutidx), | |
.i_clk (i_clk ), | |
.i_reset (i_reset ), | |
.i_tap_wr (i_tap_wr ), | |
.i_tap (i_tap ), | |
.i_ce (i_ce ), | |
.i_sample (i_sample ), | |
.o_result (uut_result) | |
); | |
initial assume(!i_reset); | |
always @(*) | |
if (!i_reset) | |
assert (ref_result == uut_result); | |
endmodule |
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