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@agrif
Last active September 19, 2025 14:07
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#![no_std]
#![no_main]
use rtt_target::rprintln;
extern crate panic_halt;
#[riscv_rt::entry]
fn main() -> ! {
rtt_target::rtt_init_print!();
rprintln!("Hello, rust!");
let mut counter = 0;
loop {
riscv::asm::delay(27_000_000);
rprintln!("Counter: {}", counter);
counter += 1;
}
}
$ python -m alegria.tools.bridge /dev/ttyUSB1 program --attach target/riscv32i-unknown-none-elf/release/rustgram
0x00000000 - 0x00001430 ...
0x00001430 - 0x00001998 ...
0x000019a0 - 0x000019a0 ...
Hello, rust!
Counter: 0
Counter: 1
Counter: 2
Counter: 3
Counter: 4
Counter: 5
^C
Aborted!
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