Mercury baseboard (spartan 3a) counter example

gistfile1.txt

`timescale 1ns / 1ns

module send_number_to_shift_reg(CLK, AN, DOT, A_TO_G);
input CLK;
output reg [3:0] AN;
output reg [6:0] A_TO_G;
output reg DOT;

parameter [31:0] REFRESH = 1024 * 256;
parameter [63:0] TIMEOUT = 4096 * 1024;

reg [6:0] numbers [0:9];

initial begin
	numbers[0] = 7'b0000001;
	numbers[1] = 7'b1001111;
	numbers[2] = 7'b0010010;
	numbers[3] = 7'b0000110;
	numbers[4] = 7'b1001100;
	numbers[5] = 7'b0100100;
	numbers[6] = 7'b0100000;
	numbers[7] = 7'b0001111;
	numbers[8] = 7'b0000000;
	numbers[9] = 7'b0000100;
end

reg [3:0] num = 4'b1110;
reg [7:0] n1 = 0;
reg [7:0] n2 = 0;
reg [7:0] n3 = 0;
reg [7:0] n4 = 0;

reg [31:0] timer = 0;
always @(posedge CLK) timer <= (timer == TIMEOUT) ? 0 : timer + 1;

wire counter_timer; assign counter_timer = (timer % TIMEOUT == 0);
always @(posedge counter_timer) begin
	n1 <= n1 + 1;
	if (n1 == 9) begin
		n1 <= 0;
		n2 <= n2 + 1;
		if (n2 == 9) begin
			n2 <= 0;
			n3 <= n3 + 1;
			if (n3 == 9) begin
				n3 <= 0;
				n4 <= n4 + 1;
				if (n4 == 9) begin
					n4 <= 0;
				end
			end
		end
	end
end

wire refresh_timer; assign refresh_timer = (timer % REFRESH == 0);
always @(posedge refresh_timer) begin
	AN <= num;
	DOT <= 1;
	case(num)
		4'b1110: A_TO_G <= numbers[n1];
		4'b1101: A_TO_G <= numbers[n2];
		4'b1011: A_TO_G <= numbers[n3];
		4'b0111: A_TO_G <= numbers[n4];
	endcase
	num <= {num[2:0], num[3]};
end

endmodule