A test for using IPI as clock interrupts on slave processors.... No visible change.

luna88k-slave-clock-ipi-141030.diff

Index: include/board.h
===================================================================
RCS file: /cvs/src/sys/arch/luna88k/include/board.h,v
retrieving revision 1.12
diff -u -r1.12 board.h
--- include/board.h	6 Jan 2014 21:28:53 -0000	1.12
+++ include/board.h	30 Oct 2014 13:48:48 -0000
@@ -113,7 +113,11 @@
 #define  INT_SET_LV2	U(0xF4000000) 	/* enable level 7-3 */
 #define  INT_SET_LV1	U(0xFC000000) 	/* enable level 7-2 */
 #define  INT_SET_LV0	U(0xFC000000) 	/* enable interrupts */
+#if 0
 #define  INT_SLAVE_MASK	U(0x84000000) 	/* slave can only enable 6 and 1 */
+#else
+#define  INT_SLAVE_MASK	U(0x04000000) 	/* slave can only enable 1 */
+#endif
 #define	 INT_CLOCK_MASK	0xBFFFFFFF 	/* mask clock */
 
 #define NON_MASKABLE_LEVEL 7		/* non-maskable-interrupt (abort) */
Index: luna88k/clock.c
===================================================================
RCS file: /cvs/src/sys/arch/luna88k/luna88k/clock.c,v
retrieving revision 1.10
diff -u -r1.10 clock.c
--- luna88k/clock.c	27 Sep 2014 19:50:10 -0000	1.10
+++ luna88k/clock.c	30 Oct 2014 13:48:48 -0000
@@ -238,7 +238,12 @@
 #else
 	u_int cpu = cpu_number();
 #endif
-
+#if 0
+	if ((*clock_reg[cpu] & 0x80000000) == 0) {
+		printf("cpu%d: another level 6 intr.\n", cpu);
+		return 0;	/* another interrput */
+	}
+#endif
 #ifdef MULTIPROCESSOR
 	if (CPU_IS_PRIMARY(ci))
 #endif
Index: luna88k/machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/luna88k/luna88k/machdep.c,v
retrieving revision 1.113
diff -u -r1.113 machdep.c
--- luna88k/machdep.c	5 Oct 2014 02:12:19 -0000	1.113
+++ luna88k/machdep.c	30 Oct 2014 13:48:48 -0000
@@ -153,6 +153,7 @@
 };
 
 u_int luna88k_curspl[] = { IPL_HIGH, IPL_HIGH, IPL_HIGH, IPL_HIGH };
+int pending_clockintr[] = { 0, 0, 0, 0 };
 
 u_int32_t int_set_val[INT_LEVEL] = {
 	INT_SET_LV0,
@@ -814,6 +815,19 @@
 
 	uvmexp.intrs++;
 
+	/*
+	 * Check timer first
+	 */
+	if (cur_int_level == 6) {
+		pending_clockintr[cpu]++;
+		clockintr((void *)eframe);
+#ifdef MULTIPROCESSOR
+		m88k_broadcast_ipi(CI_IPI_HARDCLOCK);
+#endif
+		pending_clockintr[cpu]--;
+		goto out;
+	}
+
 #ifdef MULTIPROCESSOR
 	/*
 	 * Handle unmaskable IPIs immediately, so that we can reenable
@@ -823,24 +837,16 @@
 	 * 
 	 * On luna88k, IPL_SOFTINT (level 1 interrupt) is used as IPI.
 	 */
-	while (cur_int_level == IPL_SOFTINT) {
+	if (cur_int_level == IPL_SOFTINT) {
 		luna88k_ipi_handler(eframe);
-
-		cur_isr = *int_mask_reg[cpu];
-		cur_int_level = cur_isr >> 29;
-	}
-	if (cur_int_level == 0)
 		goto out;
+	}
 #endif
 
-#ifdef MULTIPROCESSOR
-	if (old_spl < IPL_SCHED)
-		__mp_lock(&kernel_lock);
-#endif
 	/*
 	 * Service the highest interrupt, in order.
 	 */
-	do {
+	while (cur_int_level != 0) {
 		level = (cur_int_level > old_spl ? cur_int_level : old_spl);
 		setipl(level);
 
@@ -852,18 +858,35 @@
 		switch (cur_int_level) {
 		case 6:
 			clockintr((void *)eframe);
+#ifdef MULTIPROCESSOR
+			m88k_broadcast_ipi(CI_IPI_HARDCLOCK);
+#endif
+			pending_clockintr[cpu]--;
+			if (pending_clockintr[cpu] != 0) {
+				printf("cpu%d: (master?)pending_clockintr=%d\n",
+					cpu, pending_clockintr[cpu]);
+				pending_clockintr[cpu] = 0;
+			}
+
 			break;
 		case 5:
 		case 4:
 		case 3:
 #ifdef MULTIPROCESSOR
-			if (CPU_IS_PRIMARY(ci)) {
+			if (old_spl < IPL_SCHED)
+				__mp_lock(&kernel_lock);
 #endif
-				isrdispatch_autovec(cur_int_level);
+			isrdispatch_autovec(cur_int_level);
 #ifdef MULTIPROCESSOR
-			}
+			if (old_spl < IPL_SCHED)
+				__mp_unlock(&kernel_lock);
 #endif
 			break;
+#ifdef MULTIPROCESSOR
+		case 1:
+			luna88k_ipi_handler(eframe);
+			break;
+#endif
 		default:
 			printf("%s: cpu%d level %d interrupt.\n",
 				__func__, cpu, cur_int_level);
@@ -872,12 +895,14 @@
 
 		cur_isr = *int_mask_reg[cpu];
 		cur_int_level = cur_isr >> 29;
-	} while (cur_int_level != 0);
-
-#ifdef MULTIPROCESSOR
-	if (old_spl < IPL_SCHED)
-		__mp_unlock(&kernel_lock);
-#endif
+		/*
+		 * Check timer again
+		 */
+		if (cur_int_level == 6)
+			pending_clockintr[cpu]++;
+		if (cur_int_level != 0)
+			printf("cpu%d: more intr = %d\n", cpu, cur_int_level);
+	}
 
 out:
 	/*
@@ -1310,12 +1335,14 @@
 {
 	struct cpu_info *ci = curcpu();
 	int cpu = ci->ci_cpuid;
-	int ipi = ci->ci_ipi & (CI_IPI_DDB | CI_IPI_NOTIFY);
+	int ipi = ci->ci_ipi & (CI_IPI_HARDCLOCK | CI_IPI_DDB | CI_IPI_NOTIFY);
 
 	/* just read; reset software interrupt */
 	*swi_reg[cpu];
 	atomic_clearbits_int(&ci->ci_ipi, ipi);
 
+	if (ipi & CI_IPI_HARDCLOCK)
+		hardclock((struct clockframe *)eframe);
 	if (ipi & CI_IPI_DDB) {
 #ifdef DDB
 		/*