Another try, but it panic's while building kernel with 'make -j 4' ...

luna88k-clock-intr-141109-1.diff

Index: include/board.h
===================================================================
RCS file: /cvs/src/sys/arch/luna88k/include/board.h,v
retrieving revision 1.12
diff -u -r1.12 board.h
--- include/board.h	6 Jan 2014 21:28:53 -0000	1.12
+++ include/board.h	9 Nov 2014 00:37:35 -0000
@@ -105,15 +105,24 @@
 #define INT_ST_MASK2	U(0x65000008) 	/* interrupt status register CPU 2 */
 #define INT_ST_MASK3	U(0x6500000C) 	/* interrupt status register CPU 3 */
 #define  INT_LEVEL	           8	/* # of interrupt level + 1 */
+#if 0
 #define  INT_SET_LV7	U(0x00000000) 	/* disable interrupts */
 #define  INT_SET_LV6	U(0x00000000) 	/* enable level 7 */
+#else
+#define  INT_SET_LV7	U(0x00000000) 	/* disable interrupts */
+#define  INT_SET_LV6	U(0x84000000) 	/* enable level 7 */
+#endif
 #define  INT_SET_LV5	U(0x84000000) 	/* enable level 7-6 */
 #define  INT_SET_LV4	U(0xC4000000) 	/* enable level 7-5 */
 #define  INT_SET_LV3	U(0xE4000000) 	/* enable level 7-4 */
 #define  INT_SET_LV2	U(0xF4000000) 	/* enable level 7-3 */
 #define  INT_SET_LV1	U(0xFC000000) 	/* enable level 7-2 */
 #define  INT_SET_LV0	U(0xFC000000) 	/* enable interrupts */
+#if 0
 #define  INT_SLAVE_MASK	U(0x84000000) 	/* slave can only enable 6 and 1 */
+#else
+#define  INT_SLAVE_MASK	U(0x04000000) 	/* slave can only enable 1 */
+#endif
 #define	 INT_CLOCK_MASK	0xBFFFFFFF 	/* mask clock */
 
 #define NON_MASKABLE_LEVEL 7		/* non-maskable-interrupt (abort) */
Index: luna88k/clock.c
===================================================================
RCS file: /cvs/src/sys/arch/luna88k/luna88k/clock.c,v
retrieving revision 1.10
diff -u -r1.10 clock.c
--- luna88k/clock.c	27 Sep 2014 19:50:10 -0000	1.10
+++ luna88k/clock.c	9 Nov 2014 00:37:36 -0000
@@ -54,6 +54,7 @@
 
 #include <machine/board.h>
 #include <machine/cpu.h>
+#include <machine/frame.h>	/* struct trapframe */
 
 #include <dev/clock_subr.h>
 #include <luna88k/luna88k/clockvar.h>
@@ -226,27 +227,50 @@
 	(u_int32_t *)OBIO_CLOCK3
 };
 
+static int pending_clock[] = {
+	0, 0, 0, 0
+};
+
 /*
  * Clock interrupt routine
  */
 int
-clockintr(void *eframe)
+clockintr(void *arg)
 {
+	struct trapframe *eframe = arg;
 #ifdef MULTIPROCESSOR
 	struct cpu_info *ci = curcpu();
 	u_int cpu = ci->ci_cpuid;
 #else
 	u_int cpu = cpu_number();
 #endif
-
+#if 0
+	if ((*clock_reg[cpu] & 0x80000000) == 0) {
+		printf("cpu%d: another level 6 intr.\n", cpu);
+		return 0;	/* another interrput */
+	}
+#endif
 #ifdef MULTIPROCESSOR
 	if (CPU_IS_PRIMARY(ci))
 #endif
 		clockevc->ec_count++;
 
 	*clock_reg[cpu] = 0xffffffff;
-	if (clockinitted)
-		hardclock(eframe);
+
+	if (!clockinitted)
+		return 1;
+
+	pending_clock[cpu]++;
+
+	if (eframe->tf_mask < IPL_CLOCK) {
+		if (pending_clock[cpu] > 1)
+			printf("cpu%d: pending_clock = %d\n",
+			    cpu, pending_clock[cpu]);
+		while(pending_clock[cpu] > 0) {
+			hardclock(arg);
+			pending_clock[cpu]--;
+		}
+	}
 	return 1;
 }
 
Index: luna88k/machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/luna88k/luna88k/machdep.c,v
retrieving revision 1.113
diff -u -r1.113 machdep.c
--- luna88k/machdep.c	5 Oct 2014 02:12:19 -0000	1.113
+++ luna88k/machdep.c	9 Nov 2014 00:37:36 -0000
@@ -814,6 +814,17 @@
 
 	uvmexp.intrs++;
 
+	/*
+	 * Check timer first
+	 */
+	if (cur_int_level == 6) {
+		clockintr((void *)eframe);
+#ifdef MULTIPROCESSOR
+		m88k_broadcast_ipi(CI_IPI_HARDCLOCK);
+#endif
+		goto out;
+	}
+
 #ifdef MULTIPROCESSOR
 	/*
 	 * Handle unmaskable IPIs immediately, so that we can reenable
@@ -823,24 +834,16 @@
 	 * 
 	 * On luna88k, IPL_SOFTINT (level 1 interrupt) is used as IPI.
 	 */
-	while (cur_int_level == IPL_SOFTINT) {
+	if (cur_int_level == IPL_SOFTINT) {
 		luna88k_ipi_handler(eframe);
-
-		cur_isr = *int_mask_reg[cpu];
-		cur_int_level = cur_isr >> 29;
-	}
-	if (cur_int_level == 0)
 		goto out;
+	}
 #endif
 
-#ifdef MULTIPROCESSOR
-	if (old_spl < IPL_SCHED)
-		__mp_lock(&kernel_lock);
-#endif
 	/*
 	 * Service the highest interrupt, in order.
 	 */
-	do {
+	while (cur_int_level != 0) {
 		level = (cur_int_level > old_spl ? cur_int_level : old_spl);
 		setipl(level);
 
@@ -852,18 +855,28 @@
 		switch (cur_int_level) {
 		case 6:
 			clockintr((void *)eframe);
+#ifdef MULTIPROCESSOR
+			m88k_broadcast_ipi(CI_IPI_HARDCLOCK);
+#endif
 			break;
 		case 5:
 		case 4:
 		case 3:
 #ifdef MULTIPROCESSOR
-			if (CPU_IS_PRIMARY(ci)) {
+			if (old_spl < IPL_SCHED)
+				__mp_lock(&kernel_lock);
 #endif
-				isrdispatch_autovec(cur_int_level);
+			isrdispatch_autovec(cur_int_level);
 #ifdef MULTIPROCESSOR
-			}
+			if (old_spl < IPL_SCHED)
+				__mp_unlock(&kernel_lock);
 #endif
 			break;
+#ifdef MULTIPROCESSOR
+		case 1:
+			luna88k_ipi_handler(eframe);
+			break;
+#endif
 		default:
 			printf("%s: cpu%d level %d interrupt.\n",
 				__func__, cpu, cur_int_level);
@@ -872,12 +885,12 @@
 
 		cur_isr = *int_mask_reg[cpu];
 		cur_int_level = cur_isr >> 29;
-	} while (cur_int_level != 0);
-
-#ifdef MULTIPROCESSOR
-	if (old_spl < IPL_SCHED)
-		__mp_unlock(&kernel_lock);
-#endif
+		/*
+		 * Check timer again
+		 */
+		if (cur_int_level != 0)
+			printf("cpu%d: more intr = %d\n", cpu, cur_int_level);
+	}
 
 out:
 	/*
@@ -1310,12 +1323,14 @@
 {
 	struct cpu_info *ci = curcpu();
 	int cpu = ci->ci_cpuid;
-	int ipi = ci->ci_ipi & (CI_IPI_DDB | CI_IPI_NOTIFY);
+	int ipi = ci->ci_ipi & (CI_IPI_HARDCLOCK | CI_IPI_DDB | CI_IPI_NOTIFY);
 
 	/* just read; reset software interrupt */
 	*swi_reg[cpu];
 	atomic_clearbits_int(&ci->ci_ipi, ipi);
 
+	if (ipi & CI_IPI_HARDCLOCK)
+		hardclock((struct clockframe *)eframe);
 	if (ipi & CI_IPI_DDB) {
 #ifdef DDB
 		/*