Legend:
- (K)ernel or (U)ser
- (S)hared or (P)rivate
- (F)irmware or (G)PU or (X)Both
- (KSF): Buffer info struct (maybe should be KPF?)
- (KSF): Block control pointers
- (KSF): Use counter
Asahi Lina asahilina
asahilina
/ autoconnect.lua
Created
November 7, 2024 22:13
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| -- As explained on: https://bennett.dev/auto-link-pipewire-ports-wireplumber/ | |
| -- Link two ports together | |
| function link_port(output_port, input_port) | |
| if not input_port or not output_port then | |
| return nil | |
| end | |
| local link_args = { | |
| ["link.input.node"] = input_port.properties["node.id"], |
asahilina
/ 2plane_textures.txt
Created
July 26, 2023 07:50
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| ## RGB10A8 2-plane | |
| Texture | |
| Dimension: 2D | |
| Layout: Compressed | |
| Channels: unknown 4C (XXX) | |
| Type: XR | |
| Swizzle R: B | |
| Swizzle G: G | |
| Swizzle B: R |
asahilina
/ chromium_netlink_page_size_fix.patch
Created
March 6, 2023 14:54
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| --- ./net/base/address_tracker_linux.cc.old 2023-03-06 23:53:08.102111285 +0900 | |
| +++ ./net/base/address_tracker_linux.cc 2023-03-06 23:53:13.112109094 +0900 | |
| @@ -334,7 +334,7 @@ | |
| *address_changed = false; | |
| *link_changed = false; | |
| *tunnel_changed = false; | |
| - char buffer[4096]; | |
| + char buffer[65536]; | |
| bool first_loop = true; | |
| { |
asahilina
/ linux-gpu.config
Created
November 18, 2022 09:06
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| # | |
| # Automatically generated file; DO NOT EDIT. | |
| # Linux/arm64 6.1.0-rc5 Kernel Configuration | |
| # | |
| CONFIG_CC_VERSION_TEXT="clang version 14.0.4" | |
| CONFIG_GCC_VERSION=0 | |
| CONFIG_CC_IS_CLANG=y | |
| CONFIG_CLANG_VERSION=140004 | |
| CONFIG_AS_IS_LLVM=y | |
| CONFIG_AS_VERSION=140004 |
asahilina
/ gles3-failures-2022116.csv
Created
November 16, 2022 14:50
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| dEQP-GLES3.functional.draw.random.101 | Fail | |
|---|---|---|
| dEQP-GLES3.functional.draw.random.118 | Crash | |
| dEQP-GLES3.functional.draw.random.124 | Crash | |
| dEQP-GLES3.functional.draw.random.136 | Crash | |
| dEQP-GLES3.functional.draw.random.138 | Crash | |
| dEQP-GLES3.functional.draw.random.14 | Fail | |
| dEQP-GLES3.functional.draw.random.141 | Fail | |
| dEQP-GLES3.functional.draw.random.151 | Fail | |
| dEQP-GLES3.functional.draw.random.162 | Fail | |
| dEQP-GLES3.functional.draw.random.180 | Fail |
asahilina
/ agx_core_mV_mW.txt
Created
November 1, 2022 10:25
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| 100 16734.0 | |
| 110 16782.0 | |
| 120 16833.0 | |
| 130 16883.0 | |
| 140 16936.0 | |
| 150 16991.0 | |
| 160 17046.0 | |
| 170 17103.0 | |
| 180 17162.0 | |
| 190 17222.0 |
asahilina
/ agx_sram_mW_mV.txt
Last active
October 31, 2022 08:32
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| 100 414.0 | |
| 200 414.0 | |
| 300 415.0 | |
| 310 415.0 | |
| 320 415.0 | |
| 330 416.0 | |
| 340 416.0 | |
| 350 417.0 | |
| 360 417.0 | |
| 370 419.0 |
asahilina
/ agx-coherency-and-tlbs.md
Last active
December 17, 2023 01:01
These are just some notes on my current understanding of the subtleties of the AGX memory model and the TLB/caching issues I'm seeing.
TLBI instructions do not broadcast to the GPU from EL1 with stage 2 translation enabled. That's it. That's what the bug was.