-
-
Save astocko/12bd69ceb2ac5251dd7759abe608412a to your computer and use it in GitHub Desktop.
This file has been truncated, but you can view the full file.
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| /// Generated struct and trait implementations for: | |
| /// ADC | |
| /// Add with Carry | |
| pub struct ADC {} | |
| impl Ins2x<HardCodedOp, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0x14); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for ADC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADCX | |
| /// Unsigned Integer Addition of Two Operands with Carry Flag | |
| pub struct ADCX {} | |
| impl Ins2x<GPRegister32, GPRegister32> for ADCX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for ADCX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for ADCX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x66); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for ADCX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADD | |
| /// Add | |
| pub struct ADD {} | |
| impl Ins2x<HardCodedOp, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0x4); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0x5); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x5); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0x5); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x0); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for ADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADDPD | |
| /// Add Packed Double-Precision Floating-Point Values | |
| pub struct ADDPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ADDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ADDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADDPS | |
| /// Add Packed Single-Precision Floating-Point Values | |
| pub struct ADDPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ADDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ADDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADDSD | |
| /// Add Scalar Double-Precision Floating-Point Values | |
| pub struct ADDSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ADDSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for ADDSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADDSS | |
| /// Add Scalar Single-Precision Floating-Point Values | |
| pub struct ADDSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ADDSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for ADDSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADDSUBPD | |
| /// Packed Double-FP Add/Subtract | |
| pub struct ADDSUBPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ADDSUBPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ADDSUBPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADDSUBPS | |
| /// Packed Single-FP Add/Subtract | |
| pub struct ADDSUBPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ADDSUBPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ADDSUBPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ADOX | |
| /// Unsigned Integer Addition of Two Operands with Overflow Flag | |
| pub struct ADOX {} | |
| impl Ins2x<GPRegister32, GPRegister32> for ADOX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for ADOX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for ADOX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for ADOX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AESDEC | |
| /// Perform One Round of an AES Decryption Flow | |
| pub struct AESDEC {} | |
| impl Ins2x<XMMRegister, XMMRegister> for AESDEC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for AESDEC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AESDECLAST | |
| /// Perform Last Round of an AES Decryption Flow | |
| pub struct AESDECLAST {} | |
| impl Ins2x<XMMRegister, XMMRegister> for AESDECLAST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for AESDECLAST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AESENC | |
| /// Perform One Round of an AES Encryption Flow | |
| pub struct AESENC {} | |
| impl Ins2x<XMMRegister, XMMRegister> for AESENC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for AESENC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AESENCLAST | |
| /// Perform Last Round of an AES Encryption Flow | |
| pub struct AESENCLAST {} | |
| impl Ins2x<XMMRegister, XMMRegister> for AESENCLAST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDD); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for AESENCLAST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AESIMC | |
| /// Perform the AES InvMixColumn Transformation | |
| pub struct AESIMC {} | |
| impl Ins2x<XMMRegister, XMMRegister> for AESIMC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for AESIMC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AESKEYGENASSIST | |
| /// AES Round Key Generation Assist | |
| pub struct AESKEYGENASSIST {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for AESKEYGENASSIST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for AESKEYGENASSIST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// AND | |
| /// Logical AND | |
| pub struct AND {} | |
| impl Ins2x<HardCodedOp, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0x24); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x20); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x22); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0x25); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x23); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x25); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x23); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0x25); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x23); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x20); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for AND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x21); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ANDN | |
| /// Logical AND NOT | |
| pub struct ANDN {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for ANDN { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF2); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Memory32> for ANDN { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Memory32) { | |
| bytes.push(0xF2); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for ANDN { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF2); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Memory64> for ANDN { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Memory64) { | |
| bytes.push(0xF2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ANDNPD | |
| /// Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values | |
| pub struct ANDNPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ANDNPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ANDNPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x55); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ANDNPS | |
| /// Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values | |
| pub struct ANDNPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ANDNPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ANDNPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x55); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ANDPD | |
| /// Bitwise Logical AND of Packed Double-Precision Floating-Point Values | |
| pub struct ANDPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x54); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ANDPS | |
| /// Bitwise Logical AND of Packed Single-Precision Floating-Point Values | |
| pub struct ANDPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x54); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BEXTR | |
| /// Bit Field Extract | |
| pub struct BEXTR {} | |
| impl Ins3x<GPRegister32, GPRegister32, Imm32> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Imm32) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, Imm32> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: Imm32) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, GPRegister32> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Imm32> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Imm32) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, Imm32> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: Imm32) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, GPRegister64> for BEXTR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLCFILL | |
| /// Fill From Lowest Clear Bit | |
| pub struct BLCFILL {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLCFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLCFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLCFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLCFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLCI | |
| /// Isolate Lowest Clear Bit | |
| pub struct BLCI {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLCI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLCI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLCI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLCI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLCIC | |
| /// Isolate Lowest Set Bit and Complement | |
| pub struct BLCIC {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLCIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLCIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLCIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLCIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLCMSK | |
| /// Mask From Lowest Clear Bit | |
| pub struct BLCMSK {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLCMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLCMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLCMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLCMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLCS | |
| /// Set Lowest Clear Bit | |
| pub struct BLCS {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLCS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLCS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLCS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLCS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLENDPD | |
| /// Blend Packed Double Precision Floating-Point Values | |
| pub struct BLENDPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for BLENDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for BLENDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLENDPS | |
| /// Blend Packed Single Precision Floating-Point Values | |
| pub struct BLENDPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for BLENDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for BLENDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLENDVPD | |
| /// Variable Blend Packed Double Precision Floating-Point Values | |
| pub struct BLENDVPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, HardCodedOp> for BLENDVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, HardCodedOp> for BLENDVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x15); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLENDVPS | |
| /// Variable Blend Packed Single Precision Floating-Point Values | |
| pub struct BLENDVPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, HardCodedOp> for BLENDVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x14); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, HardCodedOp> for BLENDVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x14); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLSFILL | |
| /// Fill From Lowest Set Bit | |
| pub struct BLSFILL {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLSFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLSFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLSFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLSFILL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLSI | |
| /// Isolate Lowest Set Bit | |
| pub struct BLSI {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLSI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLSI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLSI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLSI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLSIC | |
| /// Isolate Lowest Set Bit and Complement | |
| pub struct BLSIC {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLSIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLSIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLSIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLSIC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLSMSK | |
| /// Mask From Lowest Set Bit | |
| pub struct BLSMSK {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLSMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLSMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLSMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLSMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BLSR | |
| /// Reset Lowest Set Bit | |
| pub struct BLSR {} | |
| impl Ins2x<GPRegister32, GPRegister32> for BLSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BLSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BLSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BLSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BSF | |
| /// Bit Scan Forward | |
| pub struct BSF {} | |
| impl Ins2x<GPRegister16, GPRegister16> for BSF { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for BSF { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for BSF { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BSF { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BSF { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BSF { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BSR | |
| /// Bit Scan Reverse | |
| pub struct BSR {} | |
| impl Ins2x<GPRegister16, GPRegister16> for BSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for BSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for BSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for BSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for BSR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BSWAP | |
| /// Byte Swap | |
| pub struct BSWAP {} | |
| impl Ins1x<GPRegister32> for BSWAP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC8); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for BSWAP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BT | |
| /// Bit Test | |
| pub struct BT {} | |
| impl Ins2x<GPRegister16, Imm8> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xA3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xA3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xA3); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA3); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA3); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for BT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BTC | |
| /// Bit Test and Complement | |
| pub struct BTC {} | |
| impl Ins2x<GPRegister16, Imm8> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for BTC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BTR | |
| /// Bit Test and Reset | |
| pub struct BTR {} | |
| impl Ins2x<GPRegister16, Imm8> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xB3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xB3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xB3); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB3); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB3); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for BTR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BTS | |
| /// Bit Test and Set | |
| pub struct BTS {} | |
| impl Ins2x<GPRegister16, Imm8> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for BTS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// BZHI | |
| /// Zero High Bits Starting with Specified Bit Position | |
| pub struct BZHI {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for BZHI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, GPRegister32> for BZHI { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: GPRegister32) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for BZHI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, GPRegister64> for BZHI { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: GPRegister64) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CALL | |
| /// Call Procedure | |
| pub struct CALL {} | |
| impl Ins1x<RIPRelativeOffset32> for CALL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0xE8); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for CALL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory64> for CALL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CBW | |
| /// Convert Byte to Word | |
| pub struct CBW {} | |
| impl Ins0x for CBW { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x66); | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CDQ | |
| /// Convert Doubleword to Quadword | |
| pub struct CDQ {} | |
| impl Ins0x for CDQ { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CDQE | |
| /// Convert Doubleword to Quadword | |
| pub struct CDQE {} | |
| impl Ins0x for CDQE { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x48); | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CLC | |
| /// Clear Carry Flag | |
| pub struct CLC {} | |
| impl Ins0x for CLC { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CLD | |
| /// Clear Direction Flag | |
| pub struct CLD {} | |
| impl Ins0x for CLD { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xFC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMC | |
| /// Complement Carry Flag | |
| pub struct CMC {} | |
| impl Ins0x for CMC { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVA | |
| /// Move if above (CF == 0 and ZF == 0) | |
| pub struct CMOVA {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVAE | |
| /// Move if above or equal (CF == 0) | |
| pub struct CMOVAE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVB | |
| /// Move if below (CF == 1) | |
| pub struct CMOVB {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVBE | |
| /// Move if below or equal (CF == 1 or ZF == 1) | |
| pub struct CMOVBE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVC | |
| /// Move if carry (CF == 1) | |
| pub struct CMOVC {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVE | |
| /// Move if equal (ZF == 1) | |
| pub struct CMOVE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVG | |
| /// Move if greater (ZF == 0 and SF == OF) | |
| pub struct CMOVG {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVGE | |
| /// Move if greater or equal (SF == OF) | |
| pub struct CMOVGE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVL | |
| /// Move if less (SF != OF) | |
| pub struct CMOVL {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVLE | |
| /// Move if less or equal (ZF == 1 or SF != OF) | |
| pub struct CMOVLE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNA | |
| /// Move if not above (CF == 1 or ZF == 1) | |
| pub struct CMOVNA {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x46); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNAE | |
| /// Move if not above or equal (CF == 1) | |
| pub struct CMOVNAE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNAE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNB | |
| /// Move if not below (CF == 0) | |
| pub struct CMOVNB {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNBE | |
| /// Move if not below or equal (CF == 0 and ZF == 0) | |
| pub struct CMOVNBE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x47); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNC | |
| /// Move if not carry (CF == 0) | |
| pub struct CMOVNC {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x43); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNE | |
| /// Move if not equal (ZF == 0) | |
| pub struct CMOVNE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNG | |
| /// Move if not greater (ZF == 1 or SF != OF) | |
| pub struct CMOVNG {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNGE | |
| /// Move if not greater or equal (SF != OF) | |
| pub struct CMOVNGE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNL | |
| /// Move if not less (SF == OF) | |
| pub struct CMOVNL {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNLE | |
| /// Move if not less or equal (ZF == 0 and SF == OF) | |
| pub struct CMOVNLE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNLE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNO | |
| /// Move if not overflow (OF == 0) | |
| pub struct CMOVNO {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNP | |
| /// Move if not parity (PF == 0) | |
| pub struct CMOVNP {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNS | |
| /// Move if not sign (SF == 0) | |
| pub struct CMOVNS {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x49); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x49); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x49); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x49); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x49); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x49); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVNZ | |
| /// Move if not zero (ZF == 0) | |
| pub struct CMOVNZ {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVNZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVNZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVNZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVNZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVNZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVNZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x45); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVO | |
| /// Move if overflow (OF == 1) | |
| pub struct CMOVO {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x40); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVP | |
| /// Move if parity (PF == 1) | |
| pub struct CMOVP {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVPE | |
| /// Move if parity even (PF == 1) | |
| pub struct CMOVPE {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVPE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVPE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVPE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVPE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVPE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVPE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVPO | |
| /// Move if parity odd (PF == 0) | |
| pub struct CMOVPO {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVPO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVPO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVPO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVPO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVPO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVPO { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVS | |
| /// Move if sign (SF == 1) | |
| pub struct CMOVS {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x48); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x48); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x48); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x48); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x48); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x48); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMOVZ | |
| /// Move if zero (ZF == 1) | |
| pub struct CMOVZ {} | |
| impl Ins2x<GPRegister16, GPRegister16> for CMOVZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMOVZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMOVZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMOVZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMOVZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMOVZ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMP | |
| /// Compare Two Operands | |
| pub struct CMP {} | |
| impl Ins2x<HardCodedOp, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0x3C); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3A); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0x3D); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3B); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x3D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3B); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0x3D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3B); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for CMP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x39); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPPD | |
| /// Compare Packed Double-Precision Floating-Point Values | |
| pub struct CMPPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for CMPPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for CMPPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPPS | |
| /// Compare Packed Single-Precision Floating-Point Values | |
| pub struct CMPPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for CMPPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for CMPPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPSD | |
| /// Compare Scalar Double-Precision Floating-Point Values | |
| pub struct CMPSD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for CMPSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory64, Imm8> for CMPSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPSS | |
| /// Compare Scalar Single-Precision Floating-Point Values | |
| pub struct CMPSS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for CMPSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory32, Imm8> for CMPSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPXCHG | |
| /// Compare and Exchange | |
| pub struct CMPXCHG {} | |
| impl Ins2x<GPRegister8, GPRegister8> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xB0); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xB1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xB1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xB1); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB0); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB1); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB1); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for CMPXCHG { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xB1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPXCHG16B | |
| /// Compare and Exchange 16 Bytes | |
| pub struct CMPXCHG16B {} | |
| impl Ins1x<Memory128> for CMPXCHG16B { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory128) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CMPXCHG8B | |
| /// Compare and Exchange 8 Bytes | |
| pub struct CMPXCHG8B {} | |
| impl Ins1x<Memory64> for CMPXCHG8B { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// COMISD | |
| /// Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS | |
| pub struct COMISD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for COMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for COMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// COMISS | |
| /// Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS | |
| pub struct COMISS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for COMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for COMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CPUID | |
| /// CPU Identification | |
| pub struct CPUID {} | |
| impl Ins0x for CPUID { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xA2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CQO | |
| /// Convert Quadword to Octaword | |
| pub struct CQO {} | |
| impl Ins0x for CQO { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x48); | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CRC32 | |
| /// Accumulate CRC32 Value | |
| pub struct CRC32 {} | |
| impl Ins2x<GPRegister32, GPRegister8> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister16> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister16) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory8> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory16> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory16) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister8> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister8) { | |
| bytes.push(0xF2); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF2); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory8> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory8) { | |
| bytes.push(0xF2); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CRC32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTDQ2PD | |
| /// Convert Packed Dword Integers to Packed Double-Precision FP Values | |
| pub struct CVTDQ2PD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTDQ2PS | |
| /// Convert Packed Dword Integers to Packed Single-Precision FP Values | |
| pub struct CVTDQ2PS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for CVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPD2DQ | |
| /// Convert Packed Double-Precision FP Values to Packed Dword Integers | |
| pub struct CVTPD2DQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for CVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPD2PI | |
| /// Convert Packed Double-Precision FP Values to Packed Dword Integers | |
| pub struct CVTPD2PI {} | |
| impl Ins2x<MMXRegister, XMMRegister> for CVTPD2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory128> for CVTPD2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPD2PS | |
| /// Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values | |
| pub struct CVTPD2PS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for CVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPI2PD | |
| /// Convert Packed Dword Integers to Packed Double-Precision FP Values | |
| pub struct CVTPI2PD {} | |
| impl Ins2x<XMMRegister, MMXRegister> for CVTPI2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: MMXRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTPI2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPI2PS | |
| /// Convert Packed Dword Integers to Packed Single-Precision FP Values | |
| pub struct CVTPI2PS {} | |
| impl Ins2x<XMMRegister, MMXRegister> for CVTPI2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTPI2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPS2DQ | |
| /// Convert Packed Single-Precision FP Values to Packed Dword Integers | |
| pub struct CVTPS2DQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for CVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPS2PD | |
| /// Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values | |
| pub struct CVTPS2PD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTPS2PI | |
| /// Convert Packed Single-Precision FP Values to Packed Dword Integers | |
| pub struct CVTPS2PI {} | |
| impl Ins2x<MMXRegister, XMMRegister> for CVTPS2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for CVTPS2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTSD2SI | |
| /// Convert Scalar Double-Precision FP Value to Integer | |
| pub struct CVTSD2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for CVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory64> for CVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for CVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTSD2SS | |
| /// Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value | |
| pub struct CVTSD2SS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTSD2SS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTSD2SS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTSI2SD | |
| /// Convert Dword Integer to Scalar Double-Precision FP Value | |
| pub struct CVTSI2SD {} | |
| impl Ins2x<XMMRegister, GPRegister32> for CVTSI2SD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister64> for CVTSI2SD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister64) { | |
| bytes.push(0xF2); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for CVTSI2SD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTSI2SD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTSI2SS | |
| /// Convert Dword Integer to Scalar Single-Precision FP Value | |
| pub struct CVTSI2SS {} | |
| impl Ins2x<XMMRegister, GPRegister32> for CVTSI2SS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister64> for CVTSI2SS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for CVTSI2SS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for CVTSI2SS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTSS2SD | |
| /// Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value | |
| pub struct CVTSS2SD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTSS2SD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for CVTSS2SD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTSS2SI | |
| /// Convert Scalar Single-Precision FP Value to Dword Integer | |
| pub struct CVTSS2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for CVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for CVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for CVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTTPD2DQ | |
| /// Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers | |
| pub struct CVTTPD2DQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for CVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTTPD2PI | |
| /// Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers | |
| pub struct CVTTPD2PI {} | |
| impl Ins2x<MMXRegister, XMMRegister> for CVTTPD2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory128> for CVTTPD2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTTPS2DQ | |
| /// Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers | |
| pub struct CVTTPS2DQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for CVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for CVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTTPS2PI | |
| /// Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers | |
| pub struct CVTTPS2PI {} | |
| impl Ins2x<MMXRegister, XMMRegister> for CVTTPS2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for CVTTPS2PI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTTSD2SI | |
| /// Convert with Truncation Scalar Double-Precision FP Value to Signed Integer | |
| pub struct CVTTSD2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for CVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory64> for CVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for CVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for CVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CVTTSS2SI | |
| /// Convert with Truncation Scalar Single-Precision FP Value to Dword Integer | |
| pub struct CVTTSS2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for CVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for CVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for CVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for CVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CWD | |
| /// Convert Word to Doubleword | |
| pub struct CWD {} | |
| impl Ins0x for CWD { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x66); | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// CWDE | |
| /// Convert Word to Doubleword | |
| pub struct CWDE {} | |
| impl Ins0x for CWDE { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DEC | |
| /// Decrement by 1 | |
| pub struct DEC {} | |
| impl Ins1x<GPRegister8> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory8> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins1x<Memory16> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory32> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory64> for DEC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DIV | |
| /// Unsigned Divide | |
| pub struct DIV {} | |
| impl Ins1x<GPRegister8> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory8> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<Memory16> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory32> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory64> for DIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DIVPD | |
| /// Divide Packed Double-Precision Floating-Point Values | |
| pub struct DIVPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for DIVPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for DIVPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DIVPS | |
| /// Divide Packed Single-Precision Floating-Point Values | |
| pub struct DIVPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for DIVPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for DIVPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DIVSD | |
| /// Divide Scalar Double-Precision Floating-Point Values | |
| pub struct DIVSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for DIVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for DIVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DIVSS | |
| /// Divide Scalar Single-Precision Floating-Point Values | |
| pub struct DIVSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for DIVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for DIVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DPPD | |
| /// Dot Product of Packed Double Precision Floating-Point Values | |
| pub struct DPPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for DPPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for DPPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// DPPS | |
| /// Dot Product of Packed Single Precision Floating-Point Values | |
| pub struct DPPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for DPPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for DPPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x40); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// EMMS | |
| /// Exit MMX State | |
| pub struct EMMS {} | |
| impl Ins0x for EMMS { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x77); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// EXTRACTPS | |
| /// Extract Packed Single Precision Floating-Point Value | |
| pub struct EXTRACTPS {} | |
| impl Ins3x<GPRegister32, XMMRegister, Imm8> for EXTRACTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins3x<Memory32, XMMRegister, Imm8> for EXTRACTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x17); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// EXTRQ | |
| /// Extract Field | |
| pub struct EXTRQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for EXTRQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Imm8, Imm8> for EXTRQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// FEMMS | |
| /// Fast Exit Multimedia State | |
| pub struct FEMMS {} | |
| impl Ins0x for FEMMS { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// HADDPD | |
| /// Packed Double-FP Horizontal Add | |
| pub struct HADDPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for HADDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for HADDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// HADDPS | |
| /// Packed Single-FP Horizontal Add | |
| pub struct HADDPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for HADDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for HADDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// HSUBPD | |
| /// Packed Double-FP Horizontal Subtract | |
| pub struct HSUBPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for HSUBPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for HSUBPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// HSUBPS | |
| /// Packed Single-FP Horizontal Subtract | |
| pub struct HSUBPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for HSUBPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for HSUBPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// IDIV | |
| /// Signed Divide | |
| pub struct IDIV {} | |
| impl Ins1x<GPRegister8> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory8> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<Memory16> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory32> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory64> for IDIV { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// IMUL | |
| /// Signed Multiply | |
| pub struct IMUL {} | |
| impl Ins1x<GPRegister8> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory8> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<Memory16> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory32> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory64> for IMUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for IMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for IMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for IMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for IMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for IMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for IMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<GPRegister16, GPRegister16, Imm8> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins3x<GPRegister16, GPRegister16, Imm16> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16, arg2: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins3x<GPRegister16, Memory16, Imm8> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins3x<GPRegister16, Memory16, Imm16> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16, arg2: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Imm8> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Imm32> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Imm32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, Imm8> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, Imm32> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: Imm32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Imm8> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Imm32> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Imm32) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, Imm8> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, Imm32> for IMUL { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x69); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// INC | |
| /// Increment by 1 | |
| pub struct INC {} | |
| impl Ins1x<GPRegister8> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory8> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins1x<Memory16> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory32> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory64> for INC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// INSERTPS | |
| /// Insert Packed Single Precision Floating-Point Value | |
| pub struct INSERTPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for INSERTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory32, Imm8> for INSERTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x21); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// INSERTQ | |
| /// Insert Field | |
| pub struct INSERTQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for INSERTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Imm8, Imm8> for INSERTQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Imm8, | |
| arg3: Imm8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// INT | |
| /// Call to Interrupt Procedure | |
| pub struct INT {} | |
| impl Ins1x<HardCodedOp> for INT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: HardCodedOp) { | |
| bytes.push(0xCC); | |
| } | |
| } | |
| impl Ins1x<Imm8> for INT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Imm8) { | |
| bytes.push(0xCD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JA | |
| /// Jump if above (CF == 0 and ZF == 0) | |
| pub struct JA {} | |
| impl Ins1x<RIPRelativeOffset8> for JA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x77); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x87); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JAE | |
| /// Jump if above or equal (CF == 0) | |
| pub struct JAE {} | |
| impl Ins1x<RIPRelativeOffset8> for JAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x83); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JB | |
| /// Jump if below (CF == 1) | |
| pub struct JB {} | |
| impl Ins1x<RIPRelativeOffset8> for JB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x82); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JBE | |
| /// Jump if below or equal (CF == 1 or ZF == 1) | |
| pub struct JBE {} | |
| impl Ins1x<RIPRelativeOffset8> for JBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x76); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x86); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JC | |
| /// Jump if carry (CF == 1) | |
| pub struct JC {} | |
| impl Ins1x<RIPRelativeOffset8> for JC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x82); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JE | |
| /// Jump if equal (ZF == 1) | |
| pub struct JE {} | |
| impl Ins1x<RIPRelativeOffset8> for JE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x74); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x84); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JECXZ | |
| /// Jump if ECX register is 0 | |
| pub struct JECXZ {} | |
| impl Ins1x<RIPRelativeOffset8> for JECXZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0xE3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JG | |
| /// Jump if greater (ZF == 0 and SF == OF) | |
| pub struct JG {} | |
| impl Ins1x<RIPRelativeOffset8> for JG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JGE | |
| /// Jump if greater or equal (SF == OF) | |
| pub struct JGE {} | |
| impl Ins1x<RIPRelativeOffset8> for JGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JL | |
| /// Jump if less (SF != OF) | |
| pub struct JL {} | |
| impl Ins1x<RIPRelativeOffset8> for JL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JLE | |
| /// Jump if less or equal (ZF == 1 or SF != OF) | |
| pub struct JLE {} | |
| impl Ins1x<RIPRelativeOffset8> for JLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JMP | |
| /// Jump Unconditionally | |
| pub struct JMP {} | |
| impl Ins1x<RIPRelativeOffset8> for JMP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0xEB); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JMP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0xE9); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for JMP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory64> for JMP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNA | |
| /// Jump if not above (CF == 1 or ZF == 1) | |
| pub struct JNA {} | |
| impl Ins1x<RIPRelativeOffset8> for JNA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x76); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x86); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNAE | |
| /// Jump if not above or equal (CF == 1) | |
| pub struct JNAE {} | |
| impl Ins1x<RIPRelativeOffset8> for JNAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x82); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNB | |
| /// Jump if not below (CF == 0) | |
| pub struct JNB {} | |
| impl Ins1x<RIPRelativeOffset8> for JNB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x83); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNBE | |
| /// Jump if not below or equal (CF == 0 and ZF == 0) | |
| pub struct JNBE {} | |
| impl Ins1x<RIPRelativeOffset8> for JNBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x77); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x87); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNC | |
| /// Jump if not carry (CF == 0) | |
| pub struct JNC {} | |
| impl Ins1x<RIPRelativeOffset8> for JNC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x83); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNE | |
| /// Jump if not equal (ZF == 0) | |
| pub struct JNE {} | |
| impl Ins1x<RIPRelativeOffset8> for JNE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x75); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x85); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNG | |
| /// Jump if not greater (ZF == 1 or SF != OF) | |
| pub struct JNG {} | |
| impl Ins1x<RIPRelativeOffset8> for JNG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNGE | |
| /// Jump if not greater or equal (SF != OF) | |
| pub struct JNGE {} | |
| impl Ins1x<RIPRelativeOffset8> for JNGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNL | |
| /// Jump if not less (SF == OF) | |
| pub struct JNL {} | |
| impl Ins1x<RIPRelativeOffset8> for JNL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNLE | |
| /// Jump if not less or equal (ZF == 0 and SF == OF) | |
| pub struct JNLE {} | |
| impl Ins1x<RIPRelativeOffset8> for JNLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNO | |
| /// Jump if not overflow (OF == 0) | |
| pub struct JNO {} | |
| impl Ins1x<RIPRelativeOffset8> for JNO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x81); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNP | |
| /// Jump if not parity (PF == 0) | |
| pub struct JNP {} | |
| impl Ins1x<RIPRelativeOffset8> for JNP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNS | |
| /// Jump if not sign (SF == 0) | |
| pub struct JNS {} | |
| impl Ins1x<RIPRelativeOffset8> for JNS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x89); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JNZ | |
| /// Jump if not zero (ZF == 0) | |
| pub struct JNZ {} | |
| impl Ins1x<RIPRelativeOffset8> for JNZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x75); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JNZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x85); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JO | |
| /// Jump if overflow (OF == 1) | |
| pub struct JO {} | |
| impl Ins1x<RIPRelativeOffset8> for JO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x70); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x80); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JP | |
| /// Jump if parity (PF == 1) | |
| pub struct JP {} | |
| impl Ins1x<RIPRelativeOffset8> for JP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JPE | |
| /// Jump if parity even (PF == 1) | |
| pub struct JPE {} | |
| impl Ins1x<RIPRelativeOffset8> for JPE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JPE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JPO | |
| /// Jump if parity odd (PF == 0) | |
| pub struct JPO {} | |
| impl Ins1x<RIPRelativeOffset8> for JPO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JPO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x8B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JRCXZ | |
| /// Jump if RCX register is 0 | |
| pub struct JRCXZ {} | |
| impl Ins1x<RIPRelativeOffset8> for JRCXZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0xE3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JS | |
| /// Jump if sign (SF == 1) | |
| pub struct JS {} | |
| impl Ins1x<RIPRelativeOffset8> for JS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// JZ | |
| /// Jump if zero (ZF == 1) | |
| pub struct JZ {} | |
| impl Ins1x<RIPRelativeOffset8> for JZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset8) { | |
| bytes.push(0x74); | |
| } | |
| } | |
| impl Ins1x<RIPRelativeOffset32> for JZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: RIPRelativeOffset32) { | |
| bytes.push(0x84); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KADDB | |
| /// ADD Two 8-bit Masks | |
| pub struct KADDB {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KADDB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KADDD | |
| /// ADD Two 32-bit Masks | |
| pub struct KADDD {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KADDD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KADDQ | |
| /// ADD Two 64-bit Masks | |
| pub struct KADDQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KADDQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KADDW | |
| /// ADD Two 16-bit Masks | |
| pub struct KADDW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KADDW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDB | |
| /// Bitwise Logical AND 8-bit Masks | |
| pub struct KANDB {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDD | |
| /// Bitwise Logical AND 32-bit Masks | |
| pub struct KANDD {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDNB | |
| /// Bitwise Logical AND NOT 8-bit Masks | |
| pub struct KANDNB {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDNB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDND | |
| /// Bitwise Logical AND NOT 32-bit Masks | |
| pub struct KANDND {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDND { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDNQ | |
| /// Bitwise Logical AND NOT 64-bit Masks | |
| pub struct KANDNQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDNQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDNW | |
| /// Bitwise Logical AND NOT 16-bit Masks | |
| pub struct KANDNW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDNW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDQ | |
| /// Bitwise Logical AND 64-bit Masks | |
| pub struct KANDQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KANDW | |
| /// Bitwise Logical AND 16-bit Masks | |
| pub struct KANDW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KANDW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KMOVB | |
| /// Move 8-bit Mask | |
| pub struct KMOVB {} | |
| impl Ins2x<KRegister, KRegister> for KMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<KRegister, GPRegister32> for KMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: GPRegister32) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<KRegister, Memory8> for KMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: Memory8) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, KRegister> for KMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: KRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<Memory8, KRegister> for KMOVB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: KRegister) { | |
| bytes.push(0x91); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KMOVD | |
| /// Move 32-bit Mask | |
| pub struct KMOVD {} | |
| impl Ins2x<KRegister, KRegister> for KMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<KRegister, GPRegister32> for KMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: GPRegister32) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<KRegister, Memory32> for KMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: Memory32) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, KRegister> for KMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: KRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<Memory32, KRegister> for KMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: KRegister) { | |
| bytes.push(0x91); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KMOVQ | |
| /// Move 64-bit Mask | |
| pub struct KMOVQ {} | |
| impl Ins2x<KRegister, KRegister> for KMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<KRegister, GPRegister64> for KMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: GPRegister64) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<KRegister, Memory64> for KMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: Memory64) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, KRegister> for KMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: KRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<Memory64, KRegister> for KMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: KRegister) { | |
| bytes.push(0x91); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KMOVW | |
| /// Move 16-bit Mask | |
| pub struct KMOVW {} | |
| impl Ins2x<KRegister, KRegister> for KMOVW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<KRegister, GPRegister32> for KMOVW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: GPRegister32) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<KRegister, Memory16> for KMOVW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: Memory16) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, KRegister> for KMOVW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: KRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<Memory16, KRegister> for KMOVW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: KRegister) { | |
| bytes.push(0x91); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KNOTB | |
| /// NOT 8-bit Mask Register | |
| pub struct KNOTB {} | |
| impl Ins2x<KRegister, KRegister> for KNOTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KNOTD | |
| /// NOT 32-bit Mask Register | |
| pub struct KNOTD {} | |
| impl Ins2x<KRegister, KRegister> for KNOTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KNOTQ | |
| /// NOT 64-bit Mask Register | |
| pub struct KNOTQ {} | |
| impl Ins2x<KRegister, KRegister> for KNOTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KNOTW | |
| /// NOT 16-bit Mask Register | |
| pub struct KNOTW {} | |
| impl Ins2x<KRegister, KRegister> for KNOTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORB | |
| /// Bitwise Logical OR 8-bit Masks | |
| pub struct KORB {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KORB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x45); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORD | |
| /// Bitwise Logical OR 32-bit Masks | |
| pub struct KORD {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KORD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x45); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORQ | |
| /// Bitwise Logical OR 64-bit Masks | |
| pub struct KORQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KORQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x45); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORTESTB | |
| /// OR 8-bit Masks and Set Flags | |
| pub struct KORTESTB {} | |
| impl Ins2x<KRegister, KRegister> for KORTESTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORTESTD | |
| /// OR 32-bit Masks and Set Flags | |
| pub struct KORTESTD {} | |
| impl Ins2x<KRegister, KRegister> for KORTESTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORTESTQ | |
| /// OR 64-bit Masks and Set Flags | |
| pub struct KORTESTQ {} | |
| impl Ins2x<KRegister, KRegister> for KORTESTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORTESTW | |
| /// OR 16-bit Masks and Set Flags | |
| pub struct KORTESTW {} | |
| impl Ins2x<KRegister, KRegister> for KORTESTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KORW | |
| /// Bitwise Logical OR 16-bit Masks | |
| pub struct KORW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KORW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x45); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTLB | |
| /// Shift Left 8-bit Masks | |
| pub struct KSHIFTLB {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTLB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x32); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTLD | |
| /// Shift Left 32-bit Masks | |
| pub struct KSHIFTLD {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x33); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTLQ | |
| /// Shift Left 64-bit Masks | |
| pub struct KSHIFTLQ {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTLQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x33); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTLW | |
| /// Shift Left 16-bit Masks | |
| pub struct KSHIFTLW {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTLW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x32); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTRB | |
| /// Shift Right 8-bit Masks | |
| pub struct KSHIFTRB {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTRB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x30); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTRD | |
| /// Shift Right 32-bit Masks | |
| pub struct KSHIFTRD {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x31); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTRQ | |
| /// Shift Right 64-bit Masks | |
| pub struct KSHIFTRQ {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTRQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x31); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KSHIFTRW | |
| /// Shift Right 16-bit Masks | |
| pub struct KSHIFTRW {} | |
| impl Ins3x<KRegister, KRegister, Imm8> for KSHIFTRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: Imm8) { | |
| bytes.push(0x30); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KTESTB | |
| /// Bit Test 8-bit Masks and Set Flags | |
| pub struct KTESTB {} | |
| impl Ins2x<KRegister, KRegister> for KTESTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KTESTD | |
| /// Bit Test 32-bit Masks and Set Flags | |
| pub struct KTESTD {} | |
| impl Ins2x<KRegister, KRegister> for KTESTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KTESTQ | |
| /// Bit Test 64-bit Masks and Set Flags | |
| pub struct KTESTQ {} | |
| impl Ins2x<KRegister, KRegister> for KTESTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KTESTW | |
| /// Bit Test 16-bit Masks and Set Flags | |
| pub struct KTESTW {} | |
| impl Ins2x<KRegister, KRegister> for KTESTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KUNPCKBW | |
| /// Unpack and Interleave 8-bit Masks | |
| pub struct KUNPCKBW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KUNPCKBW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KUNPCKDQ | |
| /// Unpack and Interleave 32-bit Masks | |
| pub struct KUNPCKDQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KUNPCKDQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KUNPCKWD | |
| /// Unpack and Interleave 16-bit Masks | |
| pub struct KUNPCKWD {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KUNPCKWD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXNORB | |
| /// Bitwise Logical XNOR 8-bit Masks | |
| pub struct KXNORB {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXNORB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x46); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXNORD | |
| /// Bitwise Logical XNOR 32-bit Masks | |
| pub struct KXNORD {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXNORD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x46); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXNORQ | |
| /// Bitwise Logical XNOR 64-bit Masks | |
| pub struct KXNORQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXNORQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x46); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXNORW | |
| /// Bitwise Logical XNOR 16-bit Masks | |
| pub struct KXNORW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXNORW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x46); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXORB | |
| /// Bitwise Logical XOR 8-bit Masks | |
| pub struct KXORB {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXORB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x47); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXORD | |
| /// Bitwise Logical XOR 32-bit Masks | |
| pub struct KXORD {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXORD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x47); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXORQ | |
| /// Bitwise Logical XOR 64-bit Masks | |
| pub struct KXORQ {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXORQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x47); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// KXORW | |
| /// Bitwise Logical XOR 16-bit Masks | |
| pub struct KXORW {} | |
| impl Ins3x<KRegister, KRegister, KRegister> for KXORW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegister, arg1: KRegister, arg2: KRegister) { | |
| bytes.push(0x47); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// LDDQU | |
| /// Load Unaligned Integer 128 Bits | |
| pub struct LDDQU {} | |
| impl Ins2x<XMMRegister, Memory128> for LDDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// LDMXCSR | |
| /// Load MXCSR Register | |
| pub struct LDMXCSR {} | |
| impl Ins1x<Memory32> for LDMXCSR { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// LEA | |
| /// Load Effective Address | |
| pub struct LEA {} | |
| impl Ins2x<GPRegister16, MemoryAny> for LEA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: MemoryAny) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, MemoryAny> for LEA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: MemoryAny) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, MemoryAny> for LEA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: MemoryAny) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// LFENCE | |
| /// Load Fence | |
| pub struct LFENCE {} | |
| impl Ins0x for LFENCE { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xE8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// LZCNT | |
| /// Count the Number of Leading Zero Bits | |
| pub struct LZCNT {} | |
| impl Ins2x<GPRegister16, GPRegister16> for LZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for LZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for LZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for LZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for LZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for LZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MASKMOVDQU | |
| /// Store Selected Bytes of Double Quadword | |
| pub struct MASKMOVDQU {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MASKMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MASKMOVQ | |
| /// Store Selected Bytes of Quadword | |
| pub struct MASKMOVQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for MASKMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MAXPD | |
| /// Return Maximum Packed Double-Precision Floating-Point Values | |
| pub struct MAXPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MAXPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MAXPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MAXPS | |
| /// Return Maximum Packed Single-Precision Floating-Point Values | |
| pub struct MAXPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MAXPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MAXPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MAXSD | |
| /// Return Maximum Scalar Double-Precision Floating-Point Value | |
| pub struct MAXSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MAXSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for MAXSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MAXSS | |
| /// Return Maximum Scalar Single-Precision Floating-Point Value | |
| pub struct MAXSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MAXSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for MAXSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MFENCE | |
| /// Memory Fence | |
| pub struct MFENCE {} | |
| impl Ins0x for MFENCE { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MINPD | |
| /// Return Minimum Packed Double-Precision Floating-Point Values | |
| pub struct MINPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MINPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MINPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MINPS | |
| /// Return Minimum Packed Single-Precision Floating-Point Values | |
| pub struct MINPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MINPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MINPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MINSD | |
| /// Return Minimum Scalar Double-Precision Floating-Point Value | |
| pub struct MINSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MINSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for MINSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MINSS | |
| /// Return Minimum Scalar Single-Precision Floating-Point Value | |
| pub struct MINSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MINSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for MINSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOV | |
| /// Move | |
| pub struct MOV {} | |
| impl Ins2x<GPRegister8, Imm8> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC6); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x89); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8B); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x89); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8B); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm64> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x89); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8B); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC6); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x89); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x89); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for MOV { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x89); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVAPD | |
| /// Move Aligned Packed Double-Precision Floating-Point Values | |
| pub struct MOVAPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for MOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVAPS | |
| /// Move Aligned Packed Single-Precision Floating-Point Values | |
| pub struct MOVAPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for MOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVBE | |
| /// Move Data After Swapping Bytes | |
| pub struct MOVBE {} | |
| impl Ins2x<GPRegister16, Memory16> for MOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for MOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for MOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for MOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for MOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for MOVBE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVD | |
| /// Move Doubleword | |
| pub struct MOVD {} | |
| impl Ins2x<GPRegister32, MMXRegister> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: MMXRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, GPRegister32> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: GPRegister32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory32> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister32> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<Memory32, MMXRegister> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: MMXRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<Memory32, XMMRegister> for MOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVDDUP | |
| /// Move One Double-FP and Duplicate | |
| pub struct MOVDDUP {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for MOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVDQ2Q | |
| /// Move Quadword from XMM to MMX Technology Register | |
| pub struct MOVDQ2Q {} | |
| impl Ins2x<MMXRegister, XMMRegister> for MOVDQ2Q { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVDQA | |
| /// Move Aligned Double Quadword | |
| pub struct MOVDQA {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for MOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x7F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVDQU | |
| /// Move Unaligned Double Quadword | |
| pub struct MOVDQU {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for MOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x7F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVHLPS | |
| /// Move Packed Single-Precision Floating-Point Values High to Low | |
| pub struct MOVHLPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVHLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVHPD | |
| /// Move High Packed Double-Precision Floating-Point Value | |
| pub struct MOVHPD {} | |
| impl Ins2x<XMMRegister, Memory64> for MOVHPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for MOVHPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x17); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVHPS | |
| /// Move High Packed Single-Precision Floating-Point Values | |
| pub struct MOVHPS {} | |
| impl Ins2x<XMMRegister, Memory64> for MOVHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for MOVHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x17); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVLHPS | |
| /// Move Packed Single-Precision Floating-Point Values Low to High | |
| pub struct MOVLHPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVLHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVLPD | |
| /// Move Low Packed Double-Precision Floating-Point Value | |
| pub struct MOVLPD {} | |
| impl Ins2x<XMMRegister, Memory64> for MOVLPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for MOVLPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x13); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVLPS | |
| /// Move Low Packed Single-Precision Floating-Point Values | |
| pub struct MOVLPS {} | |
| impl Ins2x<XMMRegister, Memory64> for MOVLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for MOVLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x13); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVMSKPD | |
| /// Extract Packed Double-Precision Floating-Point Sign Mask | |
| pub struct MOVMSKPD {} | |
| impl Ins2x<GPRegister32, XMMRegister> for MOVMSKPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x50); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVMSKPS | |
| /// Extract Packed Single-Precision Floating-Point Sign Mask | |
| pub struct MOVMSKPS {} | |
| impl Ins2x<GPRegister32, XMMRegister> for MOVMSKPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x50); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTDQ | |
| /// Store Double Quadword Using Non-Temporal Hint | |
| pub struct MOVNTDQ {} | |
| impl Ins2x<Memory128, XMMRegister> for MOVNTDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xE7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTDQA | |
| /// Load Double Quadword Non-Temporal Aligned Hint | |
| pub struct MOVNTDQA {} | |
| impl Ins2x<XMMRegister, Memory128> for MOVNTDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTI | |
| /// Store Doubleword Using Non-Temporal Hint | |
| pub struct MOVNTI {} | |
| impl Ins2x<Memory32, GPRegister32> for MOVNTI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC3); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for MOVNTI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTPD | |
| /// Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint | |
| pub struct MOVNTPD {} | |
| impl Ins2x<Memory128, XMMRegister> for MOVNTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTPS | |
| /// Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint | |
| pub struct MOVNTPS {} | |
| impl Ins2x<Memory128, XMMRegister> for MOVNTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTQ | |
| /// Store of Quadword Using Non-Temporal Hint | |
| pub struct MOVNTQ {} | |
| impl Ins2x<Memory64, MMXRegister> for MOVNTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: MMXRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xE7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTSD | |
| /// Store Scalar Double-Precision Floating-Point Values Using Non-Temporal Hint | |
| pub struct MOVNTSD {} | |
| impl Ins2x<Memory64, XMMRegister> for MOVNTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVNTSS | |
| /// Store Scalar Single-Precision Floating-Point Values Using Non-Temporal Hint | |
| pub struct MOVNTSS {} | |
| impl Ins2x<Memory32, XMMRegister> for MOVNTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVQ | |
| /// Move Quadword | |
| pub struct MOVQ {} | |
| impl Ins2x<GPRegister64, MMXRegister> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: MMXRegister) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, GPRegister64> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister64> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister64) { | |
| bytes.push(0x66); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<Memory64, MMXRegister> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: MMXRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for MOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVQ2DQ | |
| /// Move Quadword from MMX Technology to XMM Register | |
| pub struct MOVQ2DQ {} | |
| impl Ins2x<XMMRegister, MMXRegister> for MOVQ2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: MMXRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVSD | |
| /// Move Scalar Double-Precision Floating-Point Value | |
| pub struct MOVSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for MOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for MOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVSHDUP | |
| /// Move Packed Single-FP High and Duplicate | |
| pub struct MOVSHDUP {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVSLDUP | |
| /// Move Packed Single-FP Low and Duplicate | |
| pub struct MOVSLDUP {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVSS | |
| /// Move Scalar Single-Precision Floating-Point Values | |
| pub struct MOVSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for MOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory32, XMMRegister> for MOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVSX | |
| /// Move with Sign-Extension | |
| pub struct MOVSX {} | |
| impl Ins2x<GPRegister16, GPRegister8> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory8> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister8> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister16> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister16) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory8> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory16> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory16) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister8> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister8) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister16> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister16) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory8> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory8) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory16> for MOVSX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory16) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVSXD | |
| /// Move Doubleword to Quadword with Sign-Extension | |
| pub struct MOVSXD {} | |
| impl Ins2x<GPRegister64, GPRegister32> for MOVSXD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister32) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x63); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for MOVSXD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x63); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVUPD | |
| /// Move Unaligned Packed Double-Precision Floating-Point Values | |
| pub struct MOVUPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for MOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVUPS | |
| /// Move Unaligned Packed Single-Precision Floating-Point Values | |
| pub struct MOVUPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for MOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MOVZX | |
| /// Move with Zero-Extend | |
| pub struct MOVZX {} | |
| impl Ins2x<GPRegister16, GPRegister8> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory8> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister8> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister16> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister16) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory8> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory16> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory16) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister8> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister8) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister16> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister16) { | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory8> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory8) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory16> for MOVZX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory16) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MPSADBW | |
| /// Compute Multiple Packed Sums of Absolute Difference | |
| pub struct MPSADBW {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for MPSADBW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for MPSADBW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MUL | |
| /// Unsigned Multiply | |
| pub struct MUL {} | |
| impl Ins1x<GPRegister8> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory8> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<Memory16> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory32> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory64> for MUL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MULPD | |
| /// Multiply Packed Double-Precision Floating-Point Values | |
| pub struct MULPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MULPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MULPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x59); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MULPS | |
| /// Multiply Packed Single-Precision Floating-Point Values | |
| pub struct MULPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MULPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for MULPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x59); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MULSD | |
| /// Multiply Scalar Double-Precision Floating-Point Values | |
| pub struct MULSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MULSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for MULSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x59); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MULSS | |
| /// Multiply Scalar Single-Precision Floating-Point Values | |
| pub struct MULSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for MULSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for MULSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x59); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// MULX | |
| /// Unsigned Multiply Without Affecting Flags | |
| pub struct MULX {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for MULX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Memory32> for MULX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Memory32) { | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for MULX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Memory64> for MULX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Memory64) { | |
| bytes.push(0xF6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// NEG | |
| /// Two's Complement Negation | |
| pub struct NEG {} | |
| impl Ins1x<GPRegister8> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory8> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<Memory16> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory32> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory64> for NEG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// NOP | |
| /// No Operation | |
| pub struct NOP {} | |
| impl Ins0x for NOP { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x90); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// NOT | |
| /// One's Complement Negation | |
| pub struct NOT {} | |
| impl Ins1x<GPRegister8> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory8> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins1x<Memory16> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory32> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins1x<Memory64> for NOT { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// OR | |
| /// Logical Inclusive OR | |
| pub struct OR {} | |
| impl Ins2x<HardCodedOp, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0xC); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x8); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x8); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for OR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ORPD | |
| /// Bitwise Logical OR of Double-Precision Floating-Point Values | |
| pub struct ORPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ORPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x56); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ORPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x56); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ORPS | |
| /// Bitwise Logical OR of Single-Precision Floating-Point Values | |
| pub struct ORPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for ORPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x56); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for ORPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x56); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PABSB | |
| /// Packed Absolute Value of Byte Integers | |
| pub struct PABSB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PABSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1C); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PABSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PABSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PABSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PABSD | |
| /// Packed Absolute Value of Doubleword Integers | |
| pub struct PABSD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PABSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PABSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PABSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PABSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PABSW | |
| /// Packed Absolute Value of Word Integers | |
| pub struct PABSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PABSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PABSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PABSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PABSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PACKSSDW | |
| /// Pack Doublewords into Words with Signed Saturation | |
| pub struct PACKSSDW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PACKSSDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PACKSSDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PACKSSDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PACKSSDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PACKSSWB | |
| /// Pack Words into Bytes with Signed Saturation | |
| pub struct PACKSSWB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PACKSSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x63); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PACKSSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x63); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PACKSSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x63); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PACKSSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x63); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PACKUSDW | |
| /// Pack Doublewords into Words with Unsigned Saturation | |
| pub struct PACKUSDW {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PACKUSDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PACKUSDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PACKUSWB | |
| /// Pack Words into Bytes with Unsigned Saturation | |
| pub struct PACKUSWB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PACKUSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x67); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PACKUSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x67); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PACKUSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x67); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PACKUSWB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x67); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDB | |
| /// Add Packed Byte Integers | |
| pub struct PADDB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFC); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDD | |
| /// Add Packed Doubleword Integers | |
| pub struct PADDD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDQ | |
| /// Add Packed Quadword Integers | |
| pub struct PADDQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD4); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDSB | |
| /// Add Packed Signed Byte Integers with Signed Saturation | |
| pub struct PADDSB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEC); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDSW | |
| /// Add Packed Signed Word Integers with Signed Saturation | |
| pub struct PADDSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xED); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xED); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xED); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xED); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDUSB | |
| /// Add Packed Unsigned Byte Integers with Unsigned Saturation | |
| pub struct PADDUSB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDC); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDUSW | |
| /// Add Packed Unsigned Word Integers with Unsigned Saturation | |
| pub struct PADDUSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDD); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDD); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDD); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PADDW | |
| /// Add Packed Word Integers | |
| pub struct PADDW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFD); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFD); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFD); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PALIGNR | |
| /// Packed Align Right | |
| pub struct PALIGNR {} | |
| impl Ins3x<MMXRegister, MMXRegister, Imm8> for PALIGNR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF); | |
| } | |
| } | |
| impl Ins3x<MMXRegister, Memory64, Imm8> for PALIGNR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PALIGNR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PALIGNR { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PAND | |
| /// Packed Bitwise Logical AND | |
| pub struct PAND {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PAND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDB); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PAND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PAND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PAND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PANDN | |
| /// Packed Bitwise Logical AND NOT | |
| pub struct PANDN {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PANDN { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PANDN { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PANDN { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PANDN { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PAUSE | |
| /// Spin Loop Hint | |
| pub struct PAUSE {} | |
| impl Ins0x for PAUSE { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF3); | |
| bytes.push(0x90); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PAVGB | |
| /// Average Packed Byte Integers | |
| pub struct PAVGB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PAVGB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE0); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PAVGB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE0); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PAVGB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE0); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PAVGB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PAVGUSB | |
| /// Average Packed Byte Integers | |
| pub struct PAVGUSB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PAVGUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PAVGUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PAVGW | |
| /// Average Packed Word Integers | |
| pub struct PAVGW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PAVGW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE3); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PAVGW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PAVGW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PAVGW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PBLENDVB | |
| /// Variable Blend Packed Bytes | |
| pub struct PBLENDVB {} | |
| impl Ins3x<XMMRegister, XMMRegister, HardCodedOp> for PBLENDVB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, HardCodedOp> for PBLENDVB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x10); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PBLENDW | |
| /// Blend Packed Words | |
| pub struct PBLENDW {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PBLENDW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PBLENDW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCLMULQDQ | |
| /// Carry-Less Quadword Multiplication | |
| pub struct PCLMULQDQ {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PCLMULQDQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x44); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PCLMULQDQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x44); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPEQB | |
| /// Compare Packed Byte Data for Equality | |
| pub struct PCMPEQB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PCMPEQB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x74); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PCMPEQB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x74); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPEQB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x74); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPEQB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x74); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPEQD | |
| /// Compare Packed Doubleword Data for Equality | |
| pub struct PCMPEQD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PCMPEQD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x76); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PCMPEQD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x76); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPEQD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x76); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPEQD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x76); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPEQQ | |
| /// Compare Packed Quadword Data for Equality | |
| pub struct PCMPEQQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPEQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPEQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPEQW | |
| /// Compare Packed Word Data for Equality | |
| pub struct PCMPEQW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PCMPEQW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x75); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PCMPEQW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x75); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPEQW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x75); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPEQW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x75); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPESTRI | |
| /// Packed Compare Explicit Length Strings, Return Index | |
| pub struct PCMPESTRI {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PCMPESTRI { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x61); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PCMPESTRI { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x61); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPESTRM | |
| /// Packed Compare Explicit Length Strings, Return Mask | |
| pub struct PCMPESTRM {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PCMPESTRM { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x60); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PCMPESTRM { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x60); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPGTB | |
| /// Compare Packed Signed Byte Integers for Greater Than | |
| pub struct PCMPGTB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PCMPGTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x64); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PCMPGTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x64); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPGTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x64); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPGTB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x64); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPGTD | |
| /// Compare Packed Signed Doubleword Integers for Greater Than | |
| pub struct PCMPGTD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PCMPGTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PCMPGTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPGTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPGTD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x66); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPGTQ | |
| /// Compare Packed Data for Greater Than | |
| pub struct PCMPGTQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPGTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x37); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPGTQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x37); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPGTW | |
| /// Compare Packed Signed Word Integers for Greater Than | |
| pub struct PCMPGTW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PCMPGTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PCMPGTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PCMPGTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PCMPGTW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x65); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPISTRI | |
| /// Packed Compare Implicit Length Strings, Return Index | |
| pub struct PCMPISTRI {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PCMPISTRI { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x63); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PCMPISTRI { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x63); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PCMPISTRM | |
| /// Packed Compare Implicit Length Strings, Return Mask | |
| pub struct PCMPISTRM {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PCMPISTRM { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x62); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PCMPISTRM { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x62); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PDEP | |
| /// Parallel Bits Deposit | |
| pub struct PDEP {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for PDEP { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Memory32> for PDEP { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Memory32) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for PDEP { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Memory64> for PDEP { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Memory64) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PEXT | |
| /// Parallel Bits Extract | |
| pub struct PEXT {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for PEXT { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Memory32> for PEXT { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Memory32) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for PEXT { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Memory64> for PEXT { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Memory64) { | |
| bytes.push(0xF5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PEXTRB | |
| /// Extract Byte | |
| pub struct PEXTRB {} | |
| impl Ins3x<GPRegister32, XMMRegister, Imm8> for PEXTRB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x14); | |
| } | |
| } | |
| impl Ins3x<Memory8, XMMRegister, Imm8> for PEXTRB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory8, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x14); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PEXTRD | |
| /// Extract Doubleword | |
| pub struct PEXTRD {} | |
| impl Ins3x<GPRegister32, XMMRegister, Imm8> for PEXTRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins3x<Memory32, XMMRegister, Imm8> for PEXTRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PEXTRQ | |
| /// Extract Quadword | |
| pub struct PEXTRQ {} | |
| impl Ins3x<GPRegister64, XMMRegister, Imm8> for PEXTRQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins3x<Memory64, XMMRegister, Imm8> for PEXTRQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PEXTRW | |
| /// Extract Word | |
| pub struct PEXTRW {} | |
| impl Ins3x<GPRegister32, MMXRegister, Imm8> for PEXTRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: MMXRegister, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC5); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, Imm8> for PEXTRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins3x<Memory16, XMMRegister, Imm8> for PEXTRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory16, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x15); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PF2ID | |
| /// Packed Floating-Point to Integer Doubleword Converson | |
| pub struct PF2ID {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PF2ID { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PF2ID { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PF2IW | |
| /// Packed Floating-Point to Integer Word Conversion | |
| pub struct PF2IW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PF2IW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1C); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PF2IW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFACC | |
| /// Packed Floating-Point Accumulate | |
| pub struct PFACC {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFACC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFACC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xAE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFADD | |
| /// Packed Floating-Point Add | |
| pub struct PFADD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFADD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x9E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFCMPEQ | |
| /// Packed Floating-Point Compare for Equal | |
| pub struct PFCMPEQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFCMPEQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB0); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFCMPEQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFCMPGE | |
| /// Packed Floating-Point Compare for Greater or Equal | |
| pub struct PFCMPGE {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFCMPGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFCMPGE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x90); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFCMPGT | |
| /// Packed Floating-Point Compare for Greater Than | |
| pub struct PFCMPGT {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFCMPGT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA0); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFCMPGT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFMAX | |
| /// Packed Floating-Point Maximum | |
| pub struct PFMAX {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFMAX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFMAX { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFMIN | |
| /// Packed Floating-Point Minimum | |
| pub struct PFMIN {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFMIN { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x94); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFMIN { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x94); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFMUL | |
| /// Packed Floating-Point Multiply | |
| pub struct PFMUL {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB4); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFMUL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFNACC | |
| /// Packed Floating-Point Negative Accumulate | |
| pub struct PFNACC {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFNACC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFNACC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFPNACC | |
| /// Packed Floating-Point Positive-Negative Accumulate | |
| pub struct PFPNACC {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFPNACC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x8E); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFPNACC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFRCP | |
| /// Packed Floating-Point Reciprocal Approximation | |
| pub struct PFRCP {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFRCP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFRCP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x96); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFRCPIT1 | |
| /// Packed Floating-Point Reciprocal Iteration 1 | |
| pub struct PFRCPIT1 {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFRCPIT1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFRCPIT1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFRCPIT2 | |
| /// Packed Floating-Point Reciprocal Iteration 2 | |
| pub struct PFRCPIT2 {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFRCPIT2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFRCPIT2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFRSQIT1 | |
| /// Packed Floating-Point Reciprocal Square Root Iteration 1 | |
| pub struct PFRSQIT1 {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFRSQIT1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFRSQIT1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFRSQRT | |
| /// Packed Floating-Point Reciprocal Square Root Approximation | |
| pub struct PFRSQRT {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFRSQRT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFRSQRT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x97); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFSUB | |
| /// Packed Floating-Point Subtract | |
| pub struct PFSUB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFSUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFSUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x9A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PFSUBR | |
| /// Packed Floating-Point Subtract Reverse | |
| pub struct PFSUBR {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PFSUBR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PFSUBR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xAA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHADDD | |
| /// Packed Horizontal Add Doubleword Integer | |
| pub struct PHADDD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PHADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PHADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PHADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHADDD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHADDSW | |
| /// Packed Horizontal Add Signed Word Integers with Signed Saturation | |
| pub struct PHADDSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PHADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PHADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PHADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHADDSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHADDW | |
| /// Packed Horizontal Add Word Integers | |
| pub struct PHADDW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PHADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PHADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PHADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHADDW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHMINPOSUW | |
| /// Packed Horizontal Minimum of Unsigned Word Integers | |
| pub struct PHMINPOSUW {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PHMINPOSUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHMINPOSUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHSUBD | |
| /// Packed Horizontal Subtract Doubleword Integers | |
| pub struct PHSUBD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PHSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PHSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PHSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHSUBSW | |
| /// Packed Horizontal Subtract Signed Word Integers with Signed Saturation | |
| pub struct PHSUBSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PHSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PHSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PHSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x7); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PHSUBW | |
| /// Packed Horizontal Subtract Word Integers | |
| pub struct PHSUBW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PHSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PHSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PHSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PHSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PI2FD | |
| /// Packed Integer to Floating-Point Doubleword Conversion | |
| pub struct PI2FD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PI2FD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PI2FD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PI2FW | |
| /// Packed Integer to Floating-Point Word Conversion | |
| pub struct PI2FW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PI2FW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PI2FW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PINSRB | |
| /// Insert Byte | |
| pub struct PINSRB {} | |
| impl Ins3x<XMMRegister, GPRegister32, Imm8> for PINSRB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x20); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory8, Imm8> for PINSRB { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory8, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x20); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PINSRD | |
| /// Insert Doubleword | |
| pub struct PINSRD {} | |
| impl Ins3x<XMMRegister, GPRegister32, Imm8> for PINSRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x22); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory32, Imm8> for PINSRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x22); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PINSRQ | |
| /// Insert Quadword | |
| pub struct PINSRQ {} | |
| impl Ins3x<XMMRegister, GPRegister64, Imm8> for PINSRQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0x22); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory64, Imm8> for PINSRQ { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x22); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PINSRW | |
| /// Insert Word | |
| pub struct PINSRW {} | |
| impl Ins3x<MMXRegister, GPRegister32, Imm8> for PINSRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: MMXRegister, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC4); | |
| } | |
| } | |
| impl Ins3x<MMXRegister, Memory16, Imm8> for PINSRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory16, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC4); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, GPRegister32, Imm8> for PINSRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC4); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory16, Imm8> for PINSRW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMADDUBSW | |
| /// Multiply and Add Packed Signed and Unsigned Byte Integers | |
| pub struct PMADDUBSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMADDUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMADDUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMADDUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMADDUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMADDWD | |
| /// Multiply and Add Packed Signed Word Integers | |
| pub struct PMADDWD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMADDWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMADDWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMADDWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMADDWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMAXSB | |
| /// Maximum of Packed Signed Byte Integers | |
| pub struct PMAXSB {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMAXSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMAXSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMAXSD | |
| /// Maximum of Packed Signed Doubleword Integers | |
| pub struct PMAXSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMAXSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMAXSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMAXSW | |
| /// Maximum of Packed Signed Word Integers | |
| pub struct PMAXSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMAXSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEE); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMAXSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMAXSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMAXSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMAXUB | |
| /// Maximum of Packed Unsigned Byte Integers | |
| pub struct PMAXUB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMAXUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDE); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMAXUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMAXUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDE); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMAXUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMAXUD | |
| /// Maximum of Packed Unsigned Doubleword Integers | |
| pub struct PMAXUD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMAXUD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMAXUD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMAXUW | |
| /// Maximum of Packed Unsigned Word Integers | |
| pub struct PMAXUW {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMAXUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMAXUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMINSB | |
| /// Minimum of Packed Signed Byte Integers | |
| pub struct PMINSB {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMINSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMINSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x38); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMINSD | |
| /// Minimum of Packed Signed Doubleword Integers | |
| pub struct PMINSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMINSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMINSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x39); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMINSW | |
| /// Minimum of Packed Signed Word Integers | |
| pub struct PMINSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMINSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEA); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMINSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMINSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMINSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMINUB | |
| /// Minimum of Packed Unsigned Byte Integers | |
| pub struct PMINUB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMINUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDA); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMINUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMINUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xDA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMINUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xDA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMINUD | |
| /// Minimum of Packed Unsigned Doubleword Integers | |
| pub struct PMINUD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMINUD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMINUD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMINUW | |
| /// Minimum of Packed Unsigned Word Integers | |
| pub struct PMINUW {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMINUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x3A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMINUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x3A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVMSKB | |
| /// Move Byte Mask | |
| pub struct PMOVMSKB {} | |
| impl Ins2x<GPRegister32, MMXRegister> for PMOVMSKB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD7); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for PMOVMSKB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVSXBD | |
| /// Move Packed Byte Integers to Doubleword Integers with Sign Extension | |
| pub struct PMOVSXBD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVSXBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for PMOVSXBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x21); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVSXBQ | |
| /// Move Packed Byte Integers to Quadword Integers with Sign Extension | |
| pub struct PMOVSXBQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVSXBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x22); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory16> for PMOVSXBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x22); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVSXBW | |
| /// Move Packed Byte Integers to Word Integers with Sign Extension | |
| pub struct PMOVSXBW {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVSXBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x20); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for PMOVSXBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x20); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVSXDQ | |
| /// Move Packed Doubleword Integers to Quadword Integers with Sign Extension | |
| pub struct PMOVSXDQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVSXDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x25); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for PMOVSXDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x25); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVSXWD | |
| /// Move Packed Word Integers to Doubleword Integers with Sign Extension | |
| pub struct PMOVSXWD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVSXWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x23); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for PMOVSXWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x23); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVSXWQ | |
| /// Move Packed Word Integers to Quadword Integers with Sign Extension | |
| pub struct PMOVSXWQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVSXWQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x24); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for PMOVSXWQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x24); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVZXBD | |
| /// Move Packed Byte Integers to Doubleword Integers with Zero Extension | |
| pub struct PMOVZXBD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVZXBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x31); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for PMOVZXBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x31); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVZXBQ | |
| /// Move Packed Byte Integers to Quadword Integers with Zero Extension | |
| pub struct PMOVZXBQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVZXBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x32); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory16> for PMOVZXBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x32); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVZXBW | |
| /// Move Packed Byte Integers to Word Integers with Zero Extension | |
| pub struct PMOVZXBW {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVZXBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x30); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for PMOVZXBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x30); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVZXDQ | |
| /// Move Packed Doubleword Integers to Quadword Integers with Zero Extension | |
| pub struct PMOVZXDQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVZXDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x35); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for PMOVZXDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x35); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVZXWD | |
| /// Move Packed Word Integers to Doubleword Integers with Zero Extension | |
| pub struct PMOVZXWD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVZXWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x33); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for PMOVZXWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x33); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMOVZXWQ | |
| /// Move Packed Word Integers to Quadword Integers with Zero Extension | |
| pub struct PMOVZXWQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMOVZXWQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x34); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for PMOVZXWQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x34); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULDQ | |
| /// Multiply Packed Signed Doubleword Integers and Store Quadword Result | |
| pub struct PMULDQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x28); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULHRSW | |
| /// Packed Multiply Signed Word Integers and Store High Result with Round and Scale | |
| pub struct PMULHRSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMULHRSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMULHRSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULHRSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULHRSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULHRW | |
| /// Packed Multiply High Rounded Word | |
| pub struct PMULHRW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMULHRW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMULHRW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULHUW | |
| /// Multiply Packed Unsigned Word Integers and Store High Result | |
| pub struct PMULHUW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMULHUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE4); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMULHUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULHUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULHUW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULHW | |
| /// Multiply Packed Signed Word Integers and Store High Result | |
| pub struct PMULHW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMULHW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE5); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMULHW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULHW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULHW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULLD | |
| /// Multiply Packed Signed Doubleword Integers and Store Low Result | |
| pub struct PMULLD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x40); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULLW | |
| /// Multiply Packed Signed Word Integers and Store Low Result | |
| pub struct PMULLW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMULLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD5); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMULLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD5); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PMULUDQ | |
| /// Multiply Packed Unsigned Doubleword Integers | |
| pub struct PMULUDQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PMULUDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF4); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PMULUDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PMULUDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF4); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PMULUDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF4); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// POP | |
| /// Pop a Value from the Stack | |
| pub struct POP {} | |
| impl Ins1x<GPRegister16> for POP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for POP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins1x<Memory16> for POP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x8F); | |
| } | |
| } | |
| impl Ins1x<Memory64> for POP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x8F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// POPCNT | |
| /// Count of Number of Bits Set to 1 | |
| pub struct POPCNT {} | |
| impl Ins2x<GPRegister16, GPRegister16> for POPCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for POPCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for POPCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for POPCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for POPCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for POPCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// POR | |
| /// Packed Bitwise Logical OR | |
| pub struct POR {} | |
| impl Ins2x<MMXRegister, MMXRegister> for POR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEB); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for POR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for POR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for POR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PREFETCHNTA | |
| /// Prefetch Data Into Caches using NTA Hint | |
| pub struct PREFETCHNTA {} | |
| impl Ins1x<Memory8> for PREFETCHNTA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PREFETCHT0 | |
| /// Prefetch Data Into Caches using T0 Hint | |
| pub struct PREFETCHT0 {} | |
| impl Ins1x<Memory8> for PREFETCHT0 { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PREFETCHT1 | |
| /// Prefetch Data Into Caches using T1 Hint | |
| pub struct PREFETCHT1 {} | |
| impl Ins1x<Memory8> for PREFETCHT1 { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PREFETCHT2 | |
| /// Prefetch Data Into Caches using T2 Hint | |
| pub struct PREFETCHT2 {} | |
| impl Ins1x<Memory8> for PREFETCHT2 { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PREFETCHW | |
| /// Prefetch Data into Caches in Anticipation of a Write | |
| pub struct PREFETCHW {} | |
| impl Ins1x<Memory8> for PREFETCHW { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PREFETCHWT1 | |
| /// Prefetch Vector Data Into Caches with Intent to Write and T1 Hint | |
| pub struct PREFETCHWT1 {} | |
| impl Ins1x<Memory8> for PREFETCHWT1 { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSADBW | |
| /// Compute Sum of Absolute Differences | |
| pub struct PSADBW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSADBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSADBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSADBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSADBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSHUFB | |
| /// Packed Shuffle Bytes | |
| pub struct PSHUFB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSHUFB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x0); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSHUFB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x0); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSHUFB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x0); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSHUFB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSHUFD | |
| /// Shuffle Packed Doublewords | |
| pub struct PSHUFD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PSHUFD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x70); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PSHUFD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x70); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSHUFHW | |
| /// Shuffle Packed High Words | |
| pub struct PSHUFHW {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PSHUFHW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x70); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PSHUFHW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x70); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSHUFLW | |
| /// Shuffle Packed Low Words | |
| pub struct PSHUFLW {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for PSHUFLW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x70); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for PSHUFLW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x70); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSHUFW | |
| /// Shuffle Packed Words | |
| pub struct PSHUFW {} | |
| impl Ins3x<MMXRegister, MMXRegister, Imm8> for PSHUFW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x70); | |
| } | |
| } | |
| impl Ins3x<MMXRegister, Memory64, Imm8> for PSHUFW { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x70); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSIGNB | |
| /// Packed Sign of Byte Integers | |
| pub struct PSIGNB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSIGNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x8); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSIGNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSIGNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSIGNB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSIGND | |
| /// Packed Sign of Doubleword Integers | |
| pub struct PSIGND {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSIGND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSIGND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSIGND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSIGND { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSIGNW | |
| /// Packed Sign of Word Integers | |
| pub struct PSIGNW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSIGNW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSIGNW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSIGNW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSIGNW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSLLD | |
| /// Shift Packed Doubleword Data Left Logical | |
| pub struct PSLLD {} | |
| impl Ins2x<MMXRegister, Imm8> for PSLLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSLLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF2); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSLLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSLLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSLLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSLLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSLLDQ | |
| /// Shift Packed Double Quadword Left Logical | |
| pub struct PSLLDQ {} | |
| impl Ins2x<XMMRegister, Imm8> for PSLLDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x73); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSLLQ | |
| /// Shift Packed Quadword Data Left Logical | |
| pub struct PSLLQ {} | |
| impl Ins2x<MMXRegister, Imm8> for PSLLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSLLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSLLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSLLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSLLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSLLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSLLW | |
| /// Shift Packed Word Data Left Logical | |
| pub struct PSLLW {} | |
| impl Ins2x<MMXRegister, Imm8> for PSLLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSLLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSLLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSLLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSLLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSLLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSRAD | |
| /// Shift Packed Doubleword Data Right Arithmetic | |
| pub struct PSRAD {} | |
| impl Ins2x<MMXRegister, Imm8> for PSRAD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSRAD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE2); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSRAD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSRAD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSRAD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSRAD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSRAW | |
| /// Shift Packed Word Data Right Arithmetic | |
| pub struct PSRAW {} | |
| impl Ins2x<MMXRegister, Imm8> for PSRAW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSRAW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE1); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSRAW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSRAW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSRAW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSRAW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSRLD | |
| /// Shift Packed Doubleword Data Right Logical | |
| pub struct PSRLD {} | |
| impl Ins2x<MMXRegister, Imm8> for PSRLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSRLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSRLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSRLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x72); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSRLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSRLD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSRLDQ | |
| /// Shift Packed Double Quadword Right Logical | |
| pub struct PSRLDQ {} | |
| impl Ins2x<XMMRegister, Imm8> for PSRLDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x73); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSRLQ | |
| /// Shift Packed Quadword Data Right Logical | |
| pub struct PSRLQ {} | |
| impl Ins2x<MMXRegister, Imm8> for PSRLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSRLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSRLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSRLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x73); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSRLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSRLQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSRLW | |
| /// Shift Packed Word Data Right Logical | |
| pub struct PSRLW {} | |
| impl Ins2x<MMXRegister, Imm8> for PSRLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, MMXRegister> for PSRLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSRLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Imm8> for PSRLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x71); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSRLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSRLW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBB | |
| /// Subtract Packed Byte Integers | |
| pub struct PSUBB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF8); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBD | |
| /// Subtract Packed Doubleword Integers | |
| pub struct PSUBD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFA); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBQ | |
| /// Subtract Packed Quadword Integers | |
| pub struct PSUBQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFB); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xFB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xFB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBSB | |
| /// Subtract Packed Signed Byte Integers with Signed Saturation | |
| pub struct PSUBSB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE8); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBSW | |
| /// Subtract Packed Signed Word Integers with Signed Saturation | |
| pub struct PSUBSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE9); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xE9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xE9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBUSB | |
| /// Subtract Packed Unsigned Byte Integers with Unsigned Saturation | |
| pub struct PSUBUSB {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD8); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBUSB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBUSW | |
| /// Subtract Packed Unsigned Word Integers with Unsigned Saturation | |
| pub struct PSUBUSW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD9); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xD9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBUSW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xD9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSUBW | |
| /// Subtract Packed Word Integers | |
| pub struct PSUBW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF9); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xF9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PSUBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xF9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PSWAPD | |
| /// Packed Swap Doubleword | |
| pub struct PSWAPD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PSWAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PSWAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PTEST | |
| /// Packed Logical Compare | |
| pub struct PTEST {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PTEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PTEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x17); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKHBW | |
| /// Unpack and Interleave High-Order Bytes into Words | |
| pub struct PUNPCKHBW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PUNPCKHBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PUNPCKHBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKHBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKHBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x68); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKHDQ | |
| /// Unpack and Interleave High-Order Doublewords into Quadwords | |
| pub struct PUNPCKHDQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PUNPCKHDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6A); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PUNPCKHDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKHDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKHDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKHQDQ | |
| /// Unpack and Interleave High-Order Quadwords into Double Quadwords | |
| pub struct PUNPCKHQDQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKHQDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6D); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKHQDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKHWD | |
| /// Unpack and Interleave High-Order Words into Doublewords | |
| pub struct PUNPCKHWD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PUNPCKHWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PUNPCKHWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKHWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKHWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x69); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKLBW | |
| /// Unpack and Interleave Low-Order Bytes into Words | |
| pub struct PUNPCKLBW {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PUNPCKLBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x60); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory32> for PUNPCKLBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x60); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKLBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x60); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKLBW { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x60); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKLDQ | |
| /// Unpack and Interleave Low-Order Doublewords into Quadwords | |
| pub struct PUNPCKLDQ {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PUNPCKLDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x62); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory32> for PUNPCKLDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x62); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKLDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x62); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKLDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x62); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKLQDQ | |
| /// Unpack and Interleave Low-Order Quadwords into Double Quadwords | |
| pub struct PUNPCKLQDQ {} | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKLQDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x6C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKLQDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x6C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUNPCKLWD | |
| /// Unpack and Interleave Low-Order Words into Doublewords | |
| pub struct PUNPCKLWD {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PUNPCKLWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x61); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory32> for PUNPCKLWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x61); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PUNPCKLWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x61); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PUNPCKLWD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x61); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PUSH | |
| /// Push Value Onto the Stack | |
| pub struct PUSH {} | |
| impl Ins1x<Imm8> for PUSH { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Imm8) { | |
| bytes.push(0x6A); | |
| } | |
| } | |
| impl Ins1x<Imm32> for PUSH { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Imm32) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins1x<GPRegister16> for PUSH { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x50); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for PUSH { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x50); | |
| } | |
| } | |
| impl Ins1x<Memory16> for PUSH { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| impl Ins1x<Memory64> for PUSH { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory64) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xFF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// PXOR | |
| /// Packed Bitwise Logical Exclusive OR | |
| pub struct PXOR {} | |
| impl Ins2x<MMXRegister, MMXRegister> for PXOR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: MMXRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEF); | |
| } | |
| } | |
| impl Ins2x<MMXRegister, Memory64> for PXOR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: MMXRegister, arg1: Memory64) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEF); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for PXOR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xEF); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for PXOR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xEF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RCL | |
| /// Rotate Left through Carry Flag | |
| pub struct RCL {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for RCL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RCPPS | |
| /// Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values | |
| pub struct RCPPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for RCPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x53); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for RCPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x53); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RCPSS | |
| /// Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values | |
| pub struct RCPSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for RCPSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x53); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for RCPSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x53); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RCR | |
| /// Rotate Right through Carry Flag | |
| pub struct RCR {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for RCR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RDRAND | |
| /// Read Random Number | |
| pub struct RDRAND {} | |
| impl Ins1x<GPRegister16> for RDRAND { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for RDRAND { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for RDRAND { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RDSEED | |
| /// Read Random SEED | |
| pub struct RDSEED {} | |
| impl Ins1x<GPRegister16> for RDSEED { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins1x<GPRegister32> for RDSEED { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| impl Ins1x<GPRegister64> for RDSEED { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister64) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RDTSC | |
| /// Read Time-Stamp Counter | |
| pub struct RDTSC {} | |
| impl Ins0x for RDTSC { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0x31); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RDTSCP | |
| /// Read Time-Stamp Counter and Processor ID | |
| pub struct RDTSCP {} | |
| impl Ins0x for RDTSCP { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RET | |
| /// Return from Procedure | |
| pub struct RET {} | |
| impl Ins0x for RET { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xC3); | |
| } | |
| } | |
| impl Ins1x<Imm16> for RET { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Imm16) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ROL | |
| /// Rotate Left | |
| pub struct ROL {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for ROL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ROR | |
| /// Rotate Right | |
| pub struct ROR {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for ROR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RORX | |
| /// Rotate Right Logical Without Affecting Flags | |
| pub struct RORX {} | |
| impl Ins3x<GPRegister32, GPRegister32, Imm8> for RORX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, Imm8> for RORX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Imm8> for RORX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, Imm8> for RORX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ROUNDPD | |
| /// Round Packed Double Precision Floating-Point Values | |
| pub struct ROUNDPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for ROUNDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for ROUNDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ROUNDPS | |
| /// Round Packed Single Precision Floating-Point Values | |
| pub struct ROUNDPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for ROUNDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for ROUNDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ROUNDSD | |
| /// Round Scalar Double Precision Floating-Point Values | |
| pub struct ROUNDSD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for ROUNDSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory64, Imm8> for ROUNDSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// ROUNDSS | |
| /// Round Scalar Single Precision Floating-Point Values | |
| pub struct ROUNDSS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for ROUNDSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory32, Imm8> for ROUNDSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RSQRTPS | |
| /// Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values | |
| pub struct RSQRTPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for RSQRTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x52); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for RSQRTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x52); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// RSQRTSS | |
| /// Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value | |
| pub struct RSQRTSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for RSQRTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x52); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for RSQRTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x52); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SAL | |
| /// Arithmetic Shift Left | |
| pub struct SAL {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SAL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SAR | |
| /// Arithmetic Shift Right | |
| pub struct SAR {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SAR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SARX | |
| /// Arithmetic Shift Right Without Affecting Flags | |
| pub struct SARX {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for SARX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, GPRegister32> for SARX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for SARX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, GPRegister64> for SARX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SBB | |
| /// Subtract with Borrow | |
| pub struct SBB {} | |
| impl Ins2x<HardCodedOp, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0x1C); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1A); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1B); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1B); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x1B); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for SBB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x19); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETA | |
| /// Set byte if above (CF == 0 and ZF == 0) | |
| pub struct SETA {} | |
| impl Ins1x<GPRegister8> for SETA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x97); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETAE | |
| /// Set byte if above or equal (CF == 0) | |
| pub struct SETAE {} | |
| impl Ins1x<GPRegister8> for SETAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x93); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETB | |
| /// Set byte if below (CF == 1) | |
| pub struct SETB {} | |
| impl Ins1x<GPRegister8> for SETB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x92); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETBE | |
| /// Set byte if below or equal (CF == 1 or ZF == 1) | |
| pub struct SETBE {} | |
| impl Ins1x<GPRegister8> for SETBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x96); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETC | |
| /// Set byte if carry (CF == 1) | |
| pub struct SETC {} | |
| impl Ins1x<GPRegister8> for SETC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x92); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETE | |
| /// Set byte if equal (ZF == 1) | |
| pub struct SETE {} | |
| impl Ins1x<GPRegister8> for SETE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x94); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x94); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETG | |
| /// Set byte if greater (ZF == 0 and SF == OF) | |
| pub struct SETG {} | |
| impl Ins1x<GPRegister8> for SETG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETGE | |
| /// Set byte if greater or equal (SF == OF) | |
| pub struct SETGE {} | |
| impl Ins1x<GPRegister8> for SETGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETL | |
| /// Set byte if less (SF != OF) | |
| pub struct SETL {} | |
| impl Ins1x<GPRegister8> for SETL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETLE | |
| /// Set byte if less or equal (ZF == 1 or SF != OF) | |
| pub struct SETLE {} | |
| impl Ins1x<GPRegister8> for SETLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNA | |
| /// Set byte if not above (CF == 1 or ZF == 1) | |
| pub struct SETNA {} | |
| impl Ins1x<GPRegister8> for SETNA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNA { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x96); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNAE | |
| /// Set byte if not above or equal (CF == 1) | |
| pub struct SETNAE {} | |
| impl Ins1x<GPRegister8> for SETNAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNAE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x92); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNB | |
| /// Set byte if not below (CF == 0) | |
| pub struct SETNB {} | |
| impl Ins1x<GPRegister8> for SETNB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNB { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x93); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNBE | |
| /// Set byte if not below or equal (CF == 0 and ZF == 0) | |
| pub struct SETNBE {} | |
| impl Ins1x<GPRegister8> for SETNBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNBE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x97); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNC | |
| /// Set byte if not carry (CF == 0) | |
| pub struct SETNC {} | |
| impl Ins1x<GPRegister8> for SETNC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNC { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x93); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNE | |
| /// Set byte if not equal (ZF == 0) | |
| pub struct SETNE {} | |
| impl Ins1x<GPRegister8> for SETNE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x95); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x95); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNG | |
| /// Set byte if not greater (ZF == 1 or SF != OF) | |
| pub struct SETNG {} | |
| impl Ins1x<GPRegister8> for SETNG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNG { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNGE | |
| /// Set byte if not greater or equal (SF != OF) | |
| pub struct SETNGE {} | |
| impl Ins1x<GPRegister8> for SETNGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNGE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNL | |
| /// Set byte if not less (SF == OF) | |
| pub struct SETNL {} | |
| impl Ins1x<GPRegister8> for SETNL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNL { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNLE | |
| /// Set byte if not less or equal (ZF == 0 and SF == OF) | |
| pub struct SETNLE {} | |
| impl Ins1x<GPRegister8> for SETNLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNLE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNO | |
| /// Set byte if not overflow (OF == 0) | |
| pub struct SETNO {} | |
| impl Ins1x<GPRegister8> for SETNO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x91); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x91); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNP | |
| /// Set byte if not parity (PF == 0) | |
| pub struct SETNP {} | |
| impl Ins1x<GPRegister8> for SETNP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNS | |
| /// Set byte if not sign (SF == 0) | |
| pub struct SETNS {} | |
| impl Ins1x<GPRegister8> for SETNS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETNZ | |
| /// Set byte if not zero (ZF == 0) | |
| pub struct SETNZ {} | |
| impl Ins1x<GPRegister8> for SETNZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x95); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETNZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x95); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETO | |
| /// Set byte if overflow (OF == 1) | |
| pub struct SETO {} | |
| impl Ins1x<GPRegister8> for SETO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x90); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x90); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETP | |
| /// Set byte if parity (PF == 1) | |
| pub struct SETP {} | |
| impl Ins1x<GPRegister8> for SETP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETP { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETPE | |
| /// Set byte if parity even (PF == 1) | |
| pub struct SETPE {} | |
| impl Ins1x<GPRegister8> for SETPE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETPE { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETPO | |
| /// Set byte if parity odd (PF == 0) | |
| pub struct SETPO {} | |
| impl Ins1x<GPRegister8> for SETPO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETPO { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x9B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETS | |
| /// Set byte if sign (SF == 1) | |
| pub struct SETS {} | |
| impl Ins1x<GPRegister8> for SETS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SETZ | |
| /// Set byte if zero (ZF == 1) | |
| pub struct SETZ {} | |
| impl Ins1x<GPRegister8> for SETZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: GPRegister8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x94); | |
| } | |
| } | |
| impl Ins1x<Memory8> for SETZ { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x94); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SFENCE | |
| /// Store Fence | |
| pub struct SFENCE {} | |
| impl Ins0x for SFENCE { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA1MSG1 | |
| /// Perform an Intermediate Calculation for the Next Four SHA1 Message Doublewords | |
| pub struct SHA1MSG1 {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SHA1MSG1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC9); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SHA1MSG1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA1MSG2 | |
| /// Perform a Final Calculation for the Next Four SHA1 Message Doublewords | |
| pub struct SHA1MSG2 {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SHA1MSG2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xCA); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SHA1MSG2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xCA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA1NEXTE | |
| /// Calculate SHA1 State Variable E after Four Rounds | |
| pub struct SHA1NEXTE {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SHA1NEXTE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC8); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SHA1NEXTE { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA1RNDS4 | |
| /// Perform Four Rounds of SHA1 Operation | |
| pub struct SHA1RNDS4 {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for SHA1RNDS4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xCC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for SHA1RNDS4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xCC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA256MSG1 | |
| /// Perform an Intermediate Calculation for the Next Four SHA256 Message Doublewords | |
| pub struct SHA256MSG1 {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SHA256MSG1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xCC); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SHA256MSG1 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xCC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA256MSG2 | |
| /// Perform a Final Calculation for the Next Four SHA256 Message Doublewords | |
| pub struct SHA256MSG2 {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SHA256MSG2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xCD); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SHA256MSG2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xCD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHA256RNDS2 | |
| /// Perform Two Rounds of SHA256 Operation | |
| pub struct SHA256RNDS2 {} | |
| impl Ins3x<XMMRegister, XMMRegister, HardCodedOp> for SHA256RNDS2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: HardCodedOp) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xCB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, HardCodedOp> for SHA256RNDS2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: HardCodedOp) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xCB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHL | |
| /// Logical Shift Left | |
| pub struct SHL {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SHL { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHLD | |
| /// Integer Double Precision Shift Left | |
| pub struct SHLD {} | |
| impl Ins3x<GPRegister16, GPRegister16, Imm8> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins3x<GPRegister16, GPRegister16, HardCodedOp> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xA5); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Imm8> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, HardCodedOp> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: HardCodedOp) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xA5); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Imm8> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, HardCodedOp> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: HardCodedOp) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xA5); | |
| } | |
| } | |
| impl Ins3x<Memory16, GPRegister16, Imm8> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins3x<Memory16, GPRegister16, HardCodedOp> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA5); | |
| } | |
| } | |
| impl Ins3x<Memory32, GPRegister32, Imm8> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins3x<Memory32, GPRegister32, HardCodedOp> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32, arg2: HardCodedOp) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA5); | |
| } | |
| } | |
| impl Ins3x<Memory64, GPRegister64, Imm8> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA4); | |
| } | |
| } | |
| impl Ins3x<Memory64, GPRegister64, HardCodedOp> for SHLD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64, arg2: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xA5); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHLX | |
| /// Logical Shift Left Without Affecting Flags | |
| pub struct SHLX {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for SHLX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, GPRegister32> for SHLX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for SHLX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, GPRegister64> for SHLX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHR | |
| /// Logical Shift Right | |
| pub struct SHR {} | |
| impl Ins2x<GPRegister8, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: HardCodedOp) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC0); | |
| } | |
| } | |
| impl Ins2x<Memory8, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD2); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory16, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory32, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: HardCodedOp) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD1); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xC1); | |
| } | |
| } | |
| impl Ins2x<Memory64, HardCodedOp> for SHR { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xD3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHRD | |
| /// Integer Double Precision Shift Right | |
| pub struct SHRD {} | |
| impl Ins3x<GPRegister16, GPRegister16, Imm8> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<GPRegister16, GPRegister16, HardCodedOp> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, Imm8> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, GPRegister32, HardCodedOp> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32, arg2: HardCodedOp) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, Imm8> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, HardCodedOp> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64, arg2: HardCodedOp) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<Memory16, GPRegister16, Imm8> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<Memory16, GPRegister16, HardCodedOp> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16, arg2: HardCodedOp) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<Memory32, GPRegister32, Imm8> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32, arg2: Imm8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<Memory32, GPRegister32, HardCodedOp> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32, arg2: HardCodedOp) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<Memory64, GPRegister64, Imm8> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64, arg2: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<Memory64, GPRegister64, HardCodedOp> for SHRD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64, arg2: HardCodedOp) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHRX | |
| /// Logical Shift Right Without Affecting Flags | |
| pub struct SHRX {} | |
| impl Ins3x<GPRegister32, GPRegister32, GPRegister32> for SHRX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: GPRegister32, | |
| arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, Memory32, GPRegister32> for SHRX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32, arg2: GPRegister32) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, GPRegister64, GPRegister64> for SHRX { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: GPRegister64, | |
| arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, Memory64, GPRegister64> for SHRX { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64, arg2: GPRegister64) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHUFPD | |
| /// Shuffle Packed Double-Precision Floating-Point Values | |
| pub struct SHUFPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for SHUFPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for SHUFPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SHUFPS | |
| /// Shuffle Packed Single-Precision Floating-Point Values | |
| pub struct SHUFPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for SHUFPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xC6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for SHUFPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xC6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SQRTPD | |
| /// Compute Square Roots of Packed Double-Precision Floating-Point Values | |
| pub struct SQRTPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SQRTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x51); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SQRTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x51); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SQRTPS | |
| /// Compute Square Roots of Packed Single-Precision Floating-Point Values | |
| pub struct SQRTPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SQRTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x51); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SQRTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x51); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SQRTSD | |
| /// Compute Square Root of Scalar Double-Precision Floating-Point Value | |
| pub struct SQRTSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SQRTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x51); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for SQRTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x51); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SQRTSS | |
| /// Compute Square Root of Scalar Single-Precision Floating-Point Value | |
| pub struct SQRTSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SQRTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x51); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for SQRTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x51); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// STC | |
| /// Set Carry Flag | |
| pub struct STC {} | |
| impl Ins0x for STC { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xF9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// STD | |
| /// Set Direction Flag | |
| pub struct STD {} | |
| impl Ins0x for STD { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xFD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// STMXCSR | |
| /// Store MXCSR Register State | |
| pub struct STMXCSR {} | |
| impl Ins1x<Memory32> for STMXCSR { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xAE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SUB | |
| /// Subtract | |
| pub struct SUB {} | |
| impl Ins2x<HardCodedOp, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Memory8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Memory8) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm8) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm8) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm8> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm8) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for SUB { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x29); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SUBPD | |
| /// Subtract Packed Double-Precision Floating-Point Values | |
| pub struct SUBPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SUBPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SUBPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SUBPS | |
| /// Subtract Packed Single-Precision Floating-Point Values | |
| pub struct SUBPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SUBPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for SUBPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SUBSD | |
| /// Subtract Scalar Double-Precision Floating-Point Values | |
| pub struct SUBSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SUBSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for SUBSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xF2); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// SUBSS | |
| /// Subtract Scalar Single-Precision Floating-Point Values | |
| pub struct SUBSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for SUBSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for SUBSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x5C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// T1MSKC | |
| /// Inverse Mask From Trailing Ones | |
| pub struct T1MSKC {} | |
| impl Ins2x<GPRegister32, GPRegister32> for T1MSKC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for T1MSKC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for T1MSKC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for T1MSKC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// TEST | |
| /// Logical Compare | |
| pub struct TEST {} | |
| impl Ins2x<HardCodedOp, Imm8> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm8) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, Imm8> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<GPRegister8, GPRegister8> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x84); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm16> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Imm16> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, GPRegister16> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x85); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Imm32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0); | |
| bytes.push(0x85); | |
| } | |
| } | |
| impl Ins2x<HardCodedOp, Imm32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: HardCodedOp, arg1: Imm32) { | |
| bytes.push(0x48); | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Imm32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Imm32) { | |
| bytes.push(|0x48| arg0.hcode()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(|0x48| arg1.hcode() << 2 | arg0.hcode()); | |
| bytes.push(0x85); | |
| } | |
| } | |
| impl Ins2x<Memory8, Imm8> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: Imm8) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF6); | |
| } | |
| } | |
| impl Ins2x<Memory8, GPRegister8> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory8, arg1: GPRegister8) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x84); | |
| } | |
| } | |
| impl Ins2x<Memory16, Imm16> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: Imm16) { | |
| bytes.push(0x66); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<Memory16, GPRegister16> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory16, arg1: GPRegister16) { | |
| bytes.push(0x66); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x85); | |
| } | |
| } | |
| impl Ins2x<Memory32, Imm32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: Imm32) { | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<Memory32, GPRegister32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: GPRegister32) { | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x85); | |
| } | |
| } | |
| impl Ins2x<Memory64, Imm32> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: Imm32) { | |
| bytes.push(0b1); | |
| bytes.push(0b0); | |
| bytes.push(arg0.address()); | |
| bytes.push(0xF7); | |
| } | |
| } | |
| impl Ins2x<Memory64, GPRegister64> for TEST { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: GPRegister64) { | |
| bytes.push(0b1); | |
| bytes.push(arg1.hcode()); | |
| bytes.push(arg0.address()); | |
| bytes.push(0x85); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// TZCNT | |
| /// Count the Number of Trailing Zero Bits | |
| pub struct TZCNT {} | |
| impl Ins2x<GPRegister16, GPRegister16> for TZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: GPRegister16) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister16, Memory16> for TZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister16, arg1: Memory16) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, GPRegister32> for TZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for TZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0xF3); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for TZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0xF3); | |
| bytes.push(|0x48| arg0.hcode() << 2 | arg1.hcode()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for TZCNT { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0xF3); | |
| bytes.push(0b1); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0xBC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// TZMSK | |
| /// Mask From Trailing Zeros | |
| pub struct TZMSK {} | |
| impl Ins2x<GPRegister32, GPRegister32> for TZMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: GPRegister32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for TZMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, GPRegister64> for TZMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: GPRegister64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for TZMSK { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x1); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UCOMISD | |
| /// Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS | |
| pub struct UCOMISD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for UCOMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for UCOMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UCOMISS | |
| /// Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS | |
| pub struct UCOMISS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for UCOMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x2E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for UCOMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x2E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UD2 | |
| /// Undefined Instruction | |
| pub struct UD2 {} | |
| impl Ins0x for UD2 { | |
| pub fn ins0x(runtime: &JitRuntime) { | |
| bytes.push(0xB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UNPCKHPD | |
| /// Unpack and Interleave High Packed Double-Precision Floating-Point Values | |
| pub struct UNPCKHPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for UNPCKHPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for UNPCKHPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x15); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UNPCKHPS | |
| /// Unpack and Interleave High Packed Single-Precision Floating-Point Values | |
| pub struct UNPCKHPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for UNPCKHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x15); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for UNPCKHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x15); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UNPCKLPD | |
| /// Unpack and Interleave Low Packed Double-Precision Floating-Point Values | |
| pub struct UNPCKLPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for UNPCKLPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x14); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for UNPCKLPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x66); | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x14); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// UNPCKLPS | |
| /// Unpack and Interleave Low Packed Single-Precision Floating-Point Values | |
| pub struct UNPCKLPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for UNPCKLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1); | |
| bytes.push(0x14); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for UNPCKLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(arg0.hcode()); | |
| bytes.push(arg1.address()); | |
| bytes.push(0x14); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VADDPD | |
| /// Add Packed Double-Precision Floating-Point Values | |
| pub struct VADDPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VADDPS | |
| /// Add Packed Single-Precision Floating-Point Values | |
| pub struct VADDPS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VADDSD | |
| /// Add Scalar Double-Precision Floating-Point Values | |
| pub struct VADDSD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VADDSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VADDSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VADDSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VADDSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VADDSS | |
| /// Add Scalar Single-Precision Floating-Point Values | |
| pub struct VADDSS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VADDSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VADDSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VADDSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VADDSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x58); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VADDSUBPD | |
| /// Packed Double-FP Add/Subtract | |
| pub struct VADDSUBPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VADDSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VADDSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VADDSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VADDSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VADDSUBPS | |
| /// Packed Single-FP Add/Subtract | |
| pub struct VADDSUBPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VADDSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VADDSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VADDSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VADDSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xD0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VAESDEC | |
| /// Perform One Round of an AES Decryption Flow | |
| pub struct VAESDEC {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VAESDEC { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xDE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VAESDEC { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xDE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VAESDECLAST | |
| /// Perform Last Round of an AES Decryption Flow | |
| pub struct VAESDECLAST {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VAESDECLAST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VAESDECLAST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xDF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VAESENC | |
| /// Perform One Round of an AES Encryption Flow | |
| pub struct VAESENC {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VAESENC { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xDC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VAESENC { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xDC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VAESENCLAST | |
| /// Perform Last Round of an AES Encryption Flow | |
| pub struct VAESENCLAST {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VAESENCLAST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xDD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VAESENCLAST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xDD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VAESIMC | |
| /// Perform the AES InvMixColumn Transformation | |
| pub struct VAESIMC {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VAESIMC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xDB); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VAESIMC { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xDB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VAESKEYGENASSIST | |
| /// AES Round Key Generation Assist | |
| pub struct VAESKEYGENASSIST {} | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for VAESKEYGENASSIST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0xDF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, Memory128, Imm8> for VAESKEYGENASSIST { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128, arg2: Imm8) { | |
| bytes.push(0xDF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VALIGND | |
| /// Align Doubleword Vectors | |
| pub struct VALIGND {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, BroadcastM128M32, Imm8> for VALIGND { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VALIGND { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, BroadcastM256M32, Imm8> for VALIGND { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, YMMRegister, Imm8> for VALIGND { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32, Imm8> for VALIGND { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, Imm8> for VALIGND { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VALIGNQ | |
| /// Align Quadword Vectors | |
| pub struct VALIGNQ {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, BroadcastM128M64, Imm8> for VALIGNQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VALIGNQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, BroadcastM256M64, Imm8> for VALIGNQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, YMMRegister, Imm8> for VALIGNQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64, Imm8> for VALIGNQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, Imm8> for VALIGNQ { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VANDNPD | |
| /// Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values | |
| pub struct VANDNPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VANDNPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VANDNPS | |
| /// Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values | |
| pub struct VANDNPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VANDNPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VANDNPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VANDNPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VANDNPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VANDPD | |
| /// Bitwise Logical AND of Packed Double-Precision Floating-Point Values | |
| pub struct VANDPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VANDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VANDPS | |
| /// Bitwise Logical AND of Packed Single-Precision Floating-Point Values | |
| pub struct VANDPS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VANDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBLENDMPD | |
| /// Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control | |
| pub struct VBLENDMPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VBLENDMPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VBLENDMPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VBLENDMPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VBLENDMPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VBLENDMPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VBLENDMPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBLENDMPS | |
| /// Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control | |
| pub struct VBLENDMPS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VBLENDMPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VBLENDMPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VBLENDMPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VBLENDMPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VBLENDMPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VBLENDMPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x65); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBLENDPD | |
| /// Blend Packed Double Precision Floating-Point Values | |
| pub struct VBLENDPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VBLENDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VBLENDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Imm8> for VBLENDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xD); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, Imm8> for VBLENDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0xD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBLENDPS | |
| /// Blend Packed Single Precision Floating-Point Values | |
| pub struct VBLENDPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VBLENDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VBLENDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0xC); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Imm8> for VBLENDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, Imm8> for VBLENDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0xC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBLENDVPD | |
| /// Variable Blend Packed Double Precision Floating-Point Values | |
| pub struct VBLENDVPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VBLENDVPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VBLENDVPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VBLENDVPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VBLENDVPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x4B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBLENDVPS | |
| /// Variable Blend Packed Single Precision Floating-Point Values | |
| pub struct VBLENDVPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VBLENDVPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VBLENDVPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VBLENDVPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VBLENDVPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x4A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTF128 | |
| /// Broadcast 128 Bit of Floating-Point Data | |
| pub struct VBROADCASTF128 {} | |
| impl Ins2x<YMMRegister, Memory128> for VBROADCASTF128 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory128) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTF32X2 | |
| /// Broadcast Two Single-Precision Floating-Point Elements | |
| pub struct VBROADCASTF32X2 {} | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VBROADCASTF32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, XMMRegister> for VBROADCASTF32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory64> for VBROADCASTF32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory64> for VBROADCASTF32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTF32X4 | |
| /// Broadcast Four Single-Precision Floating-Point Elements | |
| pub struct VBROADCASTF32X4 {} | |
| impl Ins2x<YMMRegisterKZ, Memory128> for VBROADCASTF32X4 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory128> for VBROADCASTF32X4 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTF32X8 | |
| /// Broadcast Eight Single-Precision Floating-Point Elements | |
| pub struct VBROADCASTF32X8 {} | |
| impl Ins2x<ZMMRegisterKZ, Memory256> for VBROADCASTF32X8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x1B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTF64X2 | |
| /// Broadcast Two Double-Precision Floating-Point Elements | |
| pub struct VBROADCASTF64X2 {} | |
| impl Ins2x<YMMRegisterKZ, Memory128> for VBROADCASTF64X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory128> for VBROADCASTF64X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTF64X4 | |
| /// Broadcast Four Double-Precision Floating-Point Elements | |
| pub struct VBROADCASTF64X4 {} | |
| impl Ins2x<ZMMRegisterKZ, Memory256> for VBROADCASTF64X4 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x1B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTI128 | |
| /// Broadcast 128 Bits of Integer Data | |
| pub struct VBROADCASTI128 {} | |
| impl Ins2x<YMMRegister, Memory128> for VBROADCASTI128 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTI32X2 | |
| /// Broadcast Two Doubleword Elements | |
| pub struct VBROADCASTI32X2 {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VBROADCASTI32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VBROADCASTI32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, XMMRegister> for VBROADCASTI32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory64> for VBROADCASTI32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory64> for VBROADCASTI32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x59); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory64> for VBROADCASTI32X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x59); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTI32X4 | |
| /// Broadcast Four Doubleword Elements | |
| pub struct VBROADCASTI32X4 {} | |
| impl Ins2x<YMMRegisterKZ, Memory128> for VBROADCASTI32X4 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory128> for VBROADCASTI32X4 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTI32X8 | |
| /// Broadcast Eight Doubleword Elements | |
| pub struct VBROADCASTI32X8 {} | |
| impl Ins2x<ZMMRegisterKZ, Memory256> for VBROADCASTI32X8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTI64X2 | |
| /// Broadcast Two Quadword Elements | |
| pub struct VBROADCASTI64X2 {} | |
| impl Ins2x<YMMRegisterKZ, Memory128> for VBROADCASTI64X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory128> for VBROADCASTI64X2 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTI64X4 | |
| /// Broadcast Four Quadword Elements | |
| pub struct VBROADCASTI64X4 {} | |
| impl Ins2x<ZMMRegisterKZ, Memory256> for VBROADCASTI64X4 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTSD | |
| /// Broadcast Double-Precision Floating-Point Element | |
| pub struct VBROADCASTSD {} | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VBROADCASTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, XMMRegister> for VBROADCASTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory64> for VBROADCASTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory64> for VBROADCASTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, XMMRegister> for VBROADCASTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory64> for VBROADCASTSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory64) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VBROADCASTSS | |
| /// Broadcast Single-Precision Floating-Point Element | |
| pub struct VBROADCASTSS {} | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, XMMRegister> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory32> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory32) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory32> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory32) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, XMMRegister> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory32> for VBROADCASTSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory32) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCMPPD | |
| /// Compare Packed Double-Precision Floating-Point Values | |
| pub struct VCMPPD {} | |
| impl Ins4x<KRegisterK, XMMRegister, BroadcastM128M64, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, XMMRegister, XMMRegister, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, YMMRegister, BroadcastM256M64, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, YMMRegister, YMMRegister, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, ZMMRegister, BroadcastM512M64, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, ZMMRegister, ZMMRegister, Imm8> for VCMPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins5x<KRegisterK, ZMMRegister, ZMMRegister, SuppressAllExceptions, Imm8> for VCMPPD { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCMPPS | |
| /// Compare Packed Single-Precision Floating-Point Values | |
| pub struct VCMPPS {} | |
| impl Ins4x<KRegisterK, XMMRegister, BroadcastM128M32, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, XMMRegister, XMMRegister, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, YMMRegister, BroadcastM256M32, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, YMMRegister, YMMRegister, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, ZMMRegister, BroadcastM512M32, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, ZMMRegister, ZMMRegister, Imm8> for VCMPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins5x<KRegisterK, ZMMRegister, ZMMRegister, SuppressAllExceptions, Imm8> for VCMPPS { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCMPSD | |
| /// Compare Scalar Double-Precision Floating-Point Values | |
| pub struct VCMPSD {} | |
| impl Ins4x<KRegisterK, XMMRegister, Memory64, Imm8> for VCMPSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VCMPSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory64, Imm8> for VCMPSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, XMMRegister, XMMRegister, Imm8> for VCMPSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins5x<KRegisterK, XMMRegister, XMMRegister, SuppressAllExceptions, Imm8> for VCMPSD { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCMPSS | |
| /// Compare Scalar Single-Precision Floating-Point Values | |
| pub struct VCMPSS {} | |
| impl Ins4x<KRegisterK, XMMRegister, Memory32, Imm8> for VCMPSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VCMPSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, Imm8> for VCMPSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins4x<KRegisterK, XMMRegister, XMMRegister, Imm8> for VCMPSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| impl Ins5x<KRegisterK, XMMRegister, XMMRegister, SuppressAllExceptions, Imm8> for VCMPSS { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: KRegisterK, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0xC2); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCOMISD | |
| /// Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS | |
| pub struct VCOMISD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VCOMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VCOMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VCOMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCOMISD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, SuppressAllExceptions> for VCOMISD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCOMISS | |
| /// Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS | |
| pub struct VCOMISS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VCOMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VCOMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VCOMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCOMISS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, SuppressAllExceptions> for VCOMISS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCOMPRESSPD | |
| /// Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register | |
| pub struct VCOMPRESSPD {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCOMPRESSPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<Memory128KZ, XMMRegister> for VCOMPRESSPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCOMPRESSPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VCOMPRESSPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCOMPRESSPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VCOMPRESSPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCOMPRESSPS | |
| /// Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register | |
| pub struct VCOMPRESSPS {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCOMPRESSPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<Memory128KZ, XMMRegister> for VCOMPRESSPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCOMPRESSPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VCOMPRESSPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCOMPRESSPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VCOMPRESSPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x8A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTDQ2PD | |
| /// Convert Packed Dword Integers to Packed Double-Precision FP Values | |
| pub struct VCVTDQ2PD {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, XMMRegister> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory128> for VCVTDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory128) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTDQ2PS | |
| /// Convert Packed Dword Integers to Packed Single-Precision FP Values | |
| pub struct VCVTDQ2PS {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTDQ2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPD2DQ | |
| /// Convert Packed Double-Precision FP Values to Packed Dword Integers | |
| pub struct VCVTPD2DQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, YMMRegister> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: YMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory256> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory256) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPD2DQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPD2PS | |
| /// Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values | |
| pub struct VCVTPD2PS {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, YMMRegister> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory256> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory256) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTPD2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPD2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPD2QQ | |
| /// Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers | |
| pub struct VCVTPD2QQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VCVTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VCVTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPD2QQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPD2UDQ | |
| /// Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers | |
| pub struct VCVTPD2UDQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPD2UDQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPD2UQQ | |
| /// Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers | |
| pub struct VCVTPD2UQQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VCVTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VCVTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPD2UQQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPH2PS | |
| /// Convert Half-Precision FP Values to Single-Precision FP Values | |
| pub struct VCVTPH2PS {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory64> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory128> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory256> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, XMMRegister> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory128> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory128) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTPH2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, YMMRegister, SuppressAllExceptions> for VCVTPH2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPS2DQ | |
| /// Convert Packed Single-Precision FP Values to Packed Dword Integers | |
| pub struct VCVTPS2DQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPS2DQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPS2PD | |
| /// Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values | |
| pub struct VCVTPS2PD {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, XMMRegister> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory128> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory128) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTPS2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, YMMRegister, SuppressAllExceptions> for VCVTPS2PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPS2PH | |
| /// Convert Single-Precision FP value to Half-Precision FP value | |
| pub struct VCVTPS2PH {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<Memory64KZ, XMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64KZ, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, YMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, YMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<Memory256KZ, ZMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, YMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<Memory64, XMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<Memory128, YMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, Imm8> for VCVTPS2PH { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, ZMMRegister, SuppressAllExceptions, Imm8> for VCVTPS2PH { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions, | |
| arg3: Imm8) { | |
| bytes.push(0x1D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPS2QQ | |
| /// Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values | |
| pub struct VCVTPS2QQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, YMMRegister, RoundingControl> for VCVTPS2QQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPS2UDQ | |
| /// Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values | |
| pub struct VCVTPS2UDQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VCVTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VCVTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VCVTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTPS2UDQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTPS2UQQ | |
| /// Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values | |
| pub struct VCVTPS2UQQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, YMMRegister, RoundingControl> for VCVTPS2UQQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTQQ2PD | |
| /// Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values | |
| pub struct VCVTQQ2PD {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VCVTQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VCVTQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTQQ2PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTQQ2PS | |
| /// Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values | |
| pub struct VCVTQQ2PS {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTQQ2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSD2SI | |
| /// Convert Scalar Double-Precision FP Value to Integer | |
| pub struct VCVTSD2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory64> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory64> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, RoundingControl> for VCVTSD2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, RoundingControl> for VCVTSD2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSD2SS | |
| /// Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value | |
| pub struct VCVTSD2SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VCVTSD2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VCVTSD2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTSD2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VCVTSD2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VCVTSD2SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSD2USI | |
| /// Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer | |
| pub struct VCVTSD2USI {} | |
| impl Ins2x<GPRegister32, Memory64> for VCVTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for VCVTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, RoundingControl> for VCVTSD2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, RoundingControl> for VCVTSD2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSI2SD | |
| /// Convert Dword Integer to Scalar Double-Precision FP Value | |
| pub struct VCVTSI2SD {} | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister32> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister32> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister64> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister64> for VCVTSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, GPRegister64, RoundingControl> for VCVTSI2SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: GPRegister64, | |
| arg3: RoundingControl) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSI2SS | |
| /// Convert Dword Integer to Scalar Single-Precision FP Value | |
| pub struct VCVTSI2SS {} | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister32> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister64> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister32> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister32) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister64> for VCVTSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister64) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, GPRegister32, RoundingControl> for VCVTSI2SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: GPRegister32, | |
| arg3: RoundingControl) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, GPRegister64, RoundingControl> for VCVTSI2SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: GPRegister64, | |
| arg3: RoundingControl) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSS2SD | |
| /// Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value | |
| pub struct VCVTSS2SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VCVTSS2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VCVTSS2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTSS2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VCVTSS2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VCVTSS2SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSS2SI | |
| /// Convert Scalar Single-Precision FP Value to Dword Integer | |
| pub struct VCVTSS2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, RoundingControl> for VCVTSS2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, RoundingControl> for VCVTSS2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTSS2USI | |
| /// Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer | |
| pub struct VCVTSS2USI {} | |
| impl Ins2x<GPRegister32, Memory32> for VCVTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for VCVTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, RoundingControl> for VCVTSS2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, RoundingControl> for VCVTSS2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPD2DQ | |
| /// Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers | |
| pub struct VCVTTPD2DQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, YMMRegister> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: YMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory256> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory256) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTTPD2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VCVTTPD2DQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0xE6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPD2QQ | |
| /// Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers | |
| pub struct VCVTTPD2QQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VCVTTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VCVTTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTTPD2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VCVTTPD2QQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPD2UDQ | |
| /// Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers | |
| pub struct VCVTTPD2UDQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTTPD2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VCVTTPD2UDQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPD2UQQ | |
| /// Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers | |
| pub struct VCVTTPD2UQQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VCVTTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VCVTTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTTPD2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VCVTTPD2UQQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPS2DQ | |
| /// Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers | |
| pub struct VCVTTPS2DQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTTPS2DQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VCVTTPS2DQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x5B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPS2QQ | |
| /// Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values | |
| pub struct VCVTTPS2QQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTTPS2QQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, YMMRegister, SuppressAllExceptions> for VCVTTPS2QQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPS2UDQ | |
| /// Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values | |
| pub struct VCVTTPS2UDQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VCVTTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VCVTTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VCVTTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTTPS2UDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VCVTTPS2UDQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTPS2UQQ | |
| /// Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values | |
| pub struct VCVTTPS2UQQ {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTTPS2UQQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, YMMRegister, SuppressAllExceptions> for VCVTTPS2UQQ { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTSD2SI | |
| /// Convert with Truncation Scalar Double-Precision FP Value to Signed Integer | |
| pub struct VCVTTSD2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory64> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory64> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTTSD2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, SuppressAllExceptions> for VCVTTSD2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, SuppressAllExceptions> for VCVTTSD2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTSD2USI | |
| /// Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer | |
| pub struct VCVTTSD2USI {} | |
| impl Ins2x<GPRegister32, Memory64> for VCVTTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory64> for VCVTTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory64) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTTSD2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, SuppressAllExceptions> for VCVTTSD2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, SuppressAllExceptions> for VCVTTSD2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTSS2SI | |
| /// Convert with Truncation Scalar Single-Precision FP Value to Dword Integer | |
| pub struct VCVTTSS2SI {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, Memory32> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTTSS2SI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, SuppressAllExceptions> for VCVTTSS2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, SuppressAllExceptions> for VCVTTSS2SI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTTSS2USI | |
| /// Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer | |
| pub struct VCVTTSS2USI {} | |
| impl Ins2x<GPRegister32, Memory32> for VCVTTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: Memory32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, Memory32> for VCVTTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: Memory32) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VCVTTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VCVTTSS2USI { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, SuppressAllExceptions> for VCVTTSS2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister32, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins3x<GPRegister64, XMMRegister, SuppressAllExceptions> for VCVTTSS2USI { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: GPRegister64, | |
| arg1: XMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTUDQ2PD | |
| /// Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values | |
| pub struct VCVTUDQ2PD {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM64M32> for VCVTUDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM64M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM128M32> for VCVTUDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM256M32> for VCVTUDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTUDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, XMMRegister> for VCVTUDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, YMMRegister> for VCVTUDQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTUDQ2PS | |
| /// Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values | |
| pub struct VCVTUDQ2PS {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VCVTUDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VCVTUDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VCVTUDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTUDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTUDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTUDQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTUDQ2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTUQQ2PD | |
| /// Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values | |
| pub struct VCVTUQQ2PD {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTUQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VCVTUQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VCVTUQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTUQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VCVTUQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VCVTUQQ2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTUQQ2PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTUQQ2PS | |
| /// Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values | |
| pub struct VCVTUQQ2PS {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VCVTUQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, BroadcastM256M64> for VCVTUQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM512M64> for VCVTUQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VCVTUQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, YMMRegister> for VCVTUQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, ZMMRegister> for VCVTUQQ2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, RoundingControl> for VCVTUQQ2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: RoundingControl) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTUSI2SD | |
| /// Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value | |
| pub struct VCVTUSI2SD {} | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister32> for VCVTUSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTUSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTUSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister64> for VCVTUSI2SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, GPRegister64, RoundingControl> for VCVTUSI2SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: GPRegister64, | |
| arg3: RoundingControl) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VCVTUSI2SS | |
| /// Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value | |
| pub struct VCVTUSI2SS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VCVTUSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VCVTUSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister32> for VCVTUSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister32) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, GPRegister64> for VCVTUSI2SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: GPRegister64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, GPRegister32, RoundingControl> for VCVTUSI2SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: GPRegister32, | |
| arg3: RoundingControl) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, GPRegister64, RoundingControl> for VCVTUSI2SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: GPRegister64, | |
| arg3: RoundingControl) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDBPSADBW | |
| /// Double Block Packed Sum-Absolute-Differences on Unsigned Bytes | |
| pub struct VDBPSADBW {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VDBPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, Memory128, Imm8> for VDBPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, YMMRegister, Imm8> for VDBPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, Memory256, Imm8> for VDBPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, Imm8> for VDBPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory512, Imm8> for VDBPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory512, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDIVPD | |
| /// Divide Packed Double-Precision Floating-Point Values | |
| pub struct VDIVPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VDIVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VDIVPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDIVPS | |
| /// Divide Packed Single-Precision Floating-Point Values | |
| pub struct VDIVPS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VDIVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VDIVPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDIVSD | |
| /// Divide Scalar Double-Precision Floating-Point Values | |
| pub struct VDIVSD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VDIVSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VDIVSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VDIVSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VDIVSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VDIVSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDIVSS | |
| /// Divide Scalar Single-Precision Floating-Point Values | |
| pub struct VDIVSS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VDIVSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VDIVSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VDIVSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VDIVSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VDIVSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDPPD | |
| /// Dot Product of Packed Double Precision Floating-Point Values | |
| pub struct VDPPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VDPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x41); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VDPPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x41); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VDPPS | |
| /// Dot Product of Packed Single Precision Floating-Point Values | |
| pub struct VDPPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VDPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VDPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Imm8> for VDPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x40); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, Imm8> for VDPPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x40); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXP2PD | |
| /// Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error | |
| pub struct VEXP2PD {} | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VEXP2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0xC8); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VEXP2PD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0xC8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VEXP2PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0xC8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXP2PS | |
| /// Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error | |
| pub struct VEXP2PS {} | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VEXP2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0xC8); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VEXP2PS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0xC8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VEXP2PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0xC8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXPANDPD | |
| /// Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory | |
| pub struct VEXPANDPD {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VEXPANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VEXPANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VEXPANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VEXPANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VEXPANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VEXPANDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXPANDPS | |
| /// Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory | |
| pub struct VEXPANDPS {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VEXPANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VEXPANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VEXPANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VEXPANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VEXPANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VEXPANDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x88); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTF128 | |
| /// Extract Packed Floating-Point Values | |
| pub struct VEXTRACTF128 {} | |
| impl Ins3x<XMMRegister, YMMRegister, Imm8> for VEXTRACTF128 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<Memory128, YMMRegister, Imm8> for VEXTRACTF128 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTF32X4 | |
| /// Extract 128 Bits of Packed Single-Precision Floating-Point Values | |
| pub struct VEXTRACTF32X4 {} | |
| impl Ins3x<XMMRegisterKZ, YMMRegister, Imm8> for VEXTRACTF32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, YMMRegister, Imm8> for VEXTRACTF32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTF32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, ZMMRegister, Imm8> for VEXTRACTF32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTF32X8 | |
| /// Extract 256 Bits of Packed Single-Precision Floating-Point Values | |
| pub struct VEXTRACTF32X8 {} | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTF32X8 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x1B); | |
| } | |
| } | |
| impl Ins3x<Memory256KZ, ZMMRegister, Imm8> for VEXTRACTF32X8 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x1B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTF64X2 | |
| /// Extract 128 Bits of Packed Double-Precision Floating-Point Values | |
| pub struct VEXTRACTF64X2 {} | |
| impl Ins3x<XMMRegisterKZ, YMMRegister, Imm8> for VEXTRACTF64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, YMMRegister, Imm8> for VEXTRACTF64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTF64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, ZMMRegister, Imm8> for VEXTRACTF64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x19); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTF64X4 | |
| /// Extract 256 Bits of Packed Double-Precision Floating-Point Values | |
| pub struct VEXTRACTF64X4 {} | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTF64X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x1B); | |
| } | |
| } | |
| impl Ins3x<Memory256KZ, ZMMRegister, Imm8> for VEXTRACTF64X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x1B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTI128 | |
| /// Extract Packed Integer Values | |
| pub struct VEXTRACTI128 {} | |
| impl Ins3x<XMMRegister, YMMRegister, Imm8> for VEXTRACTI128 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<Memory128, YMMRegister, Imm8> for VEXTRACTI128 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTI32X4 | |
| /// Extract 128 Bits of Packed Doubleword Integer Values | |
| pub struct VEXTRACTI32X4 {} | |
| impl Ins3x<XMMRegisterKZ, YMMRegister, Imm8> for VEXTRACTI32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, YMMRegister, Imm8> for VEXTRACTI32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTI32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, ZMMRegister, Imm8> for VEXTRACTI32X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTI32X8 | |
| /// Extract 256 Bits of Packed Doubleword Integer Values | |
| pub struct VEXTRACTI32X8 {} | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTI32X8 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x3B); | |
| } | |
| } | |
| impl Ins3x<Memory256KZ, ZMMRegister, Imm8> for VEXTRACTI32X8 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x3B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTI64X2 | |
| /// Extract 128 Bits of Packed Quadword Integer Values | |
| pub struct VEXTRACTI64X2 {} | |
| impl Ins3x<XMMRegisterKZ, YMMRegister, Imm8> for VEXTRACTI64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, YMMRegister, Imm8> for VEXTRACTI64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTI64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| impl Ins3x<Memory128KZ, ZMMRegister, Imm8> for VEXTRACTI64X2 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x39); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTI64X4 | |
| /// Extract 256 Bits of Packed Quadword Integer Values | |
| pub struct VEXTRACTI64X4 {} | |
| impl Ins3x<YMMRegisterKZ, ZMMRegister, Imm8> for VEXTRACTI64X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x3B); | |
| } | |
| } | |
| impl Ins3x<Memory256KZ, ZMMRegister, Imm8> for VEXTRACTI64X4 { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x3B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VEXTRACTPS | |
| /// Extract Packed Single Precision Floating-Point Value | |
| pub struct VEXTRACTPS {} | |
| impl Ins3x<GPRegister32, XMMRegister, Imm8> for VEXTRACTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins3x<GPRegister32, XMMRegister, Imm8> for VEXTRACTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins3x<Memory32, XMMRegister, Imm8> for VEXTRACTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins3x<Memory32, XMMRegister, Imm8> for VEXTRACTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFIXUPIMMPD | |
| /// Fix Up Special Packed Double-Precision Floating-Point Values | |
| pub struct VFIXUPIMMPD {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, BroadcastM128M64, Imm8> for VFIXUPIMMPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VFIXUPIMMPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, BroadcastM256M64, Imm8> for VFIXUPIMMPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, YMMRegister, Imm8> for VFIXUPIMMPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64, Imm8> for VFIXUPIMMPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, Imm8> for VFIXUPIMMPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins5x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, SuppressAllExceptions, Imm8> for VFIXUPIMMPD { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFIXUPIMMPS | |
| /// Fix Up Special Packed Single-Precision Floating-Point Values | |
| pub struct VFIXUPIMMPS {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, BroadcastM128M32, Imm8> for VFIXUPIMMPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VFIXUPIMMPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, BroadcastM256M32, Imm8> for VFIXUPIMMPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, YMMRegister, Imm8> for VFIXUPIMMPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32, Imm8> for VFIXUPIMMPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, Imm8> for VFIXUPIMMPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| impl Ins5x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, SuppressAllExceptions, Imm8> for VFIXUPIMMPS { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0x54); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFIXUPIMMSD | |
| /// Fix Up Special Scalar Double-Precision Floating-Point Value | |
| pub struct VFIXUPIMMSD {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, Memory64, Imm8> for VFIXUPIMMSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: Imm8) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VFIXUPIMMSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins5x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions, Imm8> for VFIXUPIMMSD { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFIXUPIMMSS | |
| /// Fix Up Special Scalar Single-Precision Floating-Point Value | |
| pub struct VFIXUPIMMSS {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, Memory32, Imm8> for VFIXUPIMMSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: Imm8) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VFIXUPIMMSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| impl Ins5x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions, Imm8> for VFIXUPIMMSS { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0x55); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD132PD | |
| /// Fused Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADD132PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADD132PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD132PS | |
| /// Fused Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADD132PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADD132PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x98); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD132SD | |
| /// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMADD132SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMADD132SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD132SS | |
| /// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMADD132SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMADD132SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x99); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD213PD | |
| /// Fused Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADD213PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADD213PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD213PS | |
| /// Fused Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADD213PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADD213PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD213SD | |
| /// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMADD213SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMADD213SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD213SS | |
| /// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMADD213SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMADD213SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD231PD | |
| /// Fused Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADD231PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADD231PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD231PS | |
| /// Fused Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADD231PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADD231PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB8); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD231SD | |
| /// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMADD231SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMADD231SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADD231SS | |
| /// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMADD231SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMADD231SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB9); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDPD | |
| /// Fused Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADDPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x69); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x69); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDPS | |
| /// Fused Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADDPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x68); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSD | |
| /// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMADDSD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory64> for VFMADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory64) { | |
| bytes.push(0x6B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory64, XMMRegister> for VFMADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSS | |
| /// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMADDSS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory32> for VFMADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory32) { | |
| bytes.push(0x6A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, XMMRegister> for VFMADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUB132PD | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADDSUB132PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADDSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADDSUB132PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUB132PS | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADDSUB132PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADDSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADDSUB132PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x96); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUB213PD | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADDSUB213PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADDSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADDSUB213PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUB213PS | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADDSUB213PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADDSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADDSUB213PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUB231PD | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADDSUB231PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADDSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADDSUB231PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUB231PS | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADDSUB231PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMADDSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMADDSUB231PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUBPD | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMADDSUBPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMADDSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMADDSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMADDSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMADDSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMADDSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMADDSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMADDSUBPS | |
| /// Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMADDSUBPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMADDSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMADDSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMADDSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMADDSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMADDSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x5C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMADDSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB132PD | |
| /// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUB132PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUB132PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB132PS | |
| /// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUB132PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUB132PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB132SD | |
| /// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMSUB132SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMSUB132SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB132SS | |
| /// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMSUB132SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMSUB132SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB213PD | |
| /// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUB213PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUB213PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB213PS | |
| /// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUB213PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUB213PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB213SD | |
| /// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMSUB213SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMSUB213SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB213SS | |
| /// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMSUB213SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMSUB213SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB231PD | |
| /// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUB231PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUB231PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB231PS | |
| /// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUB231PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUB231PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBA); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB231SD | |
| /// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMSUB231SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMSUB231SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUB231SS | |
| /// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMSUB231SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFMSUB231SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBB); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADD132PD | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUBADD132PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUBADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUBADD132PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADD132PS | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUBADD132PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUBADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUBADD132PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x97); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADD213PD | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUBADD213PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUBADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUBADD213PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADD213PS | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUBADD213PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUBADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUBADD213PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xA7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADD231PD | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUBADD231PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUBADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUBADD231PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADD231PS | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUBADD231PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFMSUBADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFMSUBADD231PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xB7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADDPD | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUBADDPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMSUBADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMSUBADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMSUBADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMSUBADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMSUBADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMSUBADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBADDPS | |
| /// Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUBADDPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMSUBADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMSUBADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMSUBADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMSUBADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMSUBADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMSUBADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x5E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBPD | |
| /// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFMSUBPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6D); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x6D); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x6D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x6D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x6D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBPS | |
| /// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFMSUBPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6C); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x6C); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x6C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x6C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x6C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBSD | |
| /// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFMSUBSD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMSUBSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory64> for VFMSUBSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory64) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory64, XMMRegister> for VFMSUBSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFMSUBSS | |
| /// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFMSUBSS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFMSUBSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory32> for VFMSUBSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory32) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, XMMRegister> for VFMSUBSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: XMMRegister) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD132PD | |
| /// Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMADD132PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMADD132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMADD132PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD132PS | |
| /// Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMADD132PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMADD132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMADD132PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD132SD | |
| /// Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMADD132SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFNMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFNMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMADD132SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD132SS | |
| /// Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMADD132SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFNMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFNMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMADD132SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD213PD | |
| /// Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMADD213PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMADD213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMADD213PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD213PS | |
| /// Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMADD213PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMADD213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMADD213PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD213SD | |
| /// Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMADD213SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFNMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFNMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMADD213SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD213SS | |
| /// Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMADD213SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFNMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFNMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMADD213SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD231PD | |
| /// Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMADD231PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMADD231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMADD231PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD231PS | |
| /// Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMADD231PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMADD231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMADD231PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBC); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD231SD | |
| /// Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMADD231SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFNMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFNMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMADD231SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADD231SS | |
| /// Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMADD231SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFNMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFNMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMADD231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMADD231SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBD); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADDPD | |
| /// Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMADDPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFNMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFNMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFNMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFNMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFNMADDPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x79); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADDPS | |
| /// Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMADDPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFNMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFNMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFNMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFNMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFNMADDPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x78); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADDSD | |
| /// Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMADDSD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory64> for VFNMADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory64) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory64, XMMRegister> for VFNMADDSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMADDSS | |
| /// Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMADDSS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory32> for VFNMADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory32) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, XMMRegister> for VFNMADDSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB132PD | |
| /// Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMSUB132PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMSUB132PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMSUB132PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB132PS | |
| /// Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMSUB132PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMSUB132PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMSUB132PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB132SD | |
| /// Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMSUB132SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFNMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFNMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB132SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMSUB132SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB132SS | |
| /// Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMSUB132SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFNMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFNMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB132SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMSUB132SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0x9F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB213PD | |
| /// Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMSUB213PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMSUB213PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMSUB213PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB213PS | |
| /// Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMSUB213PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMSUB213PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMSUB213PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB213SD | |
| /// Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMSUB213SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFNMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFNMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB213SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMSUB213SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB213SS | |
| /// Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMSUB213SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFNMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFNMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB213SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMSUB213SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xAF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB231PD | |
| /// Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMSUB231PD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMSUB231PD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMSUB231PD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB231PS | |
| /// Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMSUB231PS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VFNMSUB231PS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, RoundingControl> for VFNMSUB231PS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB231SD | |
| /// Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMSUB231SD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VFNMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VFNMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB231SD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMSUB231SD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUB231SS | |
| /// Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMSUB231SS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VFNMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VFNMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VFNMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VFNMSUB231SS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, RoundingControl> for VFNMSUB231SS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: RoundingControl) { | |
| bytes.push(0xBF); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUBPD | |
| /// Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values | |
| pub struct VFNMSUBPD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFNMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFNMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFNMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFNMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFNMSUBPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUBPS | |
| /// Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values | |
| pub struct VFNMSUBPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory128> for VFNMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory128) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, XMMRegister> for VFNMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, YMMRegister> for VFNMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: YMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Memory256> for VFNMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Memory256) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, YMMRegister> for VFNMSUBPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: YMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUBSD | |
| /// Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values | |
| pub struct VFNMSUBSD {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMSUBSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory64> for VFNMSUBSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory64) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory64, XMMRegister> for VFNMSUBSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFNMSUBSS | |
| /// Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values | |
| pub struct VFNMSUBSS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, XMMRegister> for VFNMSUBSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Memory32> for VFNMSUBSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Memory32) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, XMMRegister> for VFNMSUBSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFPCLASSPD | |
| /// Test Class of Packed Double-Precision Floating-Point Values | |
| pub struct VFPCLASSPD {} | |
| impl Ins3x<KRegisterK, BroadcastM128M64, Imm8> for VFPCLASSPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: BroadcastM128M64, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, BroadcastM256M64, Imm8> for VFPCLASSPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: BroadcastM256M64, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, BroadcastM512M64, Imm8> for VFPCLASSPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: BroadcastM512M64, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, XMMRegister, Imm8> for VFPCLASSPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, YMMRegister, Imm8> for VFPCLASSPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, ZMMRegister, Imm8> for VFPCLASSPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFPCLASSPS | |
| /// Test Class of Packed Single-Precision Floating-Point Values | |
| pub struct VFPCLASSPS {} | |
| impl Ins3x<KRegisterK, BroadcastM128M32, Imm8> for VFPCLASSPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: BroadcastM128M32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, BroadcastM256M32, Imm8> for VFPCLASSPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: BroadcastM256M32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, BroadcastM512M32, Imm8> for VFPCLASSPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: BroadcastM512M32, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, XMMRegister, Imm8> for VFPCLASSPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, YMMRegister, Imm8> for VFPCLASSPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, ZMMRegister, Imm8> for VFPCLASSPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x66); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFPCLASSSD | |
| /// Test Class of Scalar Double-Precision Floating-Point Value | |
| pub struct VFPCLASSSD {} | |
| impl Ins3x<KRegisterK, XMMRegister, Imm8> for VFPCLASSSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x67); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, Memory64, Imm8> for VFPCLASSSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: Memory64, arg2: Imm8) { | |
| bytes.push(0x67); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFPCLASSSS | |
| /// Test Class of Scalar Single-Precision Floating-Point Value | |
| pub struct VFPCLASSSS {} | |
| impl Ins3x<KRegisterK, XMMRegister, Imm8> for VFPCLASSSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x67); | |
| } | |
| } | |
| impl Ins3x<KRegisterK, Memory32, Imm8> for VFPCLASSSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: KRegisterK, arg1: Memory32, arg2: Imm8) { | |
| bytes.push(0x67); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFRCZPD | |
| /// Extract Fraction Packed Double-Precision Floating-Point | |
| pub struct VFRCZPD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VFRCZPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VFRCZPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VFRCZPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x81); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VFRCZPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x81); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFRCZPS | |
| /// Extract Fraction Packed Single-Precision Floating-Point | |
| pub struct VFRCZPS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VFRCZPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VFRCZPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VFRCZPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x80); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VFRCZPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x80); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFRCZSD | |
| /// Extract Fraction Scalar Double-Precision Floating-Point | |
| pub struct VFRCZSD {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VFRCZSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x83); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VFRCZSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x83); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VFRCZSS | |
| /// Extract Fraction Scalar Single-Precision Floating Point | |
| pub struct VFRCZSS {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VFRCZSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x82); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VFRCZSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x82); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERDPD | |
| /// Gather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices | |
| pub struct VGATHERDPD {} | |
| impl Ins2x<XMMRegisterK, VMemory32XMM> for VGATHERDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterK, arg1: VMemory32XMM) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterK, VMemory32XMM> for VGATHERDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterK, arg1: VMemory32XMM) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterK, VMemory32YMM> for VGATHERDPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterK, arg1: VMemory32YMM) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, VMemory32XMM, XMMRegister> for VGATHERDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: VMemory32XMM, arg2: XMMRegister) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, VMemory32XMM, YMMRegister> for VGATHERDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: VMemory32XMM, arg2: YMMRegister) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERDPS | |
| /// Gather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices | |
| pub struct VGATHERDPS {} | |
| impl Ins2x<XMMRegisterK, VMemory32XMM> for VGATHERDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterK, arg1: VMemory32XMM) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterK, VMemory32YMM> for VGATHERDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterK, arg1: VMemory32YMM) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterK, VMemory32ZMM> for VGATHERDPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterK, arg1: VMemory32ZMM) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, VMemory32XMM, XMMRegister> for VGATHERDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: VMemory32XMM, arg2: XMMRegister) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, VMemory32YMM, YMMRegister> for VGATHERDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: VMemory32YMM, arg2: YMMRegister) { | |
| bytes.push(0x92); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF0DPD | |
| /// Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint | |
| pub struct VGATHERPF0DPD {} | |
| impl Ins1x<VMemory32YMMK> for VGATHERPF0DPD { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory32YMMK) { | |
| bytes.push(0xC6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF0DPS | |
| /// Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint | |
| pub struct VGATHERPF0DPS {} | |
| impl Ins1x<VMemory32ZMMK> for VGATHERPF0DPS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory32ZMMK) { | |
| bytes.push(0xC6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF0QPD | |
| /// Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint | |
| pub struct VGATHERPF0QPD {} | |
| impl Ins1x<VMemory64ZMMK> for VGATHERPF0QPD { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory64ZMMK) { | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF0QPS | |
| /// Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint | |
| pub struct VGATHERPF0QPS {} | |
| impl Ins1x<VMemory64ZMMK> for VGATHERPF0QPS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory64ZMMK) { | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF1DPD | |
| /// Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint | |
| pub struct VGATHERPF1DPD {} | |
| impl Ins1x<VMemory32YMMK> for VGATHERPF1DPD { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory32YMMK) { | |
| bytes.push(0xC6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF1DPS | |
| /// Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint | |
| pub struct VGATHERPF1DPS {} | |
| impl Ins1x<VMemory32ZMMK> for VGATHERPF1DPS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory32ZMMK) { | |
| bytes.push(0xC6); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF1QPD | |
| /// Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint | |
| pub struct VGATHERPF1QPD {} | |
| impl Ins1x<VMemory64ZMMK> for VGATHERPF1QPD { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory64ZMMK) { | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERPF1QPS | |
| /// Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint | |
| pub struct VGATHERPF1QPS {} | |
| impl Ins1x<VMemory64ZMMK> for VGATHERPF1QPS { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: VMemory64ZMMK) { | |
| bytes.push(0xC7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERQPD | |
| /// Gather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices | |
| pub struct VGATHERQPD {} | |
| impl Ins2x<XMMRegisterK, VMemory64XMM> for VGATHERQPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterK, arg1: VMemory64XMM) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterK, VMemory64YMM> for VGATHERQPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterK, arg1: VMemory64YMM) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterK, VMemory64ZMM> for VGATHERQPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterK, arg1: VMemory64ZMM) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, VMemory64XMM, XMMRegister> for VGATHERQPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: VMemory64XMM, arg2: XMMRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, VMemory64YMM, YMMRegister> for VGATHERQPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: VMemory64YMM, arg2: YMMRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGATHERQPS | |
| /// Gather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices | |
| pub struct VGATHERQPS {} | |
| impl Ins2x<XMMRegisterK, VMemory64XMM> for VGATHERQPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterK, arg1: VMemory64XMM) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterK, VMemory64YMM> for VGATHERQPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterK, arg1: VMemory64YMM) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterK, VMemory64ZMM> for VGATHERQPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterK, arg1: VMemory64ZMM) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, VMemory64XMM, XMMRegister> for VGATHERQPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: VMemory64XMM, arg2: XMMRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, VMemory64YMM, XMMRegister> for VGATHERQPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: VMemory64YMM, arg2: XMMRegister) { | |
| bytes.push(0x93); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETEXPPD | |
| /// Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values | |
| pub struct VGETEXPPD {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M64> for VGETEXPPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M64> for VGETEXPPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M64> for VGETEXPPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VGETEXPPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VGETEXPPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VGETEXPPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VGETEXPPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETEXPPS | |
| /// Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values | |
| pub struct VGETEXPPS {} | |
| impl Ins2x<XMMRegisterKZ, BroadcastM128M32> for VGETEXPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, BroadcastM256M32> for VGETEXPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, BroadcastM512M32> for VGETEXPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VGETEXPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VGETEXPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VGETEXPPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions> for VGETEXPPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETEXPSD | |
| /// Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value | |
| pub struct VGETEXPSD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VGETEXPSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VGETEXPSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VGETEXPSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x43); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETEXPSS | |
| /// Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value | |
| pub struct VGETEXPSS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VGETEXPSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VGETEXPSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x43); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VGETEXPSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x43); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETMANTPD | |
| /// Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values | |
| pub struct VGETMANTPD {} | |
| impl Ins3x<XMMRegisterKZ, BroadcastM128M64, Imm8> for VGETMANTPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M64, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, BroadcastM256M64, Imm8> for VGETMANTPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M64, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, BroadcastM512M64, Imm8> for VGETMANTPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M64, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Imm8> for VGETMANTPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, Imm8> for VGETMANTPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, Imm8> for VGETMANTPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions, Imm8> for VGETMANTPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions, | |
| arg3: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETMANTPS | |
| /// Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values | |
| pub struct VGETMANTPS {} | |
| impl Ins3x<XMMRegisterKZ, BroadcastM128M32, Imm8> for VGETMANTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: BroadcastM128M32, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, BroadcastM256M32, Imm8> for VGETMANTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: BroadcastM256M32, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, BroadcastM512M32, Imm8> for VGETMANTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: BroadcastM512M32, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Imm8> for VGETMANTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, Imm8> for VGETMANTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, Imm8> for VGETMANTPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, SuppressAllExceptions, Imm8> for VGETMANTPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: SuppressAllExceptions, | |
| arg3: Imm8) { | |
| bytes.push(0x26); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETMANTSD | |
| /// Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value | |
| pub struct VGETMANTSD {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, Memory64, Imm8> for VGETMANTSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: Memory64, | |
| arg3: Imm8) { | |
| bytes.push(0x27); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VGETMANTSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x27); | |
| } | |
| } | |
| impl Ins5x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions, Imm8> for VGETMANTSD { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0x27); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VGETMANTSS | |
| /// Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value | |
| pub struct VGETMANTSS {} | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, Memory32, Imm8> for VGETMANTSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: Imm8) { | |
| bytes.push(0x27); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, Imm8> for VGETMANTSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x27); | |
| } | |
| } | |
| impl Ins5x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions, Imm8> for VGETMANTSS { | |
| pub fn ins5x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions, | |
| arg4: Imm8) { | |
| bytes.push(0x27); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VHADDPD | |
| /// Packed Double-FP Horizontal Add | |
| pub struct VHADDPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VHADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VHADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VHADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VHADDPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VHADDPS | |
| /// Packed Single-FP Horizontal Add | |
| pub struct VHADDPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VHADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VHADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VHADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VHADDPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x7C); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VHSUBPD | |
| /// Packed Double-FP Horizontal Subtract | |
| pub struct VHSUBPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VHSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VHSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VHSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VHSUBPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VHSUBPS | |
| /// Packed Single-FP Horizontal Subtract | |
| pub struct VHSUBPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VHSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VHSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VHSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VHSUBPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x7D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTF128 | |
| /// Insert Packed Floating-Point Values | |
| pub struct VINSERTF128 {} | |
| impl Ins4x<YMMRegister, YMMRegister, XMMRegister, Imm8> for VINSERTF128 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory128, Imm8> for VINSERTF128 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTF32X4 | |
| /// Insert 128 Bits of Packed Single-Precision Floating-Point Values | |
| pub struct VINSERTF32X4 {} | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, XMMRegister, Imm8> for VINSERTF32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, Memory128, Imm8> for VINSERTF32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, XMMRegister, Imm8> for VINSERTF32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory128, Imm8> for VINSERTF32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTF32X8 | |
| /// Insert 256 Bits of Packed Single-Precision Floating-Point Values | |
| pub struct VINSERTF32X8 {} | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, YMMRegister, Imm8> for VINSERTF32X8 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory256, Imm8> for VINSERTF32X8 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTF64X2 | |
| /// Insert 128 Bits of Packed Double-Precision Floating-Point Values | |
| pub struct VINSERTF64X2 {} | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, XMMRegister, Imm8> for VINSERTF64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, Memory128, Imm8> for VINSERTF64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, XMMRegister, Imm8> for VINSERTF64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory128, Imm8> for VINSERTF64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x18); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTF64X4 | |
| /// Insert 256 Bits of Packed Double-Precision Floating-Point Values | |
| pub struct VINSERTF64X4 {} | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, YMMRegister, Imm8> for VINSERTF64X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory256, Imm8> for VINSERTF64X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x1A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTI128 | |
| /// Insert Packed Integer Values | |
| pub struct VINSERTI128 {} | |
| impl Ins4x<YMMRegister, YMMRegister, XMMRegister, Imm8> for VINSERTI128 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory128, Imm8> for VINSERTI128 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTI32X4 | |
| /// Insert 128 Bits of Packed Doubleword Integer Values | |
| pub struct VINSERTI32X4 {} | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, XMMRegister, Imm8> for VINSERTI32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, Memory128, Imm8> for VINSERTI32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, XMMRegister, Imm8> for VINSERTI32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory128, Imm8> for VINSERTI32X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTI32X8 | |
| /// Insert 256 Bits of Packed Doubleword Integer Values | |
| pub struct VINSERTI32X8 {} | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, YMMRegister, Imm8> for VINSERTI32X8 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3A); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory256, Imm8> for VINSERTI32X8 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x3A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTI64X2 | |
| /// Insert 128 Bits of Packed Quadword Integer Values | |
| pub struct VINSERTI64X2 {} | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, XMMRegister, Imm8> for VINSERTI64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<YMMRegisterKZ, YMMRegister, Memory128, Imm8> for VINSERTI64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, XMMRegister, Imm8> for VINSERTI64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory128, Imm8> for VINSERTI64X2 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x38); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTI64X4 | |
| /// Insert 256 Bits of Packed Quadword Integer Values | |
| pub struct VINSERTI64X4 {} | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, YMMRegister, Imm8> for VINSERTI64X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x3A); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, Memory256, Imm8> for VINSERTI64X4 { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x3A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VINSERTPS | |
| /// Insert Packed Single Precision Floating-Point Value | |
| pub struct VINSERTPS {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VINSERTPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VINSERTPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, Imm8> for VINSERTPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: Imm8) { | |
| bytes.push(0x21); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory32, Imm8> for VINSERTPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory32, | |
| arg3: Imm8) { | |
| bytes.push(0x21); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VLDDQU | |
| /// Load Unaligned Integer 128 Bits | |
| pub struct VLDDQU {} | |
| impl Ins2x<XMMRegister, Memory128> for VLDDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VLDDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0xF0); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VLDMXCSR | |
| /// Load MXCSR Register | |
| pub struct VLDMXCSR {} | |
| impl Ins1x<Memory32> for VLDMXCSR { | |
| pub fn ins1x(runtime: &JitRuntime, arg0: Memory32) { | |
| bytes.push(0xAE); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMASKMOVDQU | |
| /// Store Selected Bytes of Double Quadword | |
| pub struct VMASKMOVDQU {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VMASKMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0xF7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMASKMOVPD | |
| /// Conditional Move Packed Double-Precision Floating-Point Values | |
| pub struct VMASKMOVPD {} | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VMASKMOVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VMASKMOVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x2D); | |
| } | |
| } | |
| impl Ins3x<Memory128, XMMRegister, XMMRegister> for VMASKMOVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| impl Ins3x<Memory256, YMMRegister, YMMRegister> for VMASKMOVPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x2F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMASKMOVPS | |
| /// Conditional Move Packed Single-Precision Floating-Point Values | |
| pub struct VMASKMOVPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VMASKMOVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VMASKMOVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x2C); | |
| } | |
| } | |
| impl Ins3x<Memory128, XMMRegister, XMMRegister> for VMASKMOVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x2E); | |
| } | |
| } | |
| impl Ins3x<Memory256, YMMRegister, YMMRegister> for VMASKMOVPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x2E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMAXPD | |
| /// Return Maximum Packed Double-Precision Floating-Point Values | |
| pub struct VMAXPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VMAXPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, SuppressAllExceptions> for VMAXPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMAXPS | |
| /// Return Maximum Packed Single-Precision Floating-Point Values | |
| pub struct VMAXPS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VMAXPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, SuppressAllExceptions> for VMAXPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMAXSD | |
| /// Return Maximum Scalar Double-Precision Floating-Point Value | |
| pub struct VMAXSD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VMAXSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMAXSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMAXSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMAXSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VMAXSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMAXSS | |
| /// Return Maximum Scalar Single-Precision Floating-Point Value | |
| pub struct VMAXSS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VMAXSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMAXSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VMAXSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMAXSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VMAXSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMINPD | |
| /// Return Minimum Packed Double-Precision Floating-Point Values | |
| pub struct VMINPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M64) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M64> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M64) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M64> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M64) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VMINPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, SuppressAllExceptions> for VMINPD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMINPS | |
| /// Return Minimum Packed Single-Precision Floating-Point Values | |
| pub struct VMINPS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M32> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: BroadcastM128M32) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, BroadcastM256M32> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: YMMRegisterKZ, | |
| arg1: YMMRegister, | |
| arg2: BroadcastM256M32) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegisterKZ, YMMRegister, YMMRegister> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, BroadcastM512M32> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: BroadcastM512M32) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory128> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory128) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, YMMRegister> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: YMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<YMMRegister, YMMRegister, Memory256> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister, arg2: Memory256) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<ZMMRegisterKZ, ZMMRegister, ZMMRegister> for VMINPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister, arg2: ZMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<ZMMRegisterKZ, ZMMRegister, ZMMRegister, SuppressAllExceptions> for VMINPS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: ZMMRegisterKZ, | |
| arg1: ZMMRegister, | |
| arg2: ZMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMINSD | |
| /// Return Minimum Scalar Double-Precision Floating-Point Value | |
| pub struct VMINSD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory64> for VMINSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMINSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMINSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMINSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VMINSD { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMINSS | |
| /// Return Minimum Scalar Single-Precision Floating-Point Value | |
| pub struct VMINSS {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, Memory32> for VMINSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMINSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory32> for VMINSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory32) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMINSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| impl Ins4x<XMMRegisterKZ, XMMRegister, XMMRegister, SuppressAllExceptions> for VMINSS { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: SuppressAllExceptions) { | |
| bytes.push(0x5D); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVAPD | |
| /// Move Aligned Packed Double-Precision Floating-Point Values | |
| pub struct VMOVAPD {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVAPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVAPS | |
| /// Move Aligned Packed Single-Precision Floating-Point Values | |
| pub struct VMOVAPS {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x28); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVAPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x29); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVD | |
| /// Move Doubleword | |
| pub struct VMOVD {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, XMMRegister> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister32> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister32> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister32) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<Memory32, XMMRegister> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<Memory32, XMMRegister> for VMOVD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDDUP | |
| /// Move One Double-FP and Duplicate | |
| pub struct VMOVDDUP {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory64> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVDDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQA | |
| /// Move Aligned Double Quadword | |
| pub struct VMOVDQA {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQA32 | |
| /// Move Aligned Doubleword Values | |
| pub struct VMOVDQA32 {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDQA32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQA64 | |
| /// Move Aligned Quadword Values | |
| pub struct VMOVDQA64 {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDQA64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQU | |
| /// Move Unaligned Double Quadword | |
| pub struct VMOVDQU {} | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVDQU { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQU16 | |
| /// Move Unaligned Word Values | |
| pub struct VMOVDQU16 {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDQU16 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQU32 | |
| /// Move Unaligned Doubleword Values | |
| pub struct VMOVDQU32 {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDQU32 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQU64 | |
| /// Move Unaligned Quadword Values | |
| pub struct VMOVDQU64 {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDQU64 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVDQU8 | |
| /// Move Unaligned Byte Values | |
| pub struct VMOVDQU8 {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x7F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVDQU8 { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x6F); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVHLPS | |
| /// Move Packed Single-Precision Floating-Point Values High to Low | |
| pub struct VMOVHLPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMOVHLPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMOVHLPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVHPD | |
| /// Move High Packed Double-Precision Floating-Point Value | |
| pub struct VMOVHPD {} | |
| impl Ins2x<Memory64, XMMRegister> for VMOVHPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVHPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVHPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVHPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVHPS | |
| /// Move High Packed Single-Precision Floating-Point Values | |
| pub struct VMOVHPS {} | |
| impl Ins2x<Memory64, XMMRegister> for VMOVHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVHPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x17); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVHPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVHPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVLHPS | |
| /// Move Packed Single-Precision Floating-Point Values Low to High | |
| pub struct VMOVLHPS {} | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMOVLHPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMOVLHPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVLPD | |
| /// Move Low Packed Double-Precision Floating-Point Value | |
| pub struct VMOVLPD {} | |
| impl Ins2x<Memory64, XMMRegister> for VMOVLPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVLPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVLPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVLPD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVLPS | |
| /// Move Low Packed Single-Precision Floating-Point Values | |
| pub struct VMOVLPS {} | |
| impl Ins2x<Memory64, XMMRegister> for VMOVLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVLPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x13); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVLPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, Memory64> for VMOVLPS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: Memory64) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVMSKPD | |
| /// Extract Packed Double-Precision Floating-Point Sign Mask | |
| pub struct VMOVMSKPD {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VMOVMSKPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x50); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, YMMRegister> for VMOVMSKPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: YMMRegister) { | |
| bytes.push(0x50); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVMSKPS | |
| /// Extract Packed Single-Precision Floating-Point Sign Mask | |
| pub struct VMOVMSKPS {} | |
| impl Ins2x<GPRegister32, XMMRegister> for VMOVMSKPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: XMMRegister) { | |
| bytes.push(0x50); | |
| } | |
| } | |
| impl Ins2x<GPRegister32, YMMRegister> for VMOVMSKPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister32, arg1: YMMRegister) { | |
| bytes.push(0x50); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVNTDQ | |
| /// Store Double Quadword Using Non-Temporal Hint | |
| pub struct VMOVNTDQ {} | |
| impl Ins2x<Memory128, XMMRegister> for VMOVNTDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0xE7); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVNTDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0xE7); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVNTDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0xE7); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVNTDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0xE7); | |
| } | |
| } | |
| impl Ins2x<Memory512, ZMMRegister> for VMOVNTDQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512, arg1: ZMMRegister) { | |
| bytes.push(0xE7); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVNTDQA | |
| /// Load Double Quadword Non-Temporal Aligned Hint | |
| pub struct VMOVNTDQA {} | |
| impl Ins2x<XMMRegister, Memory128> for VMOVNTDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVNTDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVNTDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVNTDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| impl Ins2x<ZMMRegister, Memory512> for VMOVNTDQA { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegister, arg1: Memory512) { | |
| bytes.push(0x2A); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVNTPD | |
| /// Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint | |
| pub struct VMOVNTPD {} | |
| impl Ins2x<Memory128, XMMRegister> for VMOVNTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVNTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVNTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVNTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory512, ZMMRegister> for VMOVNTPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512, arg1: ZMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVNTPS | |
| /// Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint | |
| pub struct VMOVNTPS {} | |
| impl Ins2x<Memory128, XMMRegister> for VMOVNTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVNTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVNTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVNTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| impl Ins2x<Memory512, ZMMRegister> for VMOVNTPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512, arg1: ZMMRegister) { | |
| bytes.push(0x2B); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVQ | |
| /// Move Quadword | |
| pub struct VMOVQ {} | |
| impl Ins2x<GPRegister64, XMMRegister> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<GPRegister64, XMMRegister> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: GPRegister64, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister64> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister64) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, GPRegister64> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: GPRegister64) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x6E); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0xD6); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVQ { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x7E); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVSD | |
| /// Move Scalar Double-Precision Floating-Point Value | |
| pub struct VMOVSD {} | |
| impl Ins2x<Memory64K, XMMRegister> for VMOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64K, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory64> for VMOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory64) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory64> for VMOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory64) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory64, XMMRegister> for VMOVSD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory64, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMOVSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMOVSD { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVSHDUP | |
| /// Move Packed Single-FP High and Duplicate | |
| pub struct VMOVSHDUP {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVSHDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x16); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVSLDUP | |
| /// Move Packed Single-FP Low and Duplicate | |
| pub struct VMOVSLDUP {} | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVSLDUP { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x12); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVSS | |
| /// Move Scalar Single-Precision Floating-Point Values | |
| pub struct VMOVSS {} | |
| impl Ins2x<Memory32K, XMMRegister> for VMOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32K, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory32> for VMOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory32) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory32> for VMOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory32) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory32, XMMRegister> for VMOVSS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory32, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, XMMRegister> for VMOVSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins3x<XMMRegister, XMMRegister, XMMRegister> for VMOVSS { | |
| pub fn ins3x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister, arg2: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVUPD | |
| /// Move Unaligned Packed Double-Precision Floating-Point Values | |
| pub struct VMOVUPD {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVUPD { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMOVUPS | |
| /// Move Unaligned Packed Single-Precision Floating-Point Values | |
| pub struct VMOVUPS {} | |
| impl Ins2x<Memory128KZ, XMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128KZ, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, XMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory256KZ, YMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256KZ, arg1: YMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, YMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: YMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory512KZ, ZMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory512KZ, arg1: ZMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, ZMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: ZMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegisterKZ, Memory128> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegisterKZ, arg1: Memory128) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<YMMRegisterKZ, Memory256> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegisterKZ, arg1: Memory256) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<ZMMRegisterKZ, Memory512> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: ZMMRegisterKZ, arg1: Memory512) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, XMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: XMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<XMMRegister, Memory128> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: XMMRegister, arg1: Memory128) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, YMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: YMMRegister) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<YMMRegister, Memory256> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: YMMRegister, arg1: Memory256) { | |
| bytes.push(0x10); | |
| } | |
| } | |
| impl Ins2x<Memory128, XMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory128, arg1: XMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| impl Ins2x<Memory256, YMMRegister> for VMOVUPS { | |
| pub fn ins2x(runtime: &JitRuntime, arg0: Memory256, arg1: YMMRegister) { | |
| bytes.push(0x11); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMPSADBW | |
| /// Compute Multiple Packed Sums of Absolute Difference | |
| pub struct VMPSADBW {} | |
| impl Ins4x<XMMRegister, XMMRegister, XMMRegister, Imm8> for VMPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: XMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<XMMRegister, XMMRegister, Memory128, Imm8> for VMPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: XMMRegister, | |
| arg1: XMMRegister, | |
| arg2: Memory128, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, YMMRegister, Imm8> for VMPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: YMMRegister, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| impl Ins4x<YMMRegister, YMMRegister, Memory256, Imm8> for VMPSADBW { | |
| pub fn ins4x(runtime: &JitRuntime, | |
| arg0: YMMRegister, | |
| arg1: YMMRegister, | |
| arg2: Memory256, | |
| arg3: Imm8) { | |
| bytes.push(0x42); | |
| } | |
| } | |
| /// Generated struct and trait implementations for: | |
| /// VMULPD | |
| /// Multiply Packed Double-Precision Floating-Point Values | |
| pub struct VMULPD {} | |
| impl Ins3x<XMMRegisterKZ, XMMRegister, BroadcastM128M64> for VMULPD { | |
| pub fn ins3x(runtime: &JitRuntime, | |
| arg0: XMMRegisterKZ, | |
| arg1 |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment