Created
March 17, 2025 18:22
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Swarm Technologies TILE01 SX1278 init sequence
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SPI commands sent to a Semtech SX1278 radio SoC during initialization, as captured from a Swarm Technologies TILE01. | |
c0 ff c1 f0 RegDioMapping1+2: no function on DIO pins | |
81 80 Lora Mode, device mode -> sleep | |
01 00 42 00 09 00 06 00 07 00 08 00 read some reg values | |
89 00 set PA at min power | |
86 22 87 75 88 d7 set frequency 137.84MHz | |
3b 00 bb 5d 3b 00 RegInvertIQ2: ??? | |
89 4f set PA mid-level | |
86 6c 87 80 88 00 set frequency to default (433MHz) | |
c0 ff c1 f0 no change to DIO | |
81 01 device mode -> standby | |
1d 00 9d 52 RegModemConfig1: bw 41.7kHz, coding rate 4/5 | |
1d 00 9d 52 do it twice | |
26 00 a6 0c enable LowDataRateOptimize, LNA AGC | |
86 22 87 77 88 2d set frequency 137.86MHz | |
31 00 b1 43 set AutomaticIFOn to 0 | |
b0 00 af 44 set IfFreq1 and IfFreq2 according to errata | |
81 05 device mode -> receive | |
c0 3f c1 f0 set DIO0=RxDone | |
89 7e RegPaConfig: RFO, PA at almost max power | |
a0 00 a1 0f PreambleLength=15 (instead of default 8) | |
8a 00 PARamp 3.4ms | |
9e 84 RegModemConfig2: SpreadingFactor=256 chips/symbol, CRC enabled | |
8f 00 8e 00 set RX/TX FIFO base addresses to 0 | |
4b 00 cb 19 clock is TCXO | |
26 00 a6 08 RegModemConfig3: LowDataRateOptimize enabled | |
0b 00 8b 2b RegOcp: OCP enabled (default) | |
0c 00 8c 40 RefLna: G2 (one notch below max) | |
c0 ff c1 f0 no DIO function | |
81 80 Lora Mode, device mode -> sleep | |
c0 ff c1 f0 no DIO function | |
81 05 device mode -> receive | |
c0 3f c1 f0 DIO0=RxDone | |
1b 00 1b 00 .. polling RSSI (repeating every 250ms) |
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